Eup3482aeup3482a PDF
Eup3482aeup3482a PDF
Eup3482aeup3482a PDF
FEATURES
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2A Output Current
Automatic Pulse Skipping Mode at Light Load
35V Input Surge Protection
Integrated 160m/110m DMOS Switches
4.5V to 30V Input Operating Range
Output Adjustable from 0.923V to 12V
Up to 93% Efficiency
1A Shutdown Current
Fixed 340KHz Frequency
Programmable Soft-Start
Thermal Shutdown and Overcurrent Protection
Input Supply Overvoltage and Undervoltage
Lockout
230ns Minimum On Time
Available in SOP-8 Package
RoHS Compliant and 100% Lead(Pb)-Free
Halogen-Free
APPLICATIONS
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EUP3482A
Typical Application Circuit (continued)
Pin Configurations
Package Type
Pin Configurations
SOP-8
Pin Description
PIN
PIN
BS
IN
SW
GND
FB
COMP
EN
SS
DESCRIPTION
High-Side Gate Drive Boost Input. BS supplies the drive for the high-side N-Channel DMOS
switch. Connect a 0.01F or greater capacitor from SW to BS to power the high side switch.
Input Supply Pin. IN supplies the power to the IC, as well as the step-down converter switches.
Drive IN with a 4.5V to 30V power source. Bypass IN to GND with a suitably large capacitor to
minimize input ripple to the IC. See Input Capacitor Section of the applications notes.
Power Switching Output. Connect the output LC filter from SW to the output load.
Ground.
Output Feedback Input. FB senses the output voltage and regulates it. Drive FB with a resistive
voltage divider connected to it from the output voltage. The feedback threshold is 0.923V.
See Setting the Output Voltage.
Loop compensation Input. Connect a series RC network from COMP to GND to compensate the
regulation control loop. See Compensation.
Enable Input. EN is a logic input that controls the regulator on or off. Drive EN high to turn on the
regulator; low to turn it off. Dont leave EN pin floating. Directly connect EN to IN (or through a
resistance) for automatic startup.
Soft-Start Control Input. Connect an external capacitor to program the soft-start. If unused, leave it
open, which means internal soft-start function.
EUP3482A
Ordering Information
Order Number
Package Type
Marking
EUP3482ADIR1
SOP-8
xxxxx
3482A
-40 C to +85C
EUP3482A
Lead Free Code
1: Lead Free, Halogen-Free
0: Lead
Packing
R: Tape & Reel
Operating temperature range
I: Industry Standard
Package Type
D: SOP
Block Diagram
EUP3482A
Electrical Characteristics
The denote specifications which apply over the full operating temperature range, otherwise specification are
VIN=12V , TA=25C unless otherwise specified.
Parameter
Conditions
VEN=0V
VFB=1V
Feedback Voltage
Min.
0.905
0.895
EUP3482A
Typ.
Max.
1
0.45
0.923
0.923
5
0.9
0.941
0.951
Unit
A
mA
V
360
V/V
800
A/V
160
110
IC = 10A
VEN=0V, VSW=0V
VFB=0V
VFB=0.7V
5
2.5
3.5
300
0
7.5
340
A
A/V
KHz
EN Lockout Threshold
EN Lockout Threshold Hysteresis
Input Under Voltage Lockout Threshold
Input Over Voltage Lockout Threshold
Input Over Voltage Lockout Threshold
Hysteresis
Soft-Start Charge Current
Thermal Shutdown
DS3482A Ver1.1 Jun. 2010
VEN Rising
VIN Falling
VIN Rising
KHz
%
ns
0.62
230
1.1
1.52
0.36
2.3
1.1
2.5
1.76
2.8
2.5
120
4.1
35
3.8
VSS=0V
380
110
90
Minimum On Time
EN Disable Threshold
4.4
V
V
mV
V
V
6
160
A
C
EUP3482A
EUP3482A
EUP3482A
EUP3482A
Functional Description
V
OUT 1 OUT
f I
V
S
L
IN
Where VOUT is the output voltage, VIN is the input
voltage, fS is the switching frequency, and IL is the
peak-to-peak inductor ripple current.
Choose an inductor that will not saturate under the
maximum inductor peak current, calculated by:
L=
V
OUT 1 OUT
LP
LOAD 2 f L
V
S
IN
OUT 1 OUT
=I
I
C1
LOAD
V
V
IN
IN
Application Information
Setting the Output Voltage
The output voltage is set using a resistive voltage
divider connected from the output voltage to FB. The
voltage divider divides the output voltage down to the
feedback voltage by the ratio:
R2
VFB = VOUT
R1 + R2
Thus the output voltage is:
R1 + R 2
VOUT = 0.923
R2
R2 can be as high as 100k, but a typical value is
10k. Using the typical value for R2, R1 is determined
by:
=I
EUP3482A
The input capacitor can be electrolytic, tantalum or
ceramic. When using electrolytic or tantalum capacitors,
a small, high quality ceramic capacitor, i.e. 0.1F,
should be placed as close to the IC as possible. When
using ceramic capacitors, make sure that they have
enough capacitance to provide sufficient charge to
prevent excessive voltage ripple at input. The input
voltage ripple for low ESR capacitors can be estimated
by:
Compensation Components
EUP3482A employs current mode control for easy
compensation and fast transient response. The system
stability and transient response are controlled through
the COMP pin. COMP is the output of the internal
transconductance error amplifier. A series capacitorresistor combination sets a pole-zero combination to
govern the characteristics of the control system.
The DC gain of the voltage feedback loop is given by:
I
V
V
= LOAD OUT 1 OUT
IN
C1 f
V IN
V IN
S
Where C1 is the input capacitance value.
V
A VDC = R LOAD G CS A
FB
V EA V
OUT
V
= OUT 1 OUT
V
OUT
VIN
f S L
ESR
8 f C2
S
VOUT =
V
VOUT
1 OUT
2
VIN
8 fS L C 2
f Z1 =
2 C3 R3
The system may have another zero of importance, if
the output capacitor has a large capacitance and/or a
high ESR value. The zero, due to the ESR and
capacitance of the output capacitor, is located at:
VOUT =
VOUT
V
1 OUT
f S L
VIN
ESR
1
2 C2 R
ESR
ESR
P3
1
2 C4 R3
EUP3482A
loop has the unity gain is important. Lower crossover
frequencies result in slower line and load transient
responses, while higher crossover frequencies could
cause the system instability. A good standard is to set
the crossover frequency below one-tenth of the
switching frequency.
To optimize the compensation components, the
following procedure can be used:
1. Choose the compensation resistor (R3) to set the
desired crossover frequency.
Determine R3 by the following equation:
R3 =
<
C4 =
V
OUT
G EA G CS
VFB
G EA G CS
ESR
R3
2 C2 f C
2 C 2 0 .1 f S
C2 R
V
OUT
VFB
C3 >
4
2 R 3 f
operation ( when
C
Where R3 is the compensation resistor.
3. Determine if the second compensation capacitor
(C4) is required. It is required if the ESR zero of
the output capacitor is located at less than half of
the switching frequency, or the following
relationship is valid:
f
1
< S
2
2 C2 R
ESR
V
OUT
V
IN
Vout(V)
L1(uH)
C2(uF)
R1(K)
R2(K)
R3(K)
C3(nF)
C4(pF)
1.0
3.3
22*2
0.845
10
2.2
3.3
open
1.2
4.7
22*2
3.0
10
2.2
3.3
open
3.3
10
22*2
26.1
10
2.2
3.3
open
12
1.0
3.3
22*2
0.845
10
2.2
10
open
12
1.2
4.7
22*2
3.0
10
2.2
10
open
12
3.3
10
22*2
26.1
10
2.2
3.3
open
12
5.0
10
22*2
44.2
10
2.2
3.3
open
24
3.3
10
22*2
26.1
10
2.2
3.3
open
24
5.0
10
22*2
44.2
10
2.2
3.3
open
10
EUP3482A
Packaging Information
SOP-8
SYMBOLS
MILLIMETERS
INCHES
MIN.
MAX.
MIN.
MAX.
1.35
1.75
0.053
0.069
A1
0.10
0.25
0.004
0.010
D
E
4.90
5.80
E1
0.193
6.20
0.228
3.90
0.244
0.153
0.40
1.27
0.016
0.050
0.31
0.51
0.012
0.020
1.27
0.050
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