En CD00201961 PDF
En CD00201961 PDF
En CD00201961 PDF
Application note
1 kW dual stage DC-AC converter based on the STP160N75F3
Introduction
This application note provides design guidelines and performance characterization of the
STEVAL-ISV001V1 demonstration board.
This board implements a 1 kW dual stage DC-AC converter, suitable for use in batterypowered uninterruptible power supplies (UPS) or photovoltaic (PV) standalone systems.
The converter is fed by a low DC input voltage varying from 20 V to 28 V, and is capable of
supplying up to 1 kW of output power on a single-phase AC load. These features are
possible thanks to a dual stage conversion topology that includes an efficient step-up pushpull DC-DC converter, which produces a regulated high-voltage DC bus and a sinusoidal HBridge PWM inverter to generate a 50 Hz, 230 Vrms output sine wave. Other key features of
the system proposed are high power density, high switching frequency and efficiency
greater than 90% over a wide output load range
Figure 1.
January 2012
1/39
www.st.com
Contents
AN2794
Contents
1
System description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Design considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1
Layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Schematic description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Experimental results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Bibliography . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
2/39
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
AN2794
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
System specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Push-pull converter specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
HF transformer design parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Output inductor design parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Power MOSFET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Bill of material (BOM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
3/39
List of figures
AN2794
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
4/39
AN2794
System description
System description
In a UPS system, as shown in Figure 2, a DC-AC converter is always used to convert the
DC power from the batteries to AC power used to supply the load. The basic scheme also
includes a battery pack, a battery charger which converts AC power from the grid into DC
power, and a transfer switch to supply the load from the mains or from the energy storage
elements if a line voltage drop or failure occurs.
Figure 2.
AC/DC
SWITCH
Battery
Another application where a DC-AC converter is always required is shown in the block
diagram of Figure 3. In this case, the converter is part of a conversion scheme commonly
used in standalone photovoltaic systems. An additional DC-DC converter operates as a
battery charger while performing a maximum power point tracking algorithm (MPPT), which
is necessary to maximize the energy yield from the PV array. The battery pack is always
present to store energy when solar radiation is available and release it at night or during
hours of low insolation.
Figure 3.
DC/DC
Battery
Charger
+
MPPT
DC/AC
Batteries
LC Filter
Load
2.
3.
5/39
System description
Figure 4.
AN2794
Block diagram of the proposed conversion scheme
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The DC-DC section is a critical part of the converter design. In fact, the need for high overall
efficiency (close to 90% or higher) together with the specifications for continuous power
rating, low input voltage range leading to high input current, and the need for high switching
frequency to minimize weight and size of passive components, makes it a quite challenging
design.
Due to the constraints given by the specifications given in Table 1, few topology solutions
are suitable to meet the efficiency target. Actually, since the input voltage of the DC-AC
converter must be at least equal to 350 V, it is not feasible to use non-isolated DC-DC
converters. Moreover, the output power rating prevents the use of single switch topologies
such as the flyback and the forward. Among the remaining isolated topologies, the half
bridge and full bridge are more suitable for high DC input voltage applications and also
characterized by the added complexity of gate drive circuitry of the high side switches.
Table 1.
System specifications
Specification
Value
24 V
Output voltage
230 Vrms, 50 Hz
Output power
1kW
Efficiency
90%
Switching frequency
Due to such considerations, the push-pull represents the most suitable choice. This
topology features two transistors on the primary side and a center tapped high frequency
transformer, as shown in the step-up section in Figure 4. It is quite efficient at low input
voltage making it widely used in battery powered UPS applications. Both power devices are
ground referenced with consequent simple gate drive circuits. They are alternatively turned
6/39
AN2794
System description
on and off in order to transfer power to each primary of the center tapped transformer.
Contemporary conduction of both devices must be avoided by limiting the duty cycle value
of the constant frequency PWM modulator to less than 0.5. The PWM modulator should also
prevent unequal ON times for the driving signals since this would result in transformer
saturation caused by the "Flux Walking" phenomenon.
The basic operation is similar to a forward converter. In fact, when a primary switch is active,
the current flows through the rectifier diodes, charging the output inductor, while when both
the switches are off, the output inductor discharges. It is important to point out that the
operating frequency of the output inductor is twice the switching frequency.
A transformer reset circuit is not needed thanks to the bipolar flux operation, which also
means better transformer core utilization with respect to single-ended topologies.
The main disadvantage of the push-pull converter is the breakdown voltage of primary
power devices which has to be higher than twice the input voltage. In fact, when voltage is
applied to one of the two transformer primary windings by the conduction of a transistor, the
reflected voltage across the other primary winding puts the drain of the off state transistor at
twice the input voltage with respect to ground. This is the reason why push-pull converters
are not suitable for high input voltage applications.
For the above mentioned reasons, the voltage fed push-pull converter, shown in Figure 4, is
chosen to boost the input voltage from 24 V to a regulated 350 V, suitable for optimal
inverter operation. The high voltage conversion ratio can be achieved by proper transformer
turns ratio design, taking into account that the input to output voltage transfer function is
given by:
Equation 1
Vout = 2
N2
DVin
N1
The duty cycle is set by a voltage mode PWM regulator (SG3525) to keep a constant output
DC bus voltage. This voltage is then converted into AC using a standard H-bridge converter
implemented with four ultrafast switching IGBTs in PowerMESH technology, switching at
16 kHz. The switching strategy, based on PWM sinusoidal modulation, is implemented on
an 8-bit ST7lite39 microcontroller unit. This allows the use of a simple LC circuit to obtain a
high quality sine wave in terms of harmonic content.
The power supply section consists of a buck-boost converter to produce a regulated 15 V
from a minimum input voltage of 4 V. The circuit can be simply implemented by means of a
L5973 device, characterized by an internal P-channel DMOS transistor and few external
components. In this way, it is possible to supply all the driving circuits and the PWM
modulator. A standard linear regulator, L7805, provides 5 V supply to the microcontroller
unit.
7/39
Design considerations
AN2794
Design considerations
The basic operation of a voltage fed push-pull converter is shown in Figure 5, where
theoretical converter waveforms are highlighted. In practice, significant overvoltages across
devices M1, M2 and across the four rectifier diodes are observed in most cases due to the
leakage inductance of the high frequency transformer. As a consequence, the breakdown
voltage of primary devices must be greater than twice the input voltage, and the use of
snubbing and/or clamping circuits is often helpful.
Special attention has to be paid to transformer design, due to the difficulties in minimizing
the leakage inductance and implementing low-voltage high-current terminations. Moreover,
imbalance in the two primary inductance values must be avoided both by symmetrical
windings and proper printed circuit board (PCB) layout. While transformer construction
techniques guarantee good symmetry and low leakage inductance values, asymmetrical
layout due to inappropriate component placement can be the source of different PCB trace
inductances. Whatever the cause of a difference in peak current through the switching
elements, transformer saturation in voltage mode push-pull converters can occur in a few
switching cycles with catastrophic consequences.
Figure 5.
8/39
AN2794
Design considerations
Starting from the specifications in Table 2, a step-by-step design procedure and some
design hints to obtain a symmetrical layout are given below.
Table 2.
Symbol
Value
Vin
24 V
Vinmax
28 V
Vinmin
20 V
Pout
1000 W
Vout
350 V
Target efficiency
> 90%
Switching frequency
100 kHz
A switching frequency of f = 100 kHz was chosen to minimize passive components size and
weight, then the following step-by-step calculation was done:
Switching period:
Equation 2
T=
1
1
= 5 = 10 s
f 10
The theoretical maximum on time for each phase of the push-pull converter is:
Equation 3
t * on = 0.5T = 5 s
Dmax = 0.9
t * on
= 0.45
T
This means a total deadtime of 1s at maximum duty cycle, occurring for minimum input
voltage operation.
Input power
Pin =
Pout
= 1111 W
0.9
9/39
Design considerations
AN2794
Equation 6
Pin
1111
=
= 55.55 A
Vinmin
20
Iin =
Equation 7
Ipft =
Iin
55.55
=
= 61.72 A
2Dmax
0.9
Equation 8
Equation 9
IMos RMS = Ipft D max = 41.4 A
Equation 10
VBrk Mos = 1 . 3 2 VinMax = 72 .8 V
Equation 11
N=
Vout
N2
=
= 19
N1 2Vinmin Dmax
Equation 12
Dmin =
Vout
= 0.32
2NVinmax
Equation 13
Dmin =
Vout
= 0.38
2NVin
Equation 14
Iout =
10/39
Pout
= 2.86 A
Vout
AN2794
Design considerations
Assuming that the secondary top flat current value is equal to the average output value the
rms secondary current is:
Equation 15
IsecRMS = Iout Dmax = 1.91 A
Equation 16
Vdiode = NVinMax = 532 V
Equation 17
Lmin (
t on
N2
Vin - Vout ) Max
N1
I
Assuming a ripple current value I= 15% Iout = 0.43A, the minimum value for the output filter
inductance is:
Equation 18
L min = 1.109 mH
With this value of inductance continuous current mode (CCM) operation is guaranteed for a
minimum output current of:
Equation 19
IoutMin =
I
= 0.215 A
2
which means a minimum load of 75 W is required for CCM operation. The chosen value for
this design is L=1.5 mH.
Equation 20
C=
1 IL
Ts
8 V0
11/39
Design considerations
AN2794
V0
= 0.81
IL
Input capacitor:
Equation 24
Cin = ICrms
TonMax
Vin
and
Equation 26
Vin = 0.1%VinMax = 0.028 V
then
Equation 27
Cin = ICrms
12/39
TonMax
Vin
= 3053 F
AN2794
Design considerations
HF transformer design
The design method is based on the Kg core geometry approach. The design can be done
according to the specifications in Table 3.
Table 3.
Symbol
Value
Vin
24 V
Vinmax
28 V
Vinmin
20 V
Iin
41.4 A
Vout
350 V
Output current
Iout
2.86 A
Switching frequency
100 kHz
Efficiency
98%
Regulation
0.05%
Bm
0.05T
Window utilization
Ku
0.3
Duty cycle
Dmax
0.45
Temperature rise
Tr
30 C
The first step is to compute the transformer apparent power given by:
Equation 28
Pt =
P0
1
+ P0 = ( + 1)V0I0 = 2021 W
( )
2
K e = 0.145 K 2f f 2 Bm
10 -4
( )
Pt
= 0.348 cm5
2Ke
13/39
Design considerations
AN2794
The Kg constant is related to the core geometrical parameters by the following equation:
Equation 32
Kg =
Wa A 2cK u
MLT
where Wa is the core window area, Ac is the core cross sectional area and MLT is the mean
length per turn.
For example, choosing an E55/28/21 core with N27 ferrite, having
MLT= 11.3 cm
Vinmin DmaxT
BAc
= 2 turns
At this point wires must be selected in order to implement primary and secondary windings.
At 100 kHz the current penetration depth is:
Equation 36
=
6.62
= 0.0209 cm
d = 2 = 0.0418 cm
14/39
AN2794
Design considerations
AW =
d2
= 0.00137cm2
4
Checking the wire table we notice that AWG26, having a wire area of AWAWG26 = 0.00128
cm2, can be used in this design. Considering a current density J = 500 A/cm2 the number of
primary wires is given by:
Equation 39
Snp =
A wp
A w AWG26
= 62
where:
Equation 40
Awp =
Iin
= 0.08 cm2
J
Since the AWG26 has a resistance of 1345 /cm, the primary resistance is:
Equation 41
rp =
1345 / cm
= 21.69 / cm
62
A ws =
Iout
= 0.00572 cm2
J
Equation 44
S ns =
A ws
=5
A w AWG 26
Equation 45
rs =
1345 / cm
= 269 / cm
5
Equation 46
R s = N 2 MLT rs = 115 .5 m
15/39
Design considerations
AN2794
Pcu
100 = 0.178%
Pout
From the core loss curve of N27 material, at 55 C, 50mT and 100 kHz, the selected core
has the following losses:
Equation 49
PV = 28.1
kW
m3
Ve = 1.23 W
Where Ve= 43900 mm3 is the core volume. The transformer temperature rise is:
Equation 50
Tr = R th (PCu + PV ) = 33
with
Equation 51
R th = 11
C
W
Output inductor
The output filter inductor can be made using powder cores to minimize eddy current losses
and introduce a distributed air gap into the core. The design parameters are shown in
Table 4:
Table 4.
Symbol
Value
Lmin
1.5 mH
DC current
I0
2.86 A
AC current
0.41 A
Output power
P0
1000 W
Ripple frequency
fr
200 kHz
Bm
0.3 T
Core material
16/39
Kool
Window utilization
Ku
0.4
Temperature rise
Tr
25 C
AN2794
Design considerations
Ipk = I0 +
I
= 3.06A
2
Knowing this parameter, from Magnetics core chart, a 46.7 mm x 28.7 mm x 12.2 mm Kool
toroid, with =60 permeability and AL = 0.086 nH/turn can be selected. The required
number of turns is then:
Equation 54
L
= 132 turns
AL
N=
NI
= 84.2 oersteds
Le
The initial value of turns has to be increased by dividing it by 0.8 (as shown in the data
catalog) to take into account the reduction of initial permeability (e = 39 at full load) at
nominal current value. Then, the adjusted number of turns is:
Equation 56
N = 165 turns
The wire table shows that at 3 A the AWG20 can be used. With this choice, the maximum
number of turns per layer, for the selected core, is Nlayer= 96 and the resistance per single
layer is rlayer= 0.166. The total winding resistance is then:
Equation 57
R=
N
Nlayer
rlayer = 0.38
17/39
Design considerations
AN2794
Equation 59
PL = kB 2ac.12 f1.23 = 2.047mW / g
Equation 60
B ac =
( )
I
e 10 -4
2
= 0.0137T
MPL
0.4N
where MPL=11.8 cm is the magnetic path length. Since the core weight is 95.8 g, the core
losses are:
Equation 61
PL = 0 .2 W
Once the transformer has been designed, the next step in performing the loss analysis is to
choose the power devices both for the input and output stage of the push-pull converter.
According to the calculations given above the following components have been selected:
Table 5.
Power MOSFET
Device
Type
RDS(on)
tr+tf
Vbr
Id at 100 C
STP160N75F3
Power
MOSFET
4.5 m
70 ns+15 ns
75 V
96 A
Table 6.
Diode
Device
Type
VF at 175 C
trrMax
VRRM
IF at 100 C
STTH8R06
Ultrafast diode
1.4 V
25 ns
600 V
8A
MOSFET and diode losses can be separated into conduction and switching losses which
can be estimated, in the worst case operating condition (junction temperature of 100 C),
with the following equations:
Equation 62
Pcond = 1.6R ds ON I2MosRMS = 12.5W
Equation 63
Pgate = Q g Vgs f = 0.165 W
Equation 64
Psw(ON+ OFF) =
18/39
1 VOffImos (tr + t f )
= 8.5 W
2
T
AN2794
Design considerations
Equation 65
Pcond Diode = VFIsecRMS = 2.67 W
Equation 66
Pdiode SW = VRMIRR t b f = 2 .4 W
Note:
Converter losses are distributed according to the graphic in Figure 6, where PCB trace
losses and control losses are not considered. What is important to note is that primary
switch conduction accounts for 36% of total DC-DC converter losses. This contribution can
be reduced by paralleling either two or three power devices. For example, by paralleling
three STP160N75F3s, a reduction in MOSFET conduction losses of 33% is achieved. Thus
MOSFET conduction losses account for 16% of total DC-DC converter losses, resulting in a
1.8% efficiency improvement.
Figure 6.
4%
5%
14%
36%
16%
25%
Transformer Losses
Inductor Losses
AM00627v1
19/39
Design considerations
Figure 7.
AN2794
Distribution of losses with 3 STP160N75F3s paralleled
6%
6%
16%
18%
33%
21%
Transformer Losses
Inductor Losses
AM00628v1
2.1
Layout considerations
Because of the high power level involved with this design, the parasitic elements must be
reduced as much as possible. Proper operation of the push-pull converter can be assured
through geometrical symmetry of the PCB board. In fact, geometrical symmetry leads to
electrical symmetry, preventing a difference in the current values across the two primary
windings of the transformer which can be the cause of core saturation. The output stage of
the converter has also to be routed with a certain degree of symmetry even if in this case the
impact of unwanted parasitic elements is lower because of lower current values with respect
to the input stage. In Figure 8, Figure 9 and Figure 10, a symmetrical layout designed for the
application is shown.
20/39
AN2794
Design considerations
Figure 8.
Component placement
AM00629v1
Figure 9.
Top layer
AM00630v1
21/39
Design considerations
AN2794
AM00631v1
To obtain geometrical symmetry the HF transformer has been placed at the center of the
board, which has been developed using double-sided, 140 m FR-4 substrate with
135 x 185 mm size. In addition, this placement of the transformer is the most suitable since
it is the bulkiest part of the board. Both the primary and secondary AC current loops are
placed very close to the transformer in order to reduce their area and consequently their
parasitic inductances. For this reason the MOSFET and rectifier diodes lie at the edges of
the PCB. Input loop PCB traces show identical shapes to guarantee the same values of
resistance and parasitic inductance. Also the IGBTs of the inverter stage lie at one edge of
the board. This gives the advantage of using a single heat sink for each group of power
components. The output filter is placed on the right side of the transformer, between the
bridge rectifier and the inverter stage.
The power supply section lies on the left side of the transformer, simplifying the routing of
the 15 V bus dedicated to supply all the control circuitry.
22/39
AN2794
Schematic description
Schematic description
The schematic of the converter is shown in Figure 11. Three MOSFETs are paralleled in
order to transfer power to each primary winding of the transformer. Both RC and RCD
networks can be connected between the drain and source of the MOSFETs to reduce the
overvoltages and voltage ringing caused by unclamped leakage inductance. The output of
the transformer is rectified by a full bridge of ultrafast soft-recovery diodes. An RCD network
is connected across the rectifier output to clamp the diode voltage to its steady state value
and recover the reverse recovery energy stored in the leakage inductance. This energy is
first transferred to the clamp capacitor and then partially diverted to the output through a
resistor.
The IGBT full bridge is connected to the output of the push-pull stage. Their control signals
are generated by an SG3525 voltage mode PWM modulator. Its internal clock, necessary to
generate the 100 kHz modulation, is set by an external RC network. The PWM output stage
is capable of sourcing or sinking up to 100 mA which can be enough to directly drive the
gate of the MOSFETs devices. The PWM controller power dissipation, given by the sum of
its own power consumption and the power needed to drive six STP160N75F3s at 100 kHz,
can be evaluated with the following equation:
Equation 67
PContoller tot = 6Q g fVdrive + VsIs = 1.3W
23/39
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24/39
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Schematic description
AN2794
!-V
AN2794
Schematic description
25/39
Experimental results
AN2794
Experimental results
Typical voltage and current waveforms of the DC-AC converter and the efficiency curves of
the push-pull DC-DC stage, measured at different input voltages, are shown below. In
particular, Figure 12 and Figure 13 show both input and output characteristic waveforms of
the DC-DC converter both in light load and full load condition.
The HF transformer leakage inductance, which is about 1% of the magnetizing inductance,
is the cause of severe ringing across the input and the output power devices. MOSFETs
voltage and current waveforms with and without the connection of a snubber network are
shown in Figure 14 and 15, while Figure 16 and 17 show the effect of the RCD clamp circuit
connected across the rectifier bridge output. In Figure 18 the current and the voltage across
one of the three parallel-connected MOSFETs, powering each of the two windings of the
transformer are shown, while in Figure 19 it is possible to observe the variation of the
inverter output voltage and current together with the DC-DC converter bus voltage. In
Figure 20, 21, 22, 23 and 24, the efficiency curves of the push-pull converter measured with
an RL load are given. A maximum efficiency above 93% has been measured at nominal
input voltage and 640 W output power. The minimum value of efficiency has been tested
under low load and maximum input voltage. In Figure 25, the efficiency of the whole board is
shown. The efficiency tests have been carried out connecting an RL load at the inverter
output connectors, with 3 mH output inductor.
26/39
AN2794
Experimental results
27/39
Experimental results
AN2794
Efficiency
Efficiency
0.95
0.9
0.85
0.95
0.9
0.85
0.8
0.8
0
200
400
600
800
1000
1200
200
400
600
800
0.95
0.95
Efficiency
Efficiency
0.9
0.85
0.8
0.9
0.85
0.8
200
400
600
800
1000
1200
200
400
600
800
1000
1200
AM00638v1
28/39
1200
AM00637v1
AM00636v1
1000
AM00639v1
AN2794
Experimental results
92
Effciency %
Efficiency
93
0.95
0.9
0.85
0.8
91
90
89
88
0.75
0
200
400
600
800
1000
1200
87
0
200
400
600
800
1000
AM00640v1
AM00641v1
29/39
Conclusion
AN2794
Conclusion
The theoretical analysis, design and implementation of a DC-AC converter, consisting of a
push-pull DC-DC stage and a full-bridge inverter circuit, have been evaluated. Due to the
use of the parallel connection of three STP160N75F3 MOSFETs the converter shows good
performance in terms of efficiency. Moreover the use of an ST7lite39 8-bit microcontroller
allows achieving simple control of the IGBTs used to implement the DC-AC stage. Any
additional feature, such as regulation of the AC output voltage or protection requirements,
can simply be achieved with firmware development.
30/39
Bibliography
1.
2.
3.
4.
AN2794
Component list
Appendix A
Table 7.
Component list
Component
Part value
Description
Cs1
EPCOS
Cs2
EPCOS
C1
100 nF, 50 V
EPCOS
C2
100 nF, 50 V
EPCOS
C57
100 nF, 50 V
EPCOS
C59
100 nF, 50 V
EPCOS
C10
47 F, 35 V
C11
4.7 nF, 25 V
C12
100 F, 25 V
TDK
C14
47 F, 35 V
AVX
C16
100 pF, 25 V
C41
100 pF, 50 V
C17
680 nF, 25 V
C18
22 F, 25 V
Panasonic
C19
22 F, 25 V
Panasonic
C26
2.2 F, 25 V
EPCOS
C31
2.2 F, 25 V
EPCOS
C28
470 nF, 25 V
EPCOS
C33
470 nF, 25 V
EPCOS
C34
33 F, 450 V
EPCOS
C35
33 F, 450 V
EPCOS
C37
3900 F, 35 V
Rubycon
C38
3900 F, 35 V
Rubycon
C39
150 F, 35 V
C40
22 nF, 50 V
C42
100 F, 25 V
Panasonic
C51
100 F, 25 V
Panasonic
C52
100 F, 25 V
Panasonic
C53
2.2 F, 450 V
EPCOS
C54
EPCOS
C55
EPCOS
C56
470 nF, 50 V
EPCOS
Supplier
AVX
muRata
muRata
AVX
muRata
Panasonic
AVX
31/39
Component list
Table 7.
AN2794
Component
Part value
Description
Supplier
C58
0.33 F, 50 V
EPCOS
C60
150 nF, 50 V
muRata
D1
STTH8R06D
STMicroelectronics
D2
STTH8R06 D
STMicroelectronics
D3
STTH8R06 D
STMicroelectronics
D4
STTH8R06 D
STMicroelectronics
D13
STTH8R06 D
STMicroelectronics
D5
BAT46
STMicroelectronics
D6
BAT46
STMicroelectronics
D8
BAT46
STMicroelectronics
D7
BAT46
STMicroelectronics
D9
STTH1L06
STMicroelectronics
D10
STTH1L06
STMicroelectronics
D11
1N5821
STMicroelectronics
D12
1N5821
STMicroelectronics
VOUT AC 1
CON1
FASTON
RS components
VOUT AC 2
CON1
FASTON
RS components
VOUT -
CON1
FASTON
RS components
VOUT +
CON1
FASTON
RS components
VIN
CON1
FASTON
RS components
GND
CON1
FASTON
RS components
IC1
L6386D
STMicroelectronics
IC2
L6386D
STMicroelectronics
STMicroelectronics
STMicroelectronics
STMicroelectronics
STMicroelectronics
J1
CON10
L3
150 H, 3 A
L4(1)
1174.0018 ST04
M1
STP160N75F3
STMicroelectronics
M2
STP160N75F3
STMicroelectronics
M3
STP160N75F3
STMicroelectronics
32/39
Tyco Electronics
TDK
MAGNETICA
AN2794
Table 7.
Component list
Bill of material (BOM) (continued)
Component
Part value
M4
STP160N75F3
STMicroelectronics
M5
STP160N75F3
STMicroelectronics
M6
STP160N75F3
STMicroelectronics
Q8
STN4NF03L
STMicroelectronics
Q9
2SD882
STMicroelectronics
Q10
2SD882
STMicroelectronics
Q11
2SB772
STMicroelectronics
Q12
2SB772
STMicroelectronics
RGATE IGBT
LOW 1
100
BC components
RGATE IGBT
HIGH 1
100
BC components
RGATE IGBT
LOW 2
100
BC components
RGATE IGBT
HIGH 2
100
BC components
R7
390 k
BC components
R9
5.6 k
BC components
12
BC components
10
BC components
R81
22 k
T-Ohm
R82
3.3 k
T-Ohm
R83
39 k
T-Ohm
R87
10 k
R20
Description
Supplier
R21
R22
R23
R24
R25
R99
R100
R101
R102
R103
R104
BC components
33/39
Component list
Table 7.
Component
AN2794
Description
Supplier
R88
R89
R90
10 k
BC components
R93
1.5 k
BC components
R94
470
Meggit CGS
R95
470
Meggit CGS
10
T-Ohm
47 k
T-Ohm
R91
R92
R96
R97
R98
(2)
TX1
1356.0004 rev.01
Power transformer
MAGNETICA
U1
SG3525
STMicroelectronics
U16
L5973D
STMicroelectronics
U17
ST7FLITE39F2
STMicroelectronics
U20
L7805
124
HEAT SINK
Aavid Thermalloy
HEAT SINK
Aavid Thermalloy
125
126
D2PAK
34/39
STMicroelectronics
AN2794
Appendix B
TYPICAL APPLICATION
TECHNICAL DATA
SCHEMATIC
1.5mH 15%
0.52
max
800 VP MAX
OPERATING VOLTAGE
(F 100K HZ, IR 2.5A, TA 20C)
2.5 A MAX
OPERATING VOLTAGE
4.5 A NOM
SATURATION CURRENT
1MHZ NOM
(TA 20C)
-10C+45C
45X20 H46mm
78g CIRCA
DIMENSIONS
WEIGHT
INDUCTANCE VS CURRENT
INDUCTANCE VS FREQUENCY
250%
L/L(1kHz)
100%
200%
150%
100%
50%
10%
0%
0
I [A]
DIMENSIONAL DRAWING
200
400
600
800
1000
f [kHz]
20 max
45 max
12.7
2
30.48
46 max
3 min 1
10.16
1
DIMENSIONS IN MM, DRAWING NOT IN SCALE
1.2 (X4)
35/39
AN2794
Figure 27. Technical specification for 1 kW, 100 kHz switch mode power transformer
TX1 (produced by MAGNETICA)
T YPICAL APPLICATION
T ECHNICAL DATA
-
I NDUCTANCE
( MEASURE 1 K H Z , T A 20C)
SCHEMATIC
PIN
PIN
PIN
1
2
17.2 uH MIN
17.2 uH MIN
5.7 mH MIN
6 m MAX
6 m MAX
90 m MAX
IN CC
R ESISTANCE
13
( MEASURE D . C , T A 20C)
PIN
PIN
PIN
3
4
5
1,2 3,4,5
3,4,5 6,7
9 13 (10-12
12
10
1,2 3 , 4 , 5
3,4,5 6 , 7
9 13 (10-12
IN CC
TRANSFORMER RATIO
13 9 1,2 3,4,5
13 9 3,4,5 6,7
L EAKAGE I NDUCTANCE
6
7
AND
10-12
IN C . C , F
18 5%
18 5%
0.11 % NOM
10 K H Z , T A 20C)
OPERATING VOLTAGE
8 0 0 V P MAX
( MEASURE 13-9, 10-12 IN CC , F 100 K H Z , D UTY C YCLE 0.8,T A 20C)
OPERATING CURRENT
( MEASURE 13-9 WITH 1-2-3-4-5-6-7
P MAX 1 K W ,F 100 K H Z , T A 20C)
PRODUCT PICTURE
2 . 5 A MAX
IN CC
OPERATING FREQUENCY
100 K H Z NOM
-10C +45C
(P MAX 1 K W , T A 20C)
(P MAX 1 K W, F 100 K H Z )
INSULATION CLASS
( P MAX 1 K W, T A 20C )
2500V
2, T A 20C)
MAXIMUM DIMENSIONS
57X57H45 mm
W EIGHT
PIN (*)
1A
2A
3B
4B
5B
6C
7C
FUNCTION
36/39
PIN DESCRIPTION
PIN (*)
P RIMARY DRAIN A
P RIMARY DRAIN A
8
9
10 D
11
12D
13
14
P RIMARY +V B 24V
P RIMARY DRAIN B
P RIMARY DRAIN B
2 9 2 g CIRCA
ST BE CONNECTED TOGETHER ON
PCB
FUNCTION
NOT USED
SECONDARY GROUND
INTERMEDIARY
S ECONDARY ACCESS
S ECONDARY ACCESS
S ECONDARY 400V 2.5A
INTERMEDIARY
NOT USED
AN2794
56.5 max
1356.0004
SMT 1kW 100kHz
MAGNETICA
08149
1.4
14 13 12 4 10 9 8
55.5 max
7
3 min
40
5
8
MISSING PIN
REFERENCE AS PCB ASSEMBLING
14
BOTTOM VIEW
( PIN SIDE )
37/39
Revision history
AN2794
Revision history
Table 8.
38/39
Date
Revision
Changes
16-Feb-2009
Initial release
13-Jan-2012
Introduction modified
Section 3 modified
AN2794
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39/39