Chapter 8

8
Transistor Characteristics and Circuits

In this chapter, the characteristics of bipolar junction transistors and metal
oxide semiconductor field effect transistors are discussed. The sensitivity of
the transistor biasing circuits is explored through PSPICE simulations and
MATLAB calculations. Frequency response of amplifiers and feedback
amplifiers are also discussed.
8.1Characteristics of Bipolar Junction Transistors

Bipolar junction transistor (BJT) consists of two pn junctions connected backto-back. The operation of the BJT depends on the flow of both majority and
minority carriers. The DC behavior of the BJT can be described by the EbersMoll model. The voltages of the base-emitter and base-collector junctions
define the region of operation of the BJT. The regions of normal operation
are forward-active, reverse-active, saturation, and cut-off. Table 8.1 shows the
regions of operation based on the polarities of the base-emitter and basecollector junctions.
The forward-active region corresponds to forward biasing, the emitterbase junction and reverse biasing the base-collector junction. It is the normal
operation region of BJT when employed for amplifications. In the forwardactive region, the first order representation of collector current IC and base
current IB are given as:

V
V
IC = IS exp BE 1 + CE
VT
VAF
(8.1)
and

IB =
IS
V
exp BE
VT
F
(8.2)
where
F is large signal forward current gain of common-emitter configuration;
VAF is forward early voltage;
IS is the BJT transport saturation current; and
V T is the thermal voltage and is given as:
297
298
PSPICE and MATLAB for Electronics: An Integrated Approach
TABLE 8.1
Regions of Operation of BJT
Base-Emitter Junction
Downloaded by [Louisiana State University] at 18:06 23 April 2016
Forward bias
Forward-bias
Reverse-bias
Base-Collector Junction
Region of Operation
Reverse-bias
Forward-bias
Reverse-bias
Forward-active
Saturation
Cut-off
VT =
kT

q
(8.3)
where
k is the Boltzmanns Constant (k=1.3811023 VC/K);
T is the absolute temperature in degrees Kelvin; and
q is the charge of an electron (q=1.6021019 C).
If VAF>>VCE, then from Equations 8.1 and 8.2, we have:
IC = F I B
(8.4)
The saturation region corresponds to forward biasing both base-emitter

and base-collector junctions. The cut-off region corresponds to reverse biasing the base-emitter and base-collector junctions. In the cut-off region, the
collector and base currents are insignificant compared to those that flow
when transistors are in the active-forward and saturation regions.
From Equation 8.2, the input characteristic of a forward biased baseemitter junction is similar to diode characteristics. In the following example,
we explore the output characteristics of a BJT transistor.
Example 8.1: BJT Output Characteristics
Figure 8.1 shows an arrangement that can be used to find the output characteristics
of transistor Q2N2222.
(i) Draw IC versus VCE for IB=2 A, 4 A, and 6 A.
(ii) Calculate the output resistance (rCE) as a function of VCE for IB=2 A.
Assume that R1=R2=R3=1 .
Solution
PSPICE is used to obtain the data needed to obtain the current versus voltage
characteristics of transistor Q2N2222. MATLAB is used to plot the output characteristics and also to calculate the output resistance.
299
4
R1
Q1
3
IB
R3
VCC
R2
0
FIGURE 8.1
Circuit for obtaining BJT output characteristics.
PSPICE Program
BJT CHARACTERISTICS
VCC 5 0
DC 0V
R1 1 2
1
R2 3 0
1
R3 5 4
1
IB 0 1
DC 6UA
Q1 4 2
3
Q2N2222
.MODEL Q2N2222 NPN(BF = 100 IS = 3.295E-14 VA = 200);
TRANSISTOR MODEL
** ANALYSIS TO BE DONE
** VARY VCE FROM 0 TO 10V IN STEPS 0.1V
** VARY IB FROM 2 TO 6mA IN STEPS OF 2mA
.DC VCC 0V 10V .05V IB 2U 6U 2U
.PRINT DC V(4,3) I(R1) I(R3)
.PROBE V(4,3) I(R3)
.END
PSPICE partial results for base current of 2 A are shown in Table 8.2. The complete results can be found in file ex8_1aps.dat, ex8_1bps.dat, and ex8_1cps.dat for
base current of 2 A, 4 A, and 6 A, respectively.
MATLAB is used to plot the output characteristics.
MATLAB Script
% Load data
load ex8_1aps.dat -ascii;
load ex8_1bps.dat -ascii;
load ex8_1cps.dat -ascii;
vce1 = ex8_1aps(:,2);
ic1 = ex8_1aps(:,4);
vce2 = ex8_1bps(:,2);
ic2 = ex8_1bps(:,4);
300
vce3=ex8_1cps(:,2);
ic3=ex8_1cps(:,4);
plot(vce1, ic1, vce2, ic2, vce3, ic3)
xlabel(Collector-emitter Voltage, V)
ylabel(Collector Current, A)
title(Output Characteristics)
TABLE 8.2
Output Characteristics of Transistor Q2N2222
VCE, V
IC, A
4.996E01
1.050E+00
2.000E+00
3.000E+00
4.000E+00
5.000E+00
6.000E+00
7.000E+00
8.000E+00
9.000E+00
1.000E+01
1.999E04
2.005E04
2.014E04
2.024E04
2.034E04
2.044E04
2.054E04
2.064E04
2.074E04
2.084E04
2.094E04
Output characteristics
104
6
Collector current, A
The output characteristics are shown in Figure 8.2. The output resistance rCE as a
function of VCE is obtained using MATLAB.
IB = 6 A
5
4
IB = 4 A
3
2
IB = 2 A
1
0
4
6
Collector-emitter voltage, V
FIGURE 8.2
IC versus VCE of transistor Q2N2222.
10
301
12
105
Output resistance
10
8
6
4
2
0
0
4
6
8
Collector-emitter voltage
10
FIGURE 8.3
Output resistance as a function of collector-emitter voltage for Q2N2222 when base current
is 2 A.
MATLAB Script
% Load data
vce = ex8_1aps(:,2);
ic = ex8_1aps(:,4);
m = length(vce);
% size of vector vce
% calculate output resistance
for i = 2:m-1
rce(i) = (vce(i + 1)-vce(i-1))/(ic(i + 1)- ic(i - 1));
% output resistance
end
rce(1) = rce(2);
rce(m) = rce(m-1);
plot(vce(2:m-1), rce(2:m-1))
xlabel(Collector-emitter Voltage)
ylabel(Output Resistance)
title(Output Resistance as a function of Collector-emitter
Voltage)
The plot of the output resistance is shown in Figure 8.3.
8.2 MOSFET Characteristics

Metal-oxide semiconductor field effect transistors (MOSFET) normally
have high input resistance because of the oxide insulation between the gate
and the channel. There are two types of MOSFETS: the enhancement type
302
and the depletion type. In the enhancement type, the channel between the
source and drain has to be induced by applying a voltage at the gate. In
the depletion type MOSFET, the structure of the device is such that there
exists a channel between the source and drain. Since the enhancement type
MOSFET is widely used, the presentation of this section will be done using
enhancement-type MOSFET.
The voltage needed to create the channel between the source and drain
is called the threshold voltage V T. For n-channel enhancement MOSFET, V T
is positive and for p-channel device, it is negative. MOSFETS can operate in
three modes: cutoff, triode, and saturation regions. The following is a short
description of the three regions of operation.
8.2.1 Cut-Off Region
For an n-channel MOSFET, if the gate-source voltage VGS satisfies the
condition:
VGS < VT
(8.5)
then the device is cut-off. This implies that the drain current is zero for all
values of the drain-to-source voltage.
8.2.2 Triode Region
When VGS>V T and VDS is small, the MOSFET will be in the triode region. In
the latter region, the device behaves as nonlinear voltage-controlled resistance. The drain current ID is related to drain source voltage VDS by:

2 ] 1 + V
I D = kn [2 (VGS VT )VDS VDS
(
DS )
(8.6)
VDS VGS VT
(8.7)
provided

where

kn =
n OX W nCOX W
=

2tOX L
2 L
and
n is the surface mobility of electrons;
is the permitivity of free space (8.851012 F/cm);
OX is the dielectric constant of SiO2;
tOX is oxide thickness;
L is length of the channel;
W is width of the channel; and
is channel width modulation factor.
(8.8)
303
8.2.3 Saturation Region

If VGS>V T, a MOSFET will operate in the saturation region provided:
VDS VGS VT
(8.9)
In the saturation region, the current-voltage characteristics are given as:

I D = kn (VGS VT ) ( 1 + VDS )
2
(8.10)
The transconductance is given as:

gm =
I D

VGS
(8.11)
and the incremented drain-to-source resistance, rCE is given as,

rCE =
VDS

I DS
(8.12)
In the following example, we shall obtain the ID versus VGS characteristics of

a MOSFET.
Example 8.2: Current versus Voltage Characteristics of a MOSFET
Figure 8.4 shows an arrangement for obtaining the ID versus VGS characteristics of
a MOSFET. (a) Draw ID versus VGS curve, (b) Obtain the transconductance versus
VGS. Assume that M1 is M2N4351.
Solution
PSPICE simulation is used to obtain the corresponding current versus voltage values of the MOSFET.
R1
+
VDS
M1
1
VGS
FIGURE 8.4
Circuit for obtaining MOSFET characteristics.
304
TABLE 8.3
ID versus VGS of MOSFET M2N4351
VGS, V
ID, A
0.000E+00
5.000E01
1.000E+00
1.500E+00
2.000E+00
2.500E+00
3.000E+00
3.500E+00
4.000E+00
4.500E+00
5.000E+00
5.010E12
5.010E12
5.010E12
5.010E12
5.010E12
2.555E05
2.183E04
6.001E04
1.171E03
1.931E03
2.879E03
PSPICE Program
* ID VERSUS VGS CHARACTERISTICS OF A MOSFET
VDS
3
0
DC
5V
R1
3
2
1
VGS
1
0
DC
2V;
THIS IS AN ARBITRARY
VALUE, VGS WILL BE SWEPT
M1 2 1 0 0 M2N4531; NMOS MODEL
.MODEL M2N4531 NMOS(KP=125U VTO=2.24 L=10U W=59U
LAMBDA=5M)
.DC
VGS
0V
** OUTPUT COMMANDS
.PRINT DC I(R1)
.PROBE V(1) I(R1)
.END
5V
0.05V
Partial results of the PSPICE simulation are shown in Table 8.3. The complete
results can be found in file ex8_2ps.dat.
MATLAB was used to plot ID versus VGS of the MOSFET. In addition, the
transconductance versus VGS is obtained using MATLAB.
MATLAB Script
% Load pspice data
load ex8_2ps.dat -ascii;
vgs=ex8_2ps(:,1);
ids=ex8_2ps(:,2);
m=length(vgs);
% size of vector vgs
% Plot Ids versus VGS
subplot(211)
plot(vgs, ids)
ylabel(Drain Current, A)
title(Input Characteristics of a MOSFET )
305
Drain current, A
Transconductance, AN
Input characteristics of a MOSFET
2
1
0
103
2.5
0
103
Transconductance versus gate-source voltage
2
1.5
1
0.5
0
2
3
Gate-to-source voltage, V
FIGURE 8.5
(a) ID versus VGS. (b) gm versus VGS of MOSFET M2N4351.
% Calculate transconductance
for i = 2:m - 1;
gm(i) = (ids(i = 1) - ids(i-1))/(vgs(i + 1) - vgs(i-1)); %
transconductance
end
gm(1) = gm(2);
gm(m) = gm(m - 1);
% Plot transconductance
subplot(212);
plot(vgs(2:m - 1), gm(2:m - 1))
xlabel(Gate-to-Source Voltage, V)
ylabel(Transconductance, A/V)
title(Transconductance versus Gate-source Voltage)
The plots are shown in Figure 8.5.
8.3 Biasing of BJT Circuits

Biasing networks are used to establish an appropriate DC operating point for
transistor in a circuit. For stable and consistent operation, the DC operating
point should be held relatively constant under varying conditions. There are
several biasing circuits available in the literature. Some are for biasing discrete circuits and others for integrated circuits (ICs). Figures 8.6 and 8.7 show
some biasing networks for discrete circuits.
306
VCC
4
RC
IC
RB1
Q1
2
RB2
RE
0
FIGURE 8.6
Biasing circuit for BJT discrete circuits with two base resistors.
VCC
RB
3
1
2
RE
0
FIGURE 8.7
Biasing BJT discrete network with one base resistor.
Biasing networks for discrete circuits are not suitable for ICs because of the
large number of resistors and large coupling and bypass capacitors required
for biasing discrete electronic circuits. It is uneconomical to fabricate large
IC resistors since they take a disproportionably large area on an IC chip.
For ICs, biasing is done using mostly transistors that are connected to create
constant current sources. Some biasing circuits for ICs are shown in Figures
8.8 through 8.10.
For the bias network for discrete circuits, shown in Figure 8.6, it can be
shown that:

IC =
VBB VBE

RB ( F + 1)
+
RE
F
F
(8.13)
307
VCC
I0
RC
Q2
Q1
FIGURE 8.8
Simple current mirror for IC biasing.
VCC
I0
RC
Q1
Q2
RE
FIGURE 8.9
Widlar current source.
VCC
RC
I0
Q3
Q1
Q2
RE
FIGURE 8.10
Wilson current source.
308
and
R
VCE = VCC IC RC + E
(8.14)
where
VCC RB 2

RB1 + RB 2
VBB =
RB = RB1 // RB 2 =
F =
RB1RB 2

RB1 + RB 2
F

F + 1
(8.15)
(8.16)
(8.17)
F is a large signal forward current gain of common-emitter configuration.

For the simple current mirror circuit, shown in Figure 8.8, it can also be
shown that:
F

I0 =
IR
(8.18)
F + 2
where
V VBE

I R = CC

(8.19)
RC
Equation 8.13 gives the parameters that influence the bias current, IC. By
using stabilized voltage supply, we can ignore changes in VCC and hence
VBB. The changes in resistances RB and RE are negligible. However, there is a
variation of F with respect to changes in IC. In addition, there is variation of
F of a specified transistor when selected from different lots or fabricated by
different manufacturers.
DC stability of circuit when components vary can be investigated through
a DC sensitivity analysis. The PSPICE command for performing sensitivity
analysis is .SENS statement, which was discussed in Chapter 2. As mentioned
in Chapter 2, .SENS statement allows PSPICE to compute the derivatives of
pre-selected variables of the circuit to most of the components in the circuit.
The following example explores the sensitivity of the bias point to components of a biasing network.
Example 8.3: Sensitivity of Collector Current to Amplifier Components
For the common-emitter biasing network, shown in Figure 8.6, VCC=10 V, RB1=
40K, RB2=10 K, RE=1 K, RC=6 K, and Q1 is Q2N2222. (a) Find the sensiti
vity of the collector current to amplifier components. (b) Two other Q2N2222
transistors are picked from a lot and they have F of 125 and 150. What is the
change in IC with respect to F. Use the following model for transistor Q2N2222:

.MODEL Q2N2222 NPN(BF=100 IS=3.295E14 VA=200)
309
Solution
The bias sensitivity is obtained for QN2222 when F=100.
PSPICE Program
* SENSITIVITY OF COLLECTOR CURRENT TO AMPLIFIER COMPONENT
VCC 4 0 DC 10V
RB1 4 1 40K
RB2 1 0 10K
RE 2 0 1K
RC 5 3 6K
VM 4 5 DC 0; MONITOR COLLECTOR CURRENT
Q1 3 1 2
Q2N2222
.MODEL Q2N2222 NPN(BF = 100 IS = 3.295E-14 VA = 200)
* ANALYSIS TO BE DONE
.SENS I(VM)
.END
The following edited results are obtained from the PSPICE simulation.
VOLTAGE SOURCE CURRENTS

NAME CURRENT

VCC
VM
-1.460E-03
1.257E-03
DC SENSITIVITIES OF OUTPUT I(VM)

ELEMENT ELEMENT

NAME
VALUE

ELEMENT
SENSITIVITY
(AMPS/UNIT)
NORMALIZED
SENSITIVITY
(AMPS/PERCENT)

Q1

RB1
RB2
RE
RC
VCC
VM
4.000E+04
1.000E+04
1.000E+03
6.000E+03
1.000E+01
0.000E+00
-3.632E-08
1.363E-07
-1.139E-06
-7.796E-10
1.800E-04
-6.202E-07
-1.453E-05
1.363E-05
-1.139E-05
-4.678E-08
1.800E-05
0.000E+00
RB
RC
RE
BF
ISE
BR
ISC
IS
NE
NC
IKF
IKR
VAF
VAR
0.000E+00
0.000E+00
0.000E+00
1.000E+02
0.000E+00
1.000E+00
0.000E+00
3.295E-14
1.500E+00
2.000E+00
0.000E+00
0.000E+00
2.000E+02
0.000E+00
0.000E+00
0.000E+00
0.000E+00
1.012E-06
0.000E+00
-2.692E-13
0.000E+00
7.044E+08
0.000E+00
0.000E+00
0.000E+00
0.000E+00
-1.730E-09
0.000E+00
0.000E+00
0.000E+00
0.000E+00
1.012E-06
0.000E+00
-2.692E-15
0.000E+00
2.321E-07
0.000E+00
0.000E+00
0.000E+00
0.000E+00
-3.460E-09
0.000E+00
310
TABLE 8.4
IC Versus F
F
100
125
150
IC
1.257 mA
1.278 mA
1.292 mA
The above simulation is performed with two values of F, 125 and 150. Table 8.4
shows IC versus F. It can be seen from Table 8.4 that as F increases, IC increases.
8.3.1 Temperature Effects

Temperature changes cause two transistor parameters to change. These are
(1) base-emitter voltage (VBE) and (2) collector leakage current between the
base and collector (ICBO). For silicon transistors, the voltage VBE varies almost
linearly with temperature as:
VBE 2 (T2 T1 ) mV
(8.20)
where
T1 and T2 are temperatures in degrees Celsius.
The collector-to-base leakage current, ICBO, approximately doubles every
10C temperature rise. From Equations 8.13, 8.18, and 8.19, both IC and IO are
dependent on VBE. Thus, the bias currents are temperature dependent. The
following example explores the sensitivity of the collector current to temperature variation.
Example 8.4: Sensitivity to Temperature of
Common-Collector Amplifier
In Figure 8.7, RB=40 K, RE=2 K, Q1 is Q2N3904, and VCC=10 V. Assume a
linear dependence of resistance RB and RE on temperature and TC1=1000 ppm/C.
Determine the emitter current as a function of temperature (0C to 100C).
Solution
PSPICE .DC TEMP command will be used to sweep temperature from 0C to
100C in steps of 10C. The changes in resistance due to temperature are calculated by SPICE using the equation:

2
R[T2 ] = R (T1) 1+ TC1(T2 T1) + TC 2(T2 T1)
where
T1=27C;
T2 is the required temperature; and
TC1 and TC2 are included in the model statement of resistors.
(8.21)
311
PSPICE Program
EMITTER CURRENT DEPENDENCE ON TEMPERATURE
VCC 3 0 DC
10V
RB
3 1 RMOD3 40K; RB IS MODELED
RE
2 0 RMOD3 2K; RE IS MODELED
.MODEL RMOD3 RES(R=1 TC1=1000U TC2=0); TEMP MODEL OF
RESISTORS
Q1
3 1 2
Q2N3904;
TRANSISTOR CONNECTIONS
.MODEL Q2N3904 NPN(IS=1.05E-15 ISE=4.12N NE=4 ISC=4.12N
NC=4 BF=220
+ IKF=2E-1 VAF=80 CJC=4.32P CJE=5.27P RB=5 RE=0.5 RC=1
TF=0.617N
+ TR=200N KF=1E-15 AF=1)
* ANALYSIS TO BE DONE
.DC TEMP 0 100 5;
VARY TEMP FROM 0 TO 100 IN STEPS OF 5
.PRINT DC I(RE)
.END
Table 8.5 shows PSPICE partial results. The complete data can be found in file
ex8_4ps.dat. MATLAB is used to plot the PSPICE results.
MATLAB Script
% Load data
temp = ex8_4ps(:,1);
ie = ex8_4ps(:,2);
% plot ie versus temp
plot(temp, ie, temp, ie, ob)
xlabel(Temperature, C)
ylabel(Emitter Current, A)
title(Variation of Emitter Current with Temperature)
The plot is shown in Figure 8.11.

TABLE 8.5
Temperature versus Emitter Current
Temperature, C
0.000E+00
1.000E+01
2.000E+01
3.000E+01
4.000E+01
5.000E+01
6.000E+01
7.000E+01
8.000E+01
Emitter Current, A
4.230E03
4.193E03
4.156E03
4.121E03
4.086E03
4.053E03
4.019E03
3.987E03
3.955E03
9.000E+01
3.924E03
1.000E+02
3.894E03
312
4.3
103
4.25
Emitter current, A
4.2
4.15
4.1
4.05
4
3.95
3.9
3.85
20
40
60
Temperature, C
80
100
FIGURE 8.11
Emitter current as a function of temperature.
8.4 MOSFET Bias Circuit

There are several circuits that can be used to bias MOSFETS at a stable operating point such that the bias point does not change significantly with changes
in the MOSFETS parameters. Some biasing circuits for MOSFETS discrete
circuits are shown in Figures 8.12 through 8.14.
In Figure 8.12, it can be shown:

VGS =
RG1
VDD I DRS
RG1 + RG 2
(8.22)
and

VDS = VDD I D ( RD + RS )
(8.23)
For integrated circuit MOSFET, constant current sources are used for biasing. A basic MOSFET current source is shown in Figure 8.15. For Figure 8.15,
it can be shown that I0 is related to IREF through the expression:

I0 =
( W / L )2
I
(W / L)1 REF
(8.24)
313
VDD
4
ID
RG1
VG
M1
2
RG2
RD
RS
0
FIGURE 8.12
Biasing circuit for MOSFET using fixed gate voltage and self-bias resistors, RS.
VDD
4
RD
3
1
2
RG
RS
0
VSS
FIGURE 8.13
MOSFET biasing circuit using two power supplies.
VDD
RD
2
ID
RG
IG
1
0
FIGURE 8.14
Biasing MOSFET circuit with resistance feedback using resistor, RG.
314
VDD
IREF
IO
M1
M2
FIGURE 8.15
Basic MOSFET current source.
and
I REF =
VDD VGS

R
(8.25)
where
(W/L)2 is ratio of width to length of transistor Q2; and
(W/L)1 is ratio of width to length of transistor Q1.
Thus, the current I0 depends on the transistor sizing. The follow example explores the changes in the drain current as the source resistor is
changed.
Example 8.5: Effect of Source Resistance on MOSFET Operating Point
For the MOSFET biasing circuit, shown in Figure 8.12, VDD=10 V, RG1=RG2=9
M, and RD=8 K. Find drain current when R S is varied from 5 K to 10 K in
steps of 1 K. Assume that M1 is M2N4351.
Solution
PSPICE is used to obtain the drain current as source current is varied. The .STEP
command will be used to vary the source resistance.
PSPICE Program
MOSFET BIAS CIRCUIT
VDD 4 0 DC
10V; SOURCE VOLTAGE
RG1 4 1 9.0E6;
RG2 1 0 9.0E6;
RD 4 3 8.0E3
M1 3 1 2 2 M2N4351; NMOS MODEL
RS 2 0 RMOD3 1
.MODEL RMOD3 RES(R=1)
315
.STEP
TO 10K
.MODEL
LAMBDA
.DC
.PRINT
.END
RES
RMOD3 (R) 5000 10000 1000; VARY RS FROM 5K
M2N4351 NMOS (KP = 125U VTO = 2.24 L = 10U W = 59U

= 5M)
VDD 10 10 1
DC
I(RD) V(3,2)
Table 8.6 shows the drain current for various values of source resistance. The data
can also be found in file ex8_5ps.dat.
MATLAB is used to plot ID versus R S.
MATLAB Script
% Load data
rs = ex8_5ps(:,1);
id = ex8_5ps(:,2);
plot(rs,id)
xlabel(Source Resistance)
ylabel(Drain Current)
title(Source Resistance versus Drain Current)
Figure 8.16 shows the drain current as a function of source resistance. Figure 8.16
shows that as the source resistance increases, the drain current reduces. The following example explores the worst-case bias point with device tolerance.
Example 8.6: Worst-Case Drain Current of a MOSFET Biasing Circuit

For the MOSFET biasing circuit shown in Figure 8.13, VDD=5 V, VSS=5 V, RG=
10 M, and R S=RD=4 K. Determine the worst-case bias current when the
tolerances of the resistors are 1%, 2%, 5%, 10%, and 15%, respectively. Assume
that M1 is M2N4351.
Solution
PSPICE .WCASE command is used to perform the worst-case analysis.
TABLE 8.6
Drain Current versus Source Resistance
Source Resistance RS
5000
6000
7000
8000
9000
10K
Drain Current ID
3.576E04
3.094E04
2.731E04
2.447E04
2.218E04
2.030E04
316
3.6
104
3.4
Drain current, A
3.2
3
2.8
2.6
2.4
2.2
2
5000
6000
7000
8000
Source resistance,
9000
10000
FIGURE 8.16
Drain current versus source resistance.
PSPICE Program
* MOSFET BIASING CIRCUIT
.OPTIONS RELTOL=0.01; 1% COMPONENT TOLERANCE,
* CHANGED FOR DIFFERENT TOLERANCE VALUES
VSS 5 0 DC
-5V
VDD 4 0 DC
5V
RG
1 0 RMOD 10.0E6
RS
2 5 RMOD 4.0E3
RD
4 3 RMOD 4.0E3
.MODEL RMOD RES(R=1 DEV=1%); 1% RESISTOR TOLERANCE.
* CHANGE FOR DIFFERENT TOLERANCE VALUES
M1 3 1 2 2 M2N4351
.MODEL M2N4351 NMOS (KP=125U VTO=2.24 L=10U W=59U
LAMBDA=5M)
.DC VDD
5
5
1
.WCASE DC I(RD) MAX OUTPUT ALL;
WORST CASE ANALYSIS
.END
To obtain results for the 2% component tolerance, the relevant two statements
in the above PSPICE Program are changed to:

.OPTION RELTOL=0.02; 2% component tolerance
.MODEL RMOD RES(R=1 DEV=2%).
317
TABLE 8.7
Device Tolerance versus Worst-Case Drain Current
Device Tolerance in
Percent
0
1
2
5
10
15
Worst-Case (All Devices)

Drain Current, A
425.71E06
428.98E06
432.31E06
442.62E06
460.73E06
480.81E06
The above statements are appropriately changed for 5%, 10%, and 15% component tolerance.
Table 8.7 shows the worst-case (all devices) drain current versus component
tolerance in percent. The data can be found in file ex8_6ps.dat. MATLAB is used
to plot the data in Table 8.7.
MATLAB Script
% Load data
tol = ex8_6ps(:,1);
id_wc = ex8_6ps(:,2);
% plot data
plot(tol, id_wc, tol,id_wc,ob)
xlabel(Device Tolerance, %)
ylabel(Worst-case Drain Current, A)
title(Worst-case Drain Current as a Function of Device
Tolerance)
The plot is shown in Figure 8.17. Figure 8.17 shows that the worst-case drain current increases as the device tolerance increases.
8.5 Frequency Response of Transistor Amplifiers

Amplifiers are normally used for voltage amplification, current amplification,
impedance matching, or isolation between stages. Transistor amplifiers can
be built using BJT and/or field effect transistors. Amplifiers built using BJT
can be common-emitter, common collector (emitter follower), or commonbase amplifier. Common-emitter amplifiers have relatively high voltage gain.
A common-collector amplifier has relatively high input resistance, low output resistance with voltage gain that is almost equal to unity. Common-drain
318
4.9
104
Worstcase drain current as a function

of device tolerance
Worstcase drain current, A
4.8
4.7
4.6
4.5
4.4
4.3
4.2
5
10
Device tolerance, %
15
FIGURE 8.17
Device tolerance versus worst case drain current.
VCC
7
RC
RB1
CC2
5
CC1
RS
1
VS
+
Q1
3
RB2
4
RE
RL
V0
CE
0
FIGURE 8.18
Common-emitter amplifier.
amplifiers have relatively low input resistance. FET amplifiers can be common-source, common-drain, or common-drain common-gate amplifier.
A common-emitter amplifier is shown in Figure 8.18. The amplifier is
capable of generating a relatively high current and voltage gains. The
input resistance is medium and is essentially independent of the load
resistance RL.
319
VDD
7
RG1
RD
5
R1
2 CC1
CC2
M1
4
VS
RG2
RS
RL
CS
V0
0
FIGURE 8.19
Common-source amplifier.
The coupling capacitor, CC1, couples the voltage source, VS, to the bias network. Coupling capacitor, CC2, connects the collector resistance, RC, to the load
RL. The bypass capacitance, CE, is used to increase the midband gain, since
it effectively short circuits the emitter resistance RE at midband frequencies.
The resistance RE is needed for bias stability. The external capacitors CC1, CC2,
and CE, will influence the low frequency response of the common emitter
amplifier. The transistor internal capacitances of the transistor will control
the high frequency cut-off.
The common-source amplifier, shown in Figure 8.19, has characteristics
similar to those of the common-emitter amplifier. However, the commonsource amplifier has higher input resistance than that of the common-emitter
amplifier.
The external capacitors CC1, CC2, and CS, will influence the low frequency
response. The internal capacitances of the FET will affect the high frequency response. In the following example, the gain and bandwidth, as
a function of power supply voltage, of the common-source amplifiers
areexplored.
Example 8.7: Common-Source Amplifier Characteristics
In the common-source amplifier, shown in Figure 8.19, CC1=CC2=0.05 F,
CS=1000 F, RD=6 K, RL=10 K, RS=2 K, R1=50 , RG1=10 M, and
RG2=10 M. The MOSFET is IRF15O. Determine the midband gain, low cutoff
frequency, and bandwidth as the power supply VDD varies from 6 V to 10 V.
Solution
PSPICE is used to obtain the frequency response as the power supply is varied.
The PSPICE command .STEP will be used to vary the power supply voltage.
320
PSPICE Program
* COMMON-SOURCE AMPLIFIER
VDD
7
0
DC 8V
.STEP VDD 6
10 1
R1
1
2
50
CC1
2
3
0.05UF
RG2
3
0
10MEG
RG1
7
3
10MEG
RS
4
0
2K
CS
4
0
1000UF
RD
7
5
6K
VS
1
0
AC 1MV
CC2
5
6
0.05UF
RL
6
0
10K
M1
5
3
4
4
IRF150
.LIB NOM.LIB;
* IRF 150 MODEL IN PSPICE LIBRARY FILE NOM.LIB
* AC ANALYSIS
.AC
DEC 20 10 10MEGHZ
.PRINT AC VM(6)
.PROBE V(6)
.END
PSPICE results for supply voltages of 6 V, 7 V, 8 V, 9 V, and 10 V are stored

in files ex8_7aps.dat, ex8_7bps.dat, ex8_7cps.dat, ex8_7dps.dat, and ex8_7eps.
dat, respectively. MATLAB is used to analyze the PSPICE results and to plot the
frequency response.
MATLAB Script
% Load data
load ex8_7bps.dat -ascii;
load ex8_7cps.dat -ascii;
load ex8_7dps.dat -ascii;
load ex8_7eps.dat -ascii;
%
fre=ex8_7aps(:,1);
vo_6V=1000*ex8_7aps(:,2);
vo_7V=1000*ex8_7bps(:,2);
vo_8V=1000*ex8_7cps(:,2);
vo_9V=1000*ex8_7dps(:,2);
vo_10V=1000*ex8_7eps(:,2);
% Determine center frequency
[vc1, k1]=max(vo_6V)
%
fc(1) = fre(k1);
% center frequency for VDD = 6V
fc(2) = fre(k2);
fc(3) = fre(k3);
fc(4) = fre(k4);
fc(5) = fre(k5);
% Calculate the cut-off frequencies
vgc1 = 0.707*vc1;
% Gain at cut-off for VDD = 6V
vgc2 = 0.707*vc2;
vgc3 = 0.707*vc3;
vgc4 = 0.707*vc4;
vgc5 = 0.707*vc5;
%
tol=1.0e-5; % tolerance for obtaining cut-off
%
l1 = k1;
while(vo_6V(l1) - vgc1)>tol

l1 = l1+1;
end
fhi(1) = fre(l1);
% high cut-off frequency for VDD = 6V
l1 = k1

l1 = l1 - 1;
end
flow(1)=fre(l1); % Low cut-off frequency for VDD=6V
%
l2=k2;

l2=l2+1;
end
fhi(2)=fre(l2);
% high cut-off frequency for VDD=7V
l2=k2;

l2=l2 - 1;
end
flow(2)=fre(l2); % Low cut-off frequency for VDD=7V
%
l3=k3;
while(vo_8V(l3) - vgc3)>tol;

l3=l3+1;
end
fhi(3)=fre(l3);
% High cut-off frequency for VDD=8V
l3=k3

l3=l3 - 1;
end
flow(3)=fre(l3); %low cut-off frequency for VDD=8V
%
l4=k4;

l4=l4+1;
end
321
322
fhi(4)=fre(l4);
l4=k4

l4=l4 - 1;
end
%
l5=k5;

l5=l5+1;
end
fhi(5)=fre(l5);
l5=k5

l5=l5 - 1;
end
%
% Calculate the Quality Factor
for i=1:5
bw(i)=fhi(i)-flow(i);
Qfactor(i)=fc(i)/bw(i);
end
%midband gain
gain_mb=[vc1 vc2 vc3 vc4 vc5];
% Print out results
% Gain Center frequency, high cut-off freq, low cut-off
freq and Q factor are
gain_mb
flow
bw
Qfactor
% plot frequency response
plot(fre,vo_6V, fre,vo_7V, fre, vo_8V,fre,vo_9V,fre,vo_10V)
xlabel(Frequency, Hz)
ylabel(Gain)
title(Frequency Response of a Common-source Amplifier)
The gain, low cut-off frequency, and bandwidth are shown in Figure 8.20.
Table 8.8 shows the results obtained from MATLAB. Table 8.8 shows that as
the supply voltage increases, the midband gain and the low cut-off frequency
increase.
Example 8.8: Input Resistance of Emitter Follower

Figure 8.21 shows an emitter follower circuit. RS=100 , RB1=80 K, VCC=
15 V, and C1=5 F. If RE changes from 500 to 2000 , determine the input resistance as a function of emitter resistance RE. In addition, determine the changes in
the collector-emitter voltage as RE varies. Assume that Q1 is Q2N2222.
323
80
Frequency response of a commonsource amplifier

VDD = 10 V
VDD = 9 V
70
60
VDD = 7V
Gain
50
40
VDD = 6V
30
VDD = 8 V
20
10
0 1
10
102
103
104
105
Frequency, Hz
106
107
FIGURE 8.20
Frequency response of a common-source amplifier as different supply voltages.
VCC
5
RB1
RS
1
C1
2
VS
Q1
4
RE
+
VL
0
FIGURE 8.21
Emitter follower circuit.
TABLE 8.8
Gain, Low Cut-Off Frequency and Bandwidth as a Function of Supply Voltage
Supply
Voltage, V
6
7
8
9
10
Midband Gain
Low Cut-Off
Frequency,Hz
Bandwidth, Hz
41.29
59.84
66.40
70.21
72.79
223.9
251.2
251.2
251.2
281.8
3.5256E+04
3.9559E+04
3.9559E+04
3.9559E+04
3.5198E+04
324
Solution
The .STEP statement is used to vary the emitter resistance RE in the PSPICE
program.
PSPICE Program
* INPUT RESISTANCE OF AN EMITTER FOLLOWER
VS
1
0
AC
10E-3
VCC
5
0
DC
15V
RS
1
2
100
C1
2
3
5UF
RB
5
3
80K
RE
4
0
RMOD4 1
.MODEL RMOD4 RES(R=1)
.STEP RES RMOD4(R) 500
2000 150; VARY RE FROM 500 TO
2000
Q1
5
3
4
Q2N2222
.MODEL Q2N2222 NPN(BF=100 IS=3.295E-14 VA=200);
TRANSISTOR MODEL
.DC
VCC
15
15
1
.AC
LIN
1
1000 1000
.PRINT DC
I(RE) V(5,4)
.PRINT AC
V(1) I(RS)
.END
The results obtained from PSPICE are shown in Table 8.9. The complete results
are also available in file ex8_8ps.dat. MATLAB is used obtain the input impedance and also to plot the results.
MATLAB Script
% Load data
re=ex8_8ps(:,1);
ie_dc=ex8_8ps(:,2);
vce_dc=ex8_8ps(:,3);
ib_ac=ex8_8ps(:,4);
vs_ac=10.0e-03; % input signal is 10 mA
% Calculate input resistance
m=length(re);
for i=1:m
rin(i)=vs_ac/ib_ac(i);
end
subplot(211), plot(re, rin, re, rin,ob)
ylabel(Input Resistance, Ohms)
title((a) Input Resistance)
subplot(212), plot(re, vce_dc, re, vce_dc, ob)
ylabel(Collector-emitter Voltage, V)
title((b) DC Collector-Emitter Voltage)
xlabel(Emitter Resistance, Ohms)
The input resistance and collector-emitter voltage are shown in Figure 8.22.
325
TABLE 8.9
Emitter
Resistance,
DC Emitter
Current,A
DC Collector-to-Emitter
Voltage, V
Small-Signal
Input Current, A
500
650
800
950
1100
1250
1400
1550
1700
1850
2000
1.136E02
1.013E02
9.147E03
8.338E03
7.662E03
7.088E03
6.595E03
6.166E03
5.791E03
5.458E03
5.162E03
9.318
8.413
7.683
7.079
6.572
6.140
5.767
5.442
5.156
4.902
4.675
3.181E07
2.750E07
2.478E07
2.290E07
2.153E07
2.048E07
1.965E07
1.898E07
1.842E07
1.795E07
1.755E07
Input resistance,
(a)
(b)
104
Input resistance
5
4
3
500
10
Collector-emitter
voltage, V
(a) DC Emitter Current, (b) DC Collector-Emitter Voltage, and (c) Small-Signal

Input Current versus Emitter Resistance
1000
1500
2000
DC collector-emitter voltage
8
6
4
500
1000
1500
Emitter resistance,
2000
FIGURE 8.22
(a) Input resistance versus emitter resistance. (b) Collector-emitter voltage versus emitter resistance.
8.6Schematic Capture of Transistor Circuits

The ORCAD CAPTURE can be used to draw and simulate transistor circuits.
Start the ORCAD schematic using the steps outlined in Box 1.1. Draw the
transistor circuit using the steps outlined in Box 1.2. In the latter box, choose
the transistor by selecting the transistor part. In the student version of the
ORCAD CAPTURE, select the transistor from the BREAKOUT or EVAL
326
Box 8.1Sequence of Steps for Simulating

Transistor Circuits
Use the steps in Box 1.1 to start ORCAD schematic.
Use the steps in Box 1.2 to draw the circuit using ORCAD
schematic.
In the steps in Box 1.2, you can select transistor part. In the
Student version of the ORCAD Schematic package, you can
select the transistor from the BREAKOUT or EVAL library.
The transistor will have model parameters. To set the parameters
of the device, select the device and go to Edit>PSPICE Model.
Click it to open the PSPICE Model Editor and insert the model
for the device. Model of various devices are available on the
Internet from device manufacturers websites.
Use Boxes 1.3, 1.4, 1.5, and 1.6 to perform DC, DC Sweep,
Transient, and AC Analysis, respectively.
library. DC, DC Sweep, Transient analysis, and AC analysis can be performed

by using the steps outlined in Boxes 1.3, 1.4, 1.5, and 1.6, respectively. Box 8.1
shows the steps needed to perform the analysis of diode circuits.
Example 8.9: Frequency Response of a Common-Emitter Amplifier
In the common-emitter amplifier shown in Figure 8.18, CC1=CC2=2 F,
CE=100F, RB1=100 K, RB2=100 K, RS=50 , RL=RC=8 K, RE=1.5 K,
and VCC=10V. Transistor Q1 is Q2N2222. Plot the output voltage with respect
to frequency.
Solution
Figure 8.18 was drawn using the schematic capture. Figure 8.23 shows the schematic of the circuit. AC analysis was performed. Figure 8.24 shows the output
voltage.
8.7 Feedback Amplifiers

The general structure of a feedback amplifier is shown in Figure 8.25. A is
the open-loop gain of the amplifier without feedback. Input XI and output X0
are related by:

X 0 = AX i
(8.26)
327
RC
8K
RB1
1 mVac
0 Vdc
V1
100 K
RS
CC1
50
2 E6
VCC
CC2
2 E6
Q3
V
RL
Q2N2222
RB2
10 Vdc
R5
1.5 K
100 K
8K
CE
100e6
FIGURE 8.23
Common-emitter amplifier.
3.0 mV
2.0 mV
1.0 mV
0V
100 Hz
V (CC2 : 2)
10 KHz
Frequency
1.0 MHz
100 MHz
FIGURE 8.24
Output voltage of the common-emitter amplifier.
Xs
Xi
Amplifier
Input source
Load
Xf
Feedback
network
FIGURE 8.25
General structure of feedback amplifier.
X0
328
The output quantity X0 is fed back to the input through the feedback network, which provides a sample signal Xf. The latter is related to the output
X0 by the expression:
X f = X 0
(8.27)
The feedback signal Xf is subtracted from the source (for negative feedback
amplifier) to produce the input signal:
X i = XS X f
(8.28)
For positive feedback, the latter equation, becomes:

X i = XS + X f
(8.29)
Combining Equations 8.26 to 8.28, we get:

Af =
xO
A
=

xS 1 + A
(8.30)
where
A is the loop gain; and
(1+A) is the amount of feedback.
It can be shown that amplifiers with negative feedback will result in
(i)gain insensitivity to component variations, (ii) increased bandwidth, and
(iii) reduced nonlinear distortion. The feedback amplifier topologies are
shown in Figure 8.26.
Depending on the type of feedback configuration, input and output resistance can be shown to increase or decrease by the feedback factor . Table 8.10
shows the feedback relationships.The following two examples will explore
the characteristics of feedback amplifiers.
Example 8.10: Two-Stage Amplifier with Feedback Resistance
The circuit shown in Figure 8.27 is an amplifier with shunt-shunt feedback.
RB1=RB2=50 K, RS=100 , RC1=5 K, RE1=2.5 K, RC2=10 K,
RE2=2 K, C1=20F, CE2=100 F, and VCC=15 V. If Vs=1 mV, find V0 as
RF changes from 1 K to 8 K. Plot V0 versus RF. Assume that both transistors Q1
and Q2 are Q2N2222. The source voltage is a 2 KHz sine wave with 1 mV peak
voltage.
Solution
PSPICE is used to obtain the output voltage with respect to RF. MATLAB is used
to obtain the relationship between output voltage and RF.
329
(a)
Voltage
amplifier
ve +
RL
+
V0
RL
+
V0
VS
+
vf
Feedback
network
+
ve
Voltage
amplifier
(b)
VS
+
vf
(c)
is
i1
Feedback
network
ie
Transresistance
amplifier
RS
RL
V0
if
Feedback
network
(d)
is
i1
+
v0
ie
Current
amplifier
RS
if
RL
+
V0
i0
Feedback
network
FIGURE 8.26
Feedback configurations. (a) Series-shunt feedback, (b) Series-series feedback, (c) Shunt-resistor
feedback, and (d) Shunt-series feedback.
330
TABLE 8.10
Feedback Relationships
Amplifier Configuration
Gain
Input Resistance
Output Resistance
Ri
Rif = Ri ( 1 + A )
RO
RO
Rof =
1 + A
Rif = Ri ( 1 + A )
Rof = RO ( 1 + A )
Without resistance
Series-shunt amplifier
Af =
Series-series amplifier
Af =
Shunt-shunt amplifier
Af =
Shunt-series amplifier
Af =
A
1 + A
A
1 + A
A
1 + A
A
1 + A
Ri
1 + A
Ri
Rif =
1 + A
Rif =
Rof =
RO
1 + A
Rof = RO ( 1 + A )
PSPICE Program
AMPLIFIER WITH FEEDBACK
VS
1
0
AC
1MV
0
RS
1
2
100
C1
2
3
20E-6
RB1 3
0
50E3
RB2 6
3
50E3
RE1 4
0
2.5E3
RC1 6
5
5.0E3
Q1
5
3
4
Q2N2222
TRANSISTORS MODEL
VCC 6
0
DC
15V
RE2 7
0
2E3
CE2 7
0
100E-6
RC2 6
8
10.0E3
Q2
8
4
7
Q2N2222
.AC LIN 1
2000 2000
RF
8
3
RMODF 1
.MODEL RMODF RES(R=1)
.STEP RES
RMODF(R) 1.0E3 8.0E3 1.0E3
.PRINT AC VM(8,0)
.END
Table 8.11 shows the results obtained from PSPICE. The results are also available
in file ex8_9ps.dat. MATLAB is used to plot the results.
MATLAB Script
%load data
[rf, gain]=textread(ex8_9ps.dat, %d %f);
plot(rf, gain, rf, gain,ob)
title(Gain versus Feedback Resistance)
xlabel(Feedback Resistance, Ohms)
ylabel(Gain)
The feedback resistance versus gain is shown in Figure 8.28.
331
VCC
6
RIN
RS
RC1
RB2
2 C1
5
Q1
RB1
8
+
Q2
VS
RE1
RE2
CE2
0
RF
FIGURE 8.27
Amplifier with shunt-shunt feedback.
TABLE 8.11
Gain versus Feedback Resistance
RF,
Gain
1000
2000
3000
4000
5000
6000
7000
8000
7.932
15.78
23.38
30.75
37.91
44.86
51.62
57.01
60
50
40
Gain
RC2
30
20
10
0
1000 2000 3000 4000 5000 6000 7000 8000
Feedback resistance,
FIGURE 8.28
Feedback resistance versus gain of a two-stage amplifier.
Vo
332
VCC
8
RB1
CF
RF
RIN
RC
6
C2
RS
3
2
C1
VS
Q1
4
RB2
VO
RL
RE
CE
0
FIGURE 8.29
Common-emitter amplifier with shunt-shunt feedback.
Example 8.11: Common-Emitter Amplifier with

FeedbackResistances
In Figure 8.29, RS=150 , RB2=20 K, RB1=90 K, RE=2 K, RC=5 K,
RL=10 K, C1=2 F, CE=50 F, C2=2 F, CF=5 F, and VCC=15 V. Find
input resistance, RIN and the voltage gain as the feedback resistance changes from
1 to 10 K. The source voltage is a 1 KHz sine wave with 1 mV peak voltage.
Assume that Q1 is Q2N2222.
Solution
PSPICE is used to perform circuit simulation. The PSPICE command .STEP is used
to vary the feedback resistance.
PSPICE Program
COMMON
VS
RS
C1
RB2
RB1
CF
Q1
EMITTER AMPLIFIER
1
0
DC
1
2
150
2
3
2E-6
3
0
20E3
8
3
90E3
5
6
5E-6
6
3
4
Q2N2222
AC
1E-3
333

TRANSISTORS MODEL
RE
4
0
2.0E3
CE
4
0
50E-6
RC
8
6
5.0E3
C2
6
7
2.0E-6
RL
7
0
10.0E3
VCC
8
0
DC
15V
RF
2
5
RMODF 1
.MODEL RMODF RES(R=1)
.STEP RES RMODF (R) 1.0E3 10E3 1.0E3;
.AC
LIN
1
1000 1000
.PRINT AC I(RS) V(7)
.END
Table 8.12 shows the PSPICE results. The latter are also available in file ex8_10ps.
dat. MATLAB is used to calculate the input resistance, voltage gain, and also to
plot the results.
MATLAB Script
% Load data
rf=ex8_10ps(:,1);
ib_ac=ex8_10ps(:,2);
vo_ac=ex8_10ps(:,3);
vin_ac=1.0e-3; % vs is 1 mA
% Calculate the input resistance and gain
n=length(rf); % data points in rf
for i=1:n
rin(i)=vin_ac/ib_ac(i);
gain(i)=vo_ac(i)/vin_ac;
end
%
% Plot input resistance and gain
%
subplot(211)
plot(rf, rin, rf, rin,ob)
title((a) Input Resistance versus Feedback Resistance)
ylabel(Input Resistance, Ohms)
subplot(212)
plot(rf, gain,rf,gain,ob)
title((b) Amplifier Gain versus Feedback Resistance)
ylabel(Gain)
xlabel(Feedback Resistance, Ohms)
The input resistance and gain as a function of feedback resistance are shown in
Figure 8.30.
334
TABLE 8.12
Input Current and Output Voltage as a Function of Feedback Resistance
Feedback
Resistance,
1000
2000
3000
4000
5000
6000
7000
8000
9000
10000
(a)
Input resistance,
Output Voltage (AC), V
5.430E06
5.208E06
5.004E06
4.817E06
4.644E06
4.484E06
4.336E06
4.198E06
4.070E06
3.950E06
5.169E03
1.001E02
1.445E02
1.852E02
2.228E02
2.576E02
2.898E02
3.197E02
3.477E02
3.738E02
Input resistance versus feedback resistance
260
240
220
200
180
1000
(b)
Input Current (AC), A
2000
3000
4000
5000
6000
7000
8000
9000
10000
9000
10000
Amplifier gain versus feedback resistance
40
Gain
30
20
10
0
1000
2000
3000
4000 5000 6000 7000

Feedback resistance,
8000
FIGURE 8.30
(a) Input resistance and (b) Gain as a function of feedback resistance.
Problems

8.1 A circuit for determining the input characteristics of a BJT is

shown in Figure P8.1. R1=1 , R2=1 , VCC=10 V, and Q1 is
Q2N2222. (a) Obtain the input characteristics (i.e., IB versus VBE)
by varying IB from 1 A to 9 A in steps of 2 A. (b) Obtain the
input resistance RBE as a function of IB.
335
R1
4
Q1
+
VCC
3
R2
IB
0
FIGURE P8.1
BJT circuit.
8.2 In Example 8.1, plot the output resistance, rCE, as a function of
VCE for IB=4 A and 6 A. Is the output resistance dependent
on IB?
8.3 Figure 8.4 shows a configuration for obtaining MOSFET characteristics. (a) Obtain the output characteristics of MOSFET
M2N4531 (i.e., IDS versus VDS) for the following values of VG: 3,
4, and 5 V. (b) For VGS=4 V, obtain the resistance, rCE=VDS/IDS
for various values of VDS. Plot rCE versus VDS.
8.4 The data shown in Table P8.4 was obtained from a MOSFET.
(a) Determine the threshold voltage, VT. (b) Determine the
transconductance at VGS=3 V.
TABLE P8.4
IDS versus VGS of a MOSFET
VGS, V
1.0
2.0
2.8
3.0
3.2
3.6
4.0
4.4
4.8
IDS, mA
3.375E05
3.375E05
3.375E05
4.397E02
2.093E01
7.286E01
7.385E01
7.418E01
7.436E01
8.5 For the Widlar current source, shown in Figure 8.9, RC=20 K,
VCC=5 V, RE=12 K. Determine the current Io as a function of
temperature (0C to 120C). Assume that the model for both Q1
and Q2 is:

.MODEL npn_mod NPN(Bf=150 Br=2.0 VAF=125V

Is=14fA Tf=0.35 ns Rb=150 +Rc=150 Re=2
cje=1.0 pF Vje=0.7 V Mje=0.33 Cjc=0.3 pF Vjc=0.55
V mjc=0.5 +Cjs=3.0 pF Vjs=0.52 V Mjs=0.5)
For resistances, assume that TC1=500 ppm/C and T2=0.
336
8.6 In Example 8.3, determine the worst-case (for all devices) emitter current.
8.7 In Example 8.4, if Q1 is changed to Q2N2222 (model is available in PSPICE device library), and the temperature is varied
from 25C to 55C, (a) Plot emitter current versus temperature, (b) Determine the best fit between the emitter current and
temperature.
8.8 For the MOSFET biasing circuit of Figure 8.14, determine
thedrain current as RG takes the following values: 104, 105, 106,
107, 108, and 109 . Assume that VDD=15 V, RD=10 K, and
transistor M1 is 1RF150 (model is available in PSPICE device
library).
8.9 In Example 8.7, obtain the input resistance as a function of
power supply voltage (7 V to 10 V) when the frequency of the
source is 5000 Hz.
8.10 In the common-emitter amplifier shown in Figure 8.18,
CC1=CC2=5 F, CE=100 F, RB1=50 K, RB2=40 K, RS=
50, RL=RC=10 K, and RE=1 K. Transistor Q1 is Q2N3904.
Determine (a) gain, (b) input resistance, (c) low cut-off frequency, and (d) bandwidth as a function of supply voltage VCC
(8 V to 12 V).
8.11 In Example 8.8, obtain the voltage gain as a function of the emitter resistance.
8.12 The circuit shown in Figure P8.12 is a Darlington amplifier.
Q1 and Q2 are the Darlington-pair. The circuit has a very high
input resistance. RB=80 K, RS=100 , C1=5 F, VCC=15 V,
and transistors Q1 and Q2 are both Q2N2222. If RE varies from
500 to 1500 , determine the input resistance RIN and voltage
gain as a function of emitter resistance. Assume that input voltage VS is sinusoidal waveform with a frequency of 2 KHz and a
peak value of 10 mV.
VCC
RIN
RB
2
RS
C1
Q1
Q2
VS
0
FIGURE P8.12
Darlington amplifier.
5
RE
VOUT
337
8.13 Figure P8.13 is an op amp circuit with series-shunt feedback

network. RS=1 K, RL=10 K, and R1=5 K. Find the gain,
Vo/VS if RF varies from 10 K to 100 K. Plot voltage gain with
respect to RF. Assume that the Op Amp is UA741 and the input
voltage VS is sinusoidal waveform with a frequency of 5 KHz
and a peak voltage of 1 mV.
RF
R1
VCC
RS
V0
6
VEE
RL
VS
0
FIGURE P8.13
Op amp circuit with series-shunt feedback network.
8.14 A two-stage amplifier with shunt-series feedback is shown

in Figure P8.14. RB1=60 K, RB2=80 K, RS=100 , RC1=
8 K, RE1=2.5 K, RB3=50 K, RB4=60 K, RC2=5 K,
RE2= 1K, C1=20 F, CE=100 F, C2=20 F, and VCC=15 V.
If input voltage VS is a sinusoidal voltage with a peak value of
1 mV and a frequency of 1 KHz, determine the input resistance
RIN and output voltage as RF varies from 1 K to 6 K. Assume
that both transistors Q1 and Q2 are Q2N3904.
VCC
9
RB2
RIN
RS
1
VS
C2
C1
2
RB4
RC1
3
RB1
Q1
4
RE1
CE
RF
FIGURE P8.14
Two-stage amplifier with shunt-series feedback.
RC2
8
Q2
7
RB3
RE2
Vo
338
8.15 For Problem 8.14, determine the low cut-off frequency, high
cut-off frequency, and the bandwidth as the function of the
feedback resistance RF.
8.16 For the two-stage amplifier with shunt-series feedback is shown
in Figure P8.14. RB1=60 K, RB2=80 K, RS=100 , RC1=8
K, RE1=2.5 K, RB3=50 K, RB4=60 K, RC2=5 K,
RE2=1 K, RF=2 K, C1=20F, CE=100 F, and C2=20 F.
If input voltage VS is a sinusoidal voltage with a peak value of
1mV, determine the voltage gain and bandwidth as a function
of the supply voltage VCC (8 V to 12 V). Assume that both transistors Q1 and Q2 are Q2N3904.
8.17 For Example 8.10 if VS=1 mV and frequency of the source is
5KHz, find the input resistance as RF varies from 1 K to 8 K.
8.18 In Figure P8.13, if RS=1 K, RL=10 K, RF=20 K, and
VCC=VEE=15 V. Find the gain, Vo/VS if R1 varies from 1 K
to 10 K. Plot voltage gain with respect to R1. Assume that the
Op Amp is UA741 and the input voltage VS is sinusoidal waveform with a frequency of 2 KHz and a peak voltage of 1 mV.
8.19 For the Darlington amplifier shown Figure P8.12, RB=60 K,
RS=90 , RE=1000 , C1=10 F, and transistors Q1 and Q2
are both Q2N2222. If VCC varies from 10 V to 15 V, determine
the voltage gain as a function of VCC. Assume that input voltage VS is sinusoidal waveform with a frequency of 1 KHz and a
peak value of 5 mV.
8.20 For the common-emitter biasing network, shown in Figure 8.6,
VCC=10 V, RB1=60 K, RB2=40 K, RE=1 K, RC=6 K, and
Q1 is Q2N2222. (a) Find the sensitivity of the voltage at the collector to amplifier components.
Bibliography

1. Alexander, Charles K., and Matthew N. O. Sadiku. Fundamentals of Electric

Circuits. 4th ed. New York: McGraw Hill, 2009.
2. Attia, J. O. Electronics and Circuit Analysis Using MATLAB. 2nd ed. Boca Raton,
FL: CRC Press, 2004.
3. Boyd, Robert R. Tolerance Analysis of Electronic Circuits Using MATLAB. Boca
Raton, FL: CRC Press, 1999.
4. Chapman, S. J. MATLAB Programming for Engineers. Tampa, FL: Thompson, 2005.
5. Davis, Timothy A., and K. Sigmor. MATLAB Primer. Boca Raton, FL: Chapman
& Hall/CRC, 2005.
6. Distler, R. J. Monte Carlo Analysis of System Tolerance. IEEE Transactions on
Education 20 (May 1997): 98101.
7. Etter, D. M. Engineering Problem Solving with MATLAB. 2nd ed. Upper Saddle
River, NJ: Prentice Hall, 1997.
8. Etter, D. M., D. C. Kuncicky, and D. Hull. Introduction to MATLAB 6. Upper
Saddle River, NJ: Prentice Hall, 2002.
339
9. Hamann, J. C, J. W. Pierre, S. F. Legowski, and F. M. Long. Using Monte

Carlo Simulations to Introduce Tolerance Design to Undergraduates. IEEE
Transactions on Education 42, no. 1 (February 1999): 114.
10. Gilat, Amos. MATLAB, An Introduction With Applications. 2nd ed. New York:
John Wiley & Sons, Inc., 2005.
11. Hahn, Brian D., and Daniel T. Valentine. Essential MATLAB for Engineers and
Scientists. 3rd ed. New York and London: Elsevier, 2007.
12. Herniter, Marc E. Programming in MATLAB. Florence, KY: Brooks/Cole
Thompson Learning, 2001.
13. Howe, Roger T., and Charles G. Sodini. Microelectronics, An Integrated Approach.
Upper Saddle River, NJ: Prentice Hall, 1997.
14. Moore, Holly. MATLAB for Engineers. Upper Saddle River, NJ: Pearson Prentice
Hall, 2007.
15. Nilsson, James W., and Susan A. Riedel. Introduction to PSPICE Manual Using
ORCAD Release 9.2 to Accompany Electric Circuits. Upper Saddle River, NJ:
Pearson/Prentice Hall, 2005.
16. OrCAD Family Release 9.2. San Jose, CA: Cadence Design Systems, 19861999.
17. Rashid, Mohammad H. Introduction to PSPICE Using OrCAD for Circuits and
Electronics. Upper Saddle River, NJ: Pearson/Prentice Hall, 2004.
18. Sedra, A. S., and K. C. Smith. Microelectronic Circuits. 5th ed. Oxford: Oxford
University Press, 2004.
19. Spence, Robert, and Randeep S. Soin. Tolerance Design of Electronic Circuits.
London: Imperial College Press, 1997.
20. Soda, Kenneth J. Flattening the Learning Curve for ORCAD-CADENCE
PSPICE, Computers in Education Journal XIV (AprilJune 2004): 2436.
21. Svoboda, James A. PSPICE for Linear Circuits. 2nd ed. New York: John Wiley &
Sons, Inc., 2007.
22. Tobin, Paul. The Role of PSPICE in the Engineering Teaching Environment.
Proceedings of International Conference on Engineering Education, Coimbra,
Portugal, September 37, 2007.
23. Tobin, Paul. PSPICE for Circuit Theory and Electronic Devices. San Jose, CA:
Morgan & Claypool Publishers, 2007.
24. Tront, Joseph G. PSPICE for Basic Circuit Analysis. New York: McGraw-Hill, 2004.
25. Using MATLAB, The Language of Technical Computing, Computation, Visualization,
Programming, Version 6. Natick, MA: MathWorks, Inc., 2000.
26. Yang, Won Y., and Seung C. Lee. Circuit Systems with MATLAB and PSPICE.
New York: John Wiley & Sons, Inc., 2007.

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8

Transistor Characteristics and Circuits

8.1Characteristics of Bipolar Junction Transistors

PSPICE and MATLAB for Electronics: An Integrated Approach

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The saturation region corresponds to forward biasing both base-emitter

Assume that R1=R2=R3=1 .

Transistor Characteristics and Circuits

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PSPICE and MATLAB for Electronics: An Integrated Approach

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Transistor Characteristics and Circuits

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The plot of the output resistance is shown in Figure 8.3.

8.2 MOSFET Characteristics

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PSPICE and MATLAB for Electronics: An Integrated Approach

Transistor Characteristics and Circuits

8.2.3 Saturation Region

In the saturation region, the current-voltage characteristics are given as:

Downloaded by [Louisiana State University] at 18:06 23 April 2016

The transconductance is given as:

and the incremented drain-to-source resistance, rCE is given as,

In the following example, we shall obtain the ID versus VGS characteristics of

PSPICE and MATLAB for Electronics: An Integrated Approach

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Transistor Characteristics and Circuits

Input characteristics of a MOSFET

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Transconductance versus gate-source voltage

The plots are shown in Figure 8.5.

8.3 Biasing of BJT Circuits

PSPICE and MATLAB for Electronics: An Integrated Approach

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Transistor Characteristics and Circuits

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PSPICE and MATLAB for Electronics: An Integrated Approach

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F is a large signal forward current gain of common-emitter configuration.

.MODEL Q2N2222 NPN(BF=100 IS=3.295E14 VA=200)

Transistor Characteristics and Circuits

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DC SENSITIVITIES OF OUTPUT I(VM)

PSPICE and MATLAB for Electronics: An Integrated Approach

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8.3.1 Temperature Effects

Transistor Characteristics and Circuits

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The plot is shown in Figure 8.11.

PSPICE and MATLAB for Electronics: An Integrated Approach

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8.4 MOSFET Bias Circuit

Transistor Characteristics and Circuits

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PSPICE and MATLAB for Electronics: An Integrated Approach

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Transistor Characteristics and Circuits

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RMOD3 (R) 5000 10000 1000; VARY RS FROM 5K

M2N4351 NMOS (KP = 125U VTO = 2.24 L = 10U W = 59U

8.1 A circuit for determining the input characteristics of a BJT is