7420 Datasheet PDF

Revised March 2000
DM74LS20
Dual 4-Input NAND Gate
General Description
This device contains two independent gates each of which
performs the logic NAND function.
Ordering Code:
Order Number
Package Number
Package Description
DM74LS20M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
DM74LS20N
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter X to the ordering code.
Connection Diagram
Function Table
Y = ABCD
Inputs
Output
H = HIGH Logic Level

L = LOW Logic Level
X = Either LOW or HIGH Logic Level
2000 Fairchild Semiconductor Corporation
DS006355
www.fairchildsemi.com
DM74LS20 Dual 4-Input NAND Gate
June 1986
DM74LS20
Absolute Maximum Ratings(Note 1)

Supply Voltage
Note 1: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The Recommended Operating Conditions table will define the conditions
for actual device operation.
7V
Input Voltage
7V
0C to +70C
Operating Free Air Temperature Range
65C to +150C
Storage Temperature Range
Recommended Operating Conditions

Symbol
Parameter
Min
Nom
Max
4.75
5.25
Units
VCC
Supply Voltage
VIH
HIGH Level Input Voltage
VIL
LOW Level Input Voltage
0.8
IOH
HIGH Level Output Current
0.4
mA
IOL
LOW Level Output Current
mA
TA
Free Air Operating Temperature
70
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol
Parameter
Conditions
VI
Input Clamp Voltage
VCC = Min, II = 18 mA
VOH
HIGH Level
VCC = Min, IOH = Max,
Output Voltage
VIL = Max
VOL
LOW Level
VCC = Min, IOL = Max,
Output Voltage
VIH = Min
Min
Typ
(Note 2)
2.7
Max
Units
1.5
3.4
IOL = 4 mA, VCC = Min
0.35
0.5
0.25
0.4
II
Input Current @ Max Input Voltage
VCC = Max, VI = 7V
0.1
IIH
HIGH Level Input Current
VCC = Max, VI = 2.7V
20
IIL
LOW Level Input Current
VCC = Max, VI = 0.4V
0.36
mA
IOS
Short Circuit Output Current
VCC = Max (Note 3)
100
mA
ICCH
Supply Current with Outputs HIGH
VCC = Max
0.4
0.8
mA
ICCL
Supply Current with Outputs LOW
VCC = Max
1.2
2.2
mA
20
mA
Note 2: All typicals are at VCC = 5V, TA = 25C.

Note 3: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Switching Characteristics
at VCC = 5V and TA = 25C
RL = 2 k
Symbol
tPLH
CL = 15 pF
Parameter
Propagation Delay Time
LOW-to-HIGH Level Output
tPHL
Propagation Delay Time

HIGH-to-LOW Level Output
CL = 50 pF
Units
Min
Max
Min
Max
10
15
ns
10
15
ns
DM74LS20
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
Package Number M14A
DM74LS20 Dual 4-Input NAND Gate
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Package Number N14A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.

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Revised March 2000

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

H = HIGH Logic Level

2000 Fairchild Semiconductor Corporation

DM74LS20 Dual 4-Input NAND Gate

Absolute Maximum Ratings(Note 1)

Operating Free Air Temperature Range

Storage Temperature Range

Recommended Operating Conditions

HIGH Level Input Voltage

LOW Level Input Voltage

HIGH Level Output Current

LOW Level Output Current

Free Air Operating Temperature

Input Clamp Voltage

VCC = Min, IOH = Max,

VCC = Min, IOL = Max,

IOL = 4 mA, VCC = Min

Input Current @ Max Input Voltage

HIGH Level Input Current

VCC = Max, VI = 2.7V

LOW Level Input Current

VCC = Max, VI = 0.4V

Short Circuit Output Current

VCC = Max (Note 3)

Supply Current with Outputs HIGH

Supply Current with Outputs LOW

Note 2: All typicals are at VCC = 5V, TA = 25C.

Propagation Delay Time

Physical Dimensions inches (millimeters) unless otherwise noted

DM74LS20 Dual 4-Input NAND Gate

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

1. Life support devices or systems are devices or systems

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