Beaglebone Black SPI Through PRU: Program Usage: ./SPI (Word) (Num Words) (Frequency (0-15) )
Beaglebone Black SPI Through PRU: Program Usage: ./SPI (Word) (Num Words) (Frequency (0-15) )
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A B Interval: 20 ns
Doing multiples:
How about 24 MHz? This previously took about 60 seconds through the main processor.
./SPI 808464432 33554432 1
INFO: Initializing.
INFO: Transmitting 808464432 (33554432 times) at 24000000 Hz
INFO: Sending...PRU program completed (9), in 47 seconds
Max Freq
100 MHz
CLKSPIREF
Reference / Source
CORE_CLKOUTM4 / 2
48 MHz
PER_CLKOUTM2 / 4
Comments
pd_per_l4ls_gclk
Interface clock
From PRCM
pd_per_spi_gclk
Functional clock
From PRCM
Pin
Type
Description
SPIx_SCLK
I/O
SPIx_D0
I/0
SPIx_D1
I/0
SPIx_CS0
I/0
SPIx_CS1
Relevant Registers:
CM_PER_SPI1_CLKCTRL @ 0x44E00050
Enable the Clock
MCSPI_SYSCONFIG @ 0x481A0110
Reset the SPI
MCSPI_SYSSTATUS @ 0x481a0114
Check Reset Completed
MCSPI_MODULCTRL @ 0x481A0128
Turn DMA off (for now)
MCSPI_SYSCONFIG @ 0x481A0110
Automatic OCP clock gating strategy is applied, based on the
OCP interface activity.
MCSPI_IRQSTATUS @ 0x481A0118
Disable Interrupts
MCSPI_CH1CTRL @ 0x481A0148
Turn on/off SPI CH1
MCSPI_CH1CTRL @ 0x481A0140
Set polarity, phases, frequencies, word length, tx/rx registers, etc
MCSPI_CH1STAT @ 0x481A0144
Check buffer empty/full
MCSPI_TX1 @ 0x481A014C
Load in data to transfer
MCSPI_XFERLEVEL @ 0x481A017C
Could set this up to take advantage of larger FIFO sizes. Currently not being used
//Config SYSCONFIG
MOV r1, 0x481A0110
MOV r2, 0x00000311
SBBO r2, r1, 0, 4
//Disable interupts
MOV r1, 0x481A011C
MOV r2, 0x00000000
SBBO r2, r1, 0, 4
// Reset SPI
MOV r1, 0x481A0110
LBBO r2, r1, 0, 4
SET r2.t1
SBBO r2, r1, 0, 4
// Disable channel 1
MOV r1, 0x481A0148
MOV r2, 0x00000000
SBBO r2, r1, 0, 4
// Configure channel 1 of MCSPI1
MOV r1, 0x481A0140
MOV r2, 0x000192FC0
LBCO r4, CONST_PRUSHAREDRAM,
8, 4 //frequency
OR r2, r2,r4
SBBO r2, r1, 0, 4