Chapter 3

Diode Circuits
3.1

Background

Diodes are non-linear elements described by the Shockley equation,





V
I = IS exp
1 ,
VT

(3.1)

where IS is the reverse saturation current (of the order of pA for typical low-power diodes),
VT = kB T /q is the thermal voltage (about 26 mV at room temperature, T = 300 K), and is
the ideality factor (1 < < 2). A plot of Eq. 3.1 is shown in Fig. 3.1. Note that, as V is made
100

I (mA)

80
60

40
20
0

0.2

0.4

0.6

0.8

V (Volts)

Figure 3.1: Diode I V curve with forward bias. The parameters, IS = 1 1013 A, VT = 25 mV , = 1,
were used for the Shockley model.

negative and more than a few VT , the exponential term in Eq. 3.1 becomes zero, and I IS ,
a negligibly small current. However, a real diode cannot withstand an arbitrarily large reverse
voltage and breaks down at some point, the breakdown voltage VBR ranging from a few Volts
to a thousand Volts, depending on the diode material, device structure, doping densities, etc.
A diode I V curve with reverse breakdown is shown in Fig. 3.2.
The non-linear model of Eq. 3.1 is too complex for circuit analysis. A much simpler model
which is excellent for a large variety of applications is derived by noting that the diode
current in the forward direction becomes significant (a few mA) at about 0.7 V (defined as Von )
for a typical low-power silicon diode and thereafter shoots up rapidly (see Fig. 3.1). In the
3.1

3.2

M. B. Patil, IIT Bombay

40

I (mA)

I
20

V
0

20
6

V (Volts)

Figure 3.2: Diode I V curve showing forward and reverse bias.

simplified model, the diode voltage drop is therefore assumed to be constant (equal to Von ) for
any current in the forward direction, and the diode current is assumed to be zero for any
voltage V < Von , as shown in Fig. 3.3 (a). The equivalent circuit of the diode is then simply a
V
I

V
p

I
Von

ON

ON

OFF

Ron
n

Von

Roff
Von
(a)

OFF

p
(b)

n
(c)

Figure 3.3: (a) Idealized diode I V plot, (b) diode model with Ron = 0 , Roff = , (c) diode
model with finite Ron and Roff .

voltage source of magnitude Von when it conducts, and an open circuit (assuming no
breakdown) when V < Von (see Fig. 3.3 (b)).
A better approximation of the diode behaviour is obtained by including an on-resistance Ron
and an off-resistance Roff (see Fig. 3.3 (c)). For our purpose, the model in Fig. 3.3 (b) would be
generally adequate.
Most of the diode circuits are designed such that the maximum reverse voltage expected to
appear across any diode in the circuit is less than its breakdown voltage, and each diode can
be simply replaced by an open circuit (Fig. 3.3 (b)) or a large off-resistance Roff (Fig. 3.3 (c)).
On the other hand, in circuits using Zener diodes, the diode(s) often operates in its breakdown
region, with a voltage drop of VZ Volts. In these circuits, we will idealize the diode I V
characteristic as shown in Fig. 3.4, i.e., the diode has a constant voltage drop Von when
conducting in the forward direction, a constant voltage drop of VZ when conducting in the
reverse direction, and it does not allow any current for VZ < V < Von .
In many of the diode circuits, the above simple models help us to gain an excellent idea of the
circuit behaviour. The key decision to be made in this simple analysis is whether a given diode,
at a given time, is conducting or not. If the diode is conducting, we replace it with a constant

3.3

Diode circuits
I
VZ
V
Von

Figure 3.4: Idealized I V plot for a Zener diode

voltage source (0.7 V for a silicon diode); if it is not, we replace it with an open circuit. For a
Zener diode, we also need to check if the diode could be conducting in the reverse direction.
Finally, a note on power consumption of a diode: If a diode in not conducting, it carries a
negligible current and therefore does not dissipate any significant power. If it is conducting, its
power dissipation is Von multiplied by the forward current. Note that the voltage source (Von )
in Fig. 3.3 (b) can only absorb power (see the signs of V and I), and in that sense, it is very
different from a battery which can deliver power to an external circuit. The same comment
holds for a Zener diode conducting in the reverse direction as well.
In passing, we note that solar cells are also diodes, but they are capable of delivering power to
an external circuit. The equivalent circuit of a solar cell is different than those we have
discussed; it includes a current source which represents generation of electron-hole pairs due to
the solar radiation falling on the p n junction.

3.2

Examples

1. For the circuit shown in Fig. 3.5 (a), find the current i. For this example and for those to
follow, assume the diode to have Von = 0.7 V , Ron = 0 , and Roff = (unless specified
otherwise).
R1

6 k
36 V

R1
B

R3
R2
3 k 1 k

36 V

0.7 V
A

6 k
R2
R3
3 k 1 k

0
(a)

R1
B

6 k

36 V

B
i

R2
R3
3 k 1 k

0
(b)

(c)

Figure 3.5: (a) Circuit for Example 1, (b) Circuit with diode not conducting, (c) Circuit
with diode conducting.

We first need to determine if the diode is conducting or not. Consider the case that it is
not conducting, i.e., the diode is replaced with an open circuit (Fig. 3.5 (b)). In this case,
R2
36 V = 12 V . This is obviously inconsistent with our
AAB = VA VB =
R1 + R2
assumption that the diode is not conducting, and this case is therefore ruled out.

3.4

M. B. Patil, IIT Bombay

Fig. 3.5 (c) shows the other case in which D is conducting and is replaced with a voltage
source of 0.7 V . Writing KCL at node A, we get
VA 36 VA VA 0.7
+
+
= 0,
R1
R2
R3

(3.2)

VA 0.7
= 3.77 mA . Since the direction of the current is
R3
from A to B (i.e., from p to n for the diode), our assumption that the diode is
conducting in the forward direction is validated.
yielding VA = 4.47 V and i =

SEQUEL file: ee101 diode circuit 1b.sqproj

2. For the circuit shown in Fig. 3.6,
(a) Plot Vo versus Vi .
(b) Plot Vo (t) for a triangular input: 5 V to 5 V , 500 Hz.
R

1k
D1
i1
Vi

D2

1V

i2

R2
0.5 k

R1
1.5 k

Vo

Figure 3.6: Circuit for Example 2.

To start with, we note that D1 allows a current (marked i1 in Fig. 3.6) only from node A
to node B. Similarly, D2 allows a current (marked i2 in Fig. 3.6) only from node B to
node A. When D1 conducts, VAB = VA VB = (0.7 + 1) V + i1 R1 can only be greater
than 1.7 V . When D2 conducts, VBA = VB VA = 0.7 V + i2 R2 can only be greater than
0.7 V , i.e., VAB can only be smaller than 0.7 V . Clearly, the two requirements,
VAB > 1.7 V for D1 to conduct and VAB < 0.7 V for D2 to conduct, are in conflict. As a
result, we conclude that, for a given value of Vi , either D1 can conduct or D2 can
conduct, but not both.
Next, we establish a range of Vi for D1 to conduct. In this case, we have
Vi = i1 R + 0.7 V + 1 V + i1 R1 ,
= 1.7 V + i1 (R + R1 ) .

(3.3)

3.5

Diode circuits

The boundary between D1 conducting and D1 not conducting is given by the condition,
i1 = 0 A, i.e., Vi = 1.7 V . For Vi > 1.7 V , D1 conducts, and we get
Vo = 1.7 V + i1 R1 ,
= 1.7 V + (Vi 1.7 V )

R1
,
R + R1

(3.4)

where we have substituted for i1 using Eq. 3.3.

The slope of the line described by Eq. 3.4 is

R1
= 0.6.
R + R1

When D2 conducts, we have

Vi = 0.7 V + i2 (R + R2 ) .

(3.5)

The condition i2 = 0 A gives the boundary between D2 conducting and D2 not

conducting: Vi = 0.7 V . For Vi < 0.7 V , D2 conducts, and we get
Vo = (0.7 V + i2 R2 ) ,
= 0.7 V + (Vi + 0.7 V )

R2
,
R + R2

(3.6)

R2
= 0.33.
R + R2
For 0.7 V < Vi < 0.7 V , neither D1 nor D2 conducts, there is no voltage drop across R,
and we get Vo = Vi , a straight line passing through the origin, with a slope of 1.
a straight line with a slope of

Putting the three cases together, we get the Vo versus Vi plot shown in Fig. 3.7. Using
Vo
5

D1 off
D2 on

D1 off
D2 off

5
5

D1 on
D2 off

0
0.7

Vi

1.7

Figure 3.7: Vo (Volts) versus Vi (Volts) for Example 2.

this plot, Vo (t) can be constructed for a given Vi (t). For a triangular Vi (t), the output
voltage is shown in Fig. 3.8. The reader is encouraged to compute Vomin , Vomax from Vimin ,
Vimax , and check the results against this plot.
SEQUEL file: ee101 diode circuit 1a.sqproj

3.6

M. B. Patil, IIT Bombay

6

Vimax

Vi

Vomax

2
0

Vo
2

Vomin

4
6

Vimin
0

0.5

1
time (msec)

1.5

Figure 3.8: Vo (t) (Volts) for a triangular Vi (t) for Example 2.

iR1 R1
1k
iD1

R2

iR2

2k
D1 iD2

iR3
D2
R3
3k

Vi
3V

Vo

6V
B

Figure 3.9: Circuit for Example 3.

3. For the circuit shown in Fig. 3.9, plot Vo versus Vi for 20 V < Vi < 20 V .
Let us first establish the range of Vi for which D1 /D2 is on/off. If D2 is on, we have
iD2 > 0 A, VA VB = 6.7 V . With this condition, let us see if D1 can also conduct. Since
VAB = 6.7 V , we have iR3 > 0 A, leading to iR2 = iR3 + iD2 > 0 A, i.e., VCA > 0 V . The
voltage drop VCB = VCA + VAB is therefore positive. For D1 to conduct, we need
VB VC = 3.7 V , or VCB = 3.7 V . Clearly, D1 and D2 cannot conduct simultaneously,
and the problem is now simplified to the following three cases:
(a) D2 on, D1 off: For this condition, we have Vo = VAB = 6.7 V . The value of Vi for
which D2 just starts conducting can be found by using iD2 = 0 A, VAB = 6.7 V , i.e.,
iR1 = iR2 = iR3 = 6.7 V /R3 = 2.23 mA, giving Vi = VAB + iR1 (R1 + R2 ) = 13.4 V .
(b) D1 on, D2 off: For this condition, we have VCB = 3.7 V , and
R3
VCB = 2.22 V . The value of Vi for which D1 just starts conducting
Vo =
R2 + R3
can be found by using iD1 = 0 A, i.e., iR1 = iR2 = iR3 = 3.7 V /(R2 + R3 ), and
Vi = 3.7 V + iR1 R1 = 4.44 V .
(c) D1 off, D2 off: This condition occurs when (a) and (b) do not occur, i.e., for
4.44 V < Vi < 13.4 V . In this case, Vo is given by voltage division, viz.,
R3
Vo =
Vi = 0.5 Vi .
R1 + R2 + R3

3.7

Diode circuits
Fig. 3.10 shows Vo versus Vi for 20 V < Vi < 20 V .
SEQUEL file: ee101 diode circuit 8.sqproj

Vo (Volts)

8
4
0
4
20

10

10

20

Vi (Volts)

Figure 3.10: Vo versus Vi for the circuit of Example 3.

4. For the circuit shown in Fig. 3.11, R4 = 10 k, R1A = R1B = 5 k, R2A = R2B = 1.25 k,
R3A = R3B = 1.25 k, R5A = R5B = 10 k. Sketch Vo versus Vi for 10 V < Vi < 10 V .
iD1
D2

D1

R5A

R2A

A1

R1A
B1

iD2

R3A

VCC = +15 V
iR1A

R4
Vi

Vo
iR4

R3B
B2
D3

R5B A2

R2B

VEE = 15 V
R1B

D4

Figure 3.11: Circuit for Example 4.

Let us first take up the condition that all diodes are off. In this case,
15 V
iR1A =
= 2 mA , giving VA1 = 2.5 , V and VB1 = 5 , V . Similarly,
R1A + R2A + R3A
VA2 = 2.5 , V and VB2 = 5 , V . Since there is no current through R4 , we have Vo = Vi .
Consider Vo = Vi = 0 V which is consistent with the condition that all diodes are off (show
this). As Vi is increased from 0 V , Vo = Vi increases. For D1 to conduct, we need
Vi = VB1 + 0.7 V = 5.7 V , and for D2 to conduct, we need Vi = VA1 + 0.7 V = 3.2 V .
Clearly, as Vi is increased, D2 will start conducting first. Note also that a positive Vi is
not favourable for D3 or D4 to conduct. We therefore have a range of Vi beginning at
Vi = 3.2 V , for which only D2 is on (see Fig. 3.12 (a)).

3.8

M. B. Patil, IIT Bombay

0.7 V

R5A

R1A VCC

R2A

A1

B1
iD2
Vi

Vi R4

0.7 V

iR4

iR1A

R3A

Vo

R5A A
1
VT h

R4

RT h

Vo
iR4

(a)

(b)

Figure 3.12: (a) Circuit of Fig. 3.11 with only D2 conducting, (b) simplified circuit.

Using Thevenins theorem, the circuit can be simplified (see Fig. 3.12 (b)), with
VTh = 2.5 V , RTh = 1.04 k (show this), giving
Vo = Vi R4 iR4 = 0.523 Vi 1.524 ,
VA1 = Vi 0.7 (R4 + R5A ) iR4 = 0.0476 Vi + 2.35 ,
R1A
R2A
VB1 = VA1
+ VCC
= 0.038 Vi + 4.88 .
R1A + R2A
R1A + R2A

(3.7)
(3.8)
(3.9)

As Vi is increased, VD1 = Vo VB1 increases (see Eqs. 3.7 and 3.9). When VD1 becomes
equal to 0.7 V , D1 begins to conduct. The corresponding value of Vi is obtained by using
the condition, Vo VB1 = 0.7 V , and solving for Vi using Eqs. 3.7 and 3.9. This gives
Vi 8.4 V .
When D1 starts conducting (in addition to D2 ), the slope of the Vo versus Vi plot
changes. To find this slope, we redraw the circuit (see Fig. 3.13 (a)) and find RTh , the
Thevenin resistance as seen from P Q. For this purpose, we deactivate the voltage
0.7 V
(a)

0.7 V

Vo

Vi

R5A

A1

R2A
B1

R4

R1A

VCC

R3A
RT h
Q
(b)
P

R5A

A1

R2A

R1A
B1

R3A

Figure 3.13: (a) Circuit of Fig. 3.11 with D1 and D2 conducting, (b) Computation of RTh .

sources (see Fig. 3.13 (b)) and get RTh = [(R5A k R2A ) + R3A ] k R1A = 1.6 k. The slope

3.9

Diode circuits
dVo
is then given by,
dVi

RTh
dVo
=
= 0.138 (Show this.)
dVi
RTh + R4

(3.10)

Combining the above three cases, viz., (a) all diodes off, (b) only D2 on, (c) D1 and D2
on, and using symmetry between the upper and lower parts of the circuit (see Fig. 3.11),
we get the Vo versus Vi curve shown in Fig. 3.14 (a). If a triangular input Vi (t) is applied,
the output Vo (t) is almost sinusoidal (see Fig. 3.14 (b)). For this reason, this circuit is
called triangle-to-sine converter.
1

5
10

Vi (V )

Vo (V )

Vo (V )

2
0

2
5

10

(b)

(a)

6
5

10

10

Vi (V )

0.5

1.5

t (msec)

Figure 3.14: (a) Vo versus Vi for the circuit of Fig. 3.11. Region 1: D3 and D4 on, Region 2:
D3 on, Region 3: all diodes off, Region 4: D2 on, Region 5: D1 and D2 on, (b) Vo (t) for a
triangular input Vi (t).

The reader is encouraged to simulate the circuit and plot versus Vi the diode currents,
iD1 , iD2 , iD3 , iD4 , and the node voltages, VA1 , VB1 , and verify that they conform with the
above analysis.
SEQUEL file: triangle to sine 1.sqproj
5. For the half-wave rectifier circuit shown in Fig. 3.15 (a), C = 1 mF , = 200 , Vm = 10 V .
Estimate the peak diode current.
Let us consider the diode to be ideal, with Von = 0 V , which results in the output
waveform shown in Fig. 3.15 (b). In the discharging phase (Fig. 3.16 (b)), the diode is off,
and the capacitor discharges through R. In the charging phase (Fig. 3.16 (a)), the
capacitor charges with a time constant = C (R k Ron ), which is very small since the on
resistance of a diode (Ron ) is small. The charging process therefore takes place
instantaneously, and Vo and Vi coincide with each other, as seen in Fig. 3.15 (b).
In a well-designed rectifier circuit, the charging phase is much shorter than the
discharging phase so that the ripple voltage is minimized. This observation has an
important implication for the diode current, as we explain in the following.

3.10

M. B. Patil, IIT Bombay

T

(T t)
10

iD

Vo

D
5

iR

iC
Vi

Vi
0

Vo

C
R

Vm cos t
f = 50 Hz

5
10

10

20

30

t (msec)

(a)

40
(b)

Figure 3.15: (a) Circuit for Example 5, (b) Vi and Vo versus time, with Von = 0 V .
Von

iD

iR

iC
Vi

Vo

iR

iC

Vo

(a)

(b)

Figure 3.16: (a) Charging phase, (b) discharging phase for the Circuit of Fig. 3.15 (a).

In steady state, the charge gained by the capacitor in the charging phase is equal to the
charge lost in the discharging phase. Refering to Fig. 3.15 (b),
Z

T t

(iD iR ) dt =

T t

iR dt

i.e,

1
T

1
iD dt =
T

iR dt .

(3.11)

In other words, the average values of the diode current and the load (resistor) current
must be exactly equal. Since the diode current flows for a small interval ((T t) to T ),
it is clear that the peak value of iD would be much larger than iR if their average values
are to be the same. Let us now estimate iD (t).
Consider the charging phase shown in Fig. 3.16 (a). Since the diode drop is assumed to
be 0 V ,
dVo
dVi
=C
= CVm sin t ,
dt
dt
Vm
,
iD (t) = iC (t) + iR (t) CVm sin t +
R
iC (t) = C

(3.12)
(3.13)

since Vo Vm . To estimate the peak diode current, we need to find t in Fig. 3.15 (b).
As an approximation, we first compute the ripple voltage from
iR =

Vm
VR
T
C
VR = Vm
= 1V .
R
T
RC

(3.14)

3.11

Diode circuits
The charging interval t can now be obtained by using (see Fig. 3.15 (b)),
Vo (T t) = Vo (t) = Vm VR ,
Vm cos (t) = Vm VR ,

or

(3.15)
(3.16)

giving t = 25.8 . The peak diode current occurs at t = T t (which is the same as
t = t because the waveform is periodic) since, at that time in the charging phase,
dVo
iC =
is maximum; therefore we have,
dt
imax
= CVm cos(t) +
D

Vm
= 1.3 A ,
R

(3.17)

which agrees well with the simulation result shown in Fig. 3.17 (a).
The diode current plot we have obtained gives a reasonable estimate of imax
D ; however,
the exact shape of iD (t) would depend on the on resistance of the diode and also on
which diode model is used. For example, with Ron = 0.5 , the peak diode current
reduces, as shown in Fig. 3.17 (b).
1.6
(a)

(b)

iD (A)

1.2
0.8
0.4
0
0

10

20

30

40

50 0

t (msec)

10

20

30

40

50

t (msec)

Figure 3.17: Diode current iD (t) for the half-wave rectifier of Fig. 3.11: (a) Ron = 1 m,
(b) Ron = 0.5 .

On the other hand, the ripple voltage would be relatively insensitive to the diode on
resistance since its computation depends on the capacitor discharge through the load
resistor only. The reader is encouraged to simulate the circuit with the Shockley model
as well and see how it affects the ripple voltage and diode current.
This is a good example to demonstrate that a good knowledge of the circuit behaviour is
indispensable in making a judicious choice of device models in circuit simulation.
Depending on what information we are looking for, we could choose different models.
Simple models (such as the Ron /Roff model) are attractive from the computation point of
view, but complex models (such as the Shockley model which involves eV /VT ) may be
necessary for higher accuracy in certain cases.
SEQUEL file: ee101 half rectifier.sqproj

3.12

M. B. Patil, IIT Bombay

15

Vi (V )

VC
1 F
Vo

Vi

10
5
0
5

t1 t2
(a)

t (msec)
(b)

Figure 3.18: (a) Circuit for Example 6, (b) Input voltage Vi versus time.

6. For the circuit shown in Fig. 3.18 (a), assume that the diode has Von = 0 V . The
capacitor is initially uncharged. Plot Vo versus time.
This circuit is easy to understand when we recognise the following features:
(a) The capacitor can only charge (with the polarity shown in the figure) since the
diode allows current only in one direction.
(b) Once the capacitor is charged to a maximum value, it holds the charge for ever
since there is no discharge path.
(c) Since the diode has a small on resistance, the charging process is instantaneous.
It is instructive to view the circuit as an RC circuit (see Fig. 3.19 (a)) with C initially
uncharged and the diode replaced by a resistance RD which is small if VD > 0 V and
large if VD < 0 V . Up to time t1 , Vi > 0 V , and a current would flow from A to B.
However, since RD is very large in this direction, the current is almost zero, and the
capacitor voltage does not change up to t = t1 .
20
15

VC
A
1 F
Vi

10
5

VC

VD

RD

Vo

Vi

t1
(a)

t2

t (msec)
(b)

Figure 3.19: (a) Equivalent circuit for Example 6, (b) Vi , VC , and Vo (= VD ) versus time.

After t1 , Vi becomes negative, the current direction is from B to A, and because of a

small RD in this current direction, the capacitor charges instantaneously. In other words,
since the diode is replaced by RD 0 , we have VC (t) = Vi (t).

3.13

Diode circuits

At t = t2 , VC (t) = (5 V ) = +5 V . This is the maximum possible value for VC (since

5 V is the maximum negative value of Vi ). For t > t2 , VC can only decrease, but that
would require a reverse current flow in the diode, which is ruled out. Therefore, VC (t)
remains constant after t2 at VC = 5 V (Fig. 3.19 (b)).
Since Vo (t) = Vi (t) + VC (t) (see Fig. 3.18 (a)), the net effect is that, for t > t2 , Vo is simply
a shifted version of Vi (t). The output voltage is thus clamped at the lower end at 0 V .
SEQUEL file: ee101 diode circuit 6.sqproj

3.3

Exercise Set:

1. For the circuit shown in Fig. 3.20, find iR1 , iR2 , iR3 , assuming Von = 0.7 V for the diode.
(Hint: First, find iR3 by replacing the combination of R1 , R2 , VCC with a Thevenin
equivalent circuit.)
SEQUEL file: ee101 diode circuit 9.sqproj
iR1

VCC = 10 V

R1
5k

iR2
R2
15 k

iR3
R3
1.25 k

Figure 3.20: Circuit for Exercise 1.

2. For the circuits shown in Figs. 3.21 (a) and (b), assume Von = 0.7 V for all diodes.
(a) Plot Vo versus i for the circuit in Fig. 3.21 (a).
(b) Repeat for the circuit in Fig. 3.21 (b).
(c) By simulation, obtain plots of the diode currents (iD1A , iD2A , iD1B , iD2B ) versus i,
and validate your approach in (b).
SEQUEL file: ee101 diode circuit 10.sqproj
3. In the full-wave rectifier circuit shown in Fig. 3.22, R = 1 k, C = 200 F , Vm = 20 V (peak
source voltage), f = 50 Hz. Assume Von = 0 V for the diodes.
(a) Estimate the ripple voltage.
(b) Estimate the peak diode current.
(c) Find the maximum reverse voltage seen by each diode.

3.14

M. B. Patil, IIT Bombay

V0

V0

R1A

R1A

D1A
i

R1A
R0

D2A

R2A

D1A

R1A
R0

i
Vo

R0 = 20 k

R2A

R1A = R1B = 15 k

D1B

R1B

D2B

R2B

Vo

R2A = R2B = 5 k

R1A
= R1B
= 60 k

R1B

R2A
= R2B
= 10 k

V0 = 15 V

R2B

V0

(a)

(b)

Figure 3.21: Circuits for Exercise 2.

(d) Verify your results with simulation.

(e) Repeat with Von = 0.7 V for the diodes.
SEQUEL file: diode rectifier 4.sqproj

D1

Vi

D3

Vo

C
R
D4

D2

Figure 3.22: Circuit for Exercise 3.

4. In the clamped capacitor circuit of Fig. 3.18,

(a) How will the output voltage change if Von = 0.7 V for the diode (instead of 0 V )?
(b) If a load resistance, R = 5 k, is connected across the diode, how will Vo change?
(c) Verify your results with simulation.
SEQUEL file: ee101 diode circuit 6.sqproj
5. In the circuit shown in Fig. 3.23, Vi (t) = Vm sin t, with Vm = 10 V and f = 1 kHz. D1 is
a diode with Von = 0.7 V and no reverse breakdown. D2 is a Zener diode with Von = 0.7 V
and VZ = 4.3 V .
(a) Starting from VC = 0 V at t = 0 s, sketch Vo (t) for the first two cycles.

3.15

Diode circuits
(b) What will happen if RL = 10 k is connected as shown?
(c) Verify your results with simulation.
SEQUEL file: ee101 diode circuit 11.sqproj
VC
0.1 F
D1
Vi

RL

Vo

D2

Figure 3.23: Circuit for Exercise 5.