All-In-One Electronics Guide Your Complete Ultimate Guide To Understanding and Utilizing Electronics!
All-In-One Electronics Guide Your Complete Ultimate Guide To Understanding and Utilizing Electronics!
All-In-One Electronics Guide Your Complete Ultimate Guide To Understanding and Utilizing Electronics!
Electronics Guide
A comprehensive electronics overview for electronics engineers, technicians, students,
educators, hobbyists, and anyone else who wants to learn about electronics
III
IV
Introduction
The semiconductor industry is a big business. The electronics industry is even bigger. The
semiconductor industry alone was a US $300 billion plus industry in 2012. The long-term
trend of electronics is bright and promising. With increasing use of electronic devices in
consumer, commercial, and industrial products and systems, the electronics industry is
always growing. If you are considering becoming an electronics engineer, this book gives
you the technical skills needed to pass the technical parts of interviews and the
confidence to increase your chances of getting employed. If you are already an electronics
technician or engineer, this book improves your ability to perform at the highest level at
work in the electronics field. If you want to be a microelectronics engineer or are already
one, you will find the microelectronics-related contents in this book applicable to your
work. If you are an educator teaching electronics, this book is the perfect reference for you
and your students with step-by-step technical examples and quizzes. If you are an
electronics hobbyist, this book offers sampled electronic circuits (electronic components
connected with each other by wires or traces) you can apply to your design. For everyone
else interested in learning about electronics, this book provides a strong foundation of
what you need to know when working with electronics.
The chapters are divided into various electronic principles levels, from basic to advanced,
along with practical circuits and quizzes. Answers provide step-by-step explanations of
how and why the answers were derived. Examples and circuits in later chapters build upon
previous chapters, thus creating a consistent flow of learning and a gradual accumulation
of knowledge. The level of mathematics is moderate without tedious and complicated
math models and formulas. For students majoring in electrical engineering, this book is
more than your typical academic electronics textbook that overwhelms you with excessive
theories, formulas, and equations. Instead, the material covered in this book is easy to
read, with plenty of diagrams, pictures, waveforms, and graphs, and is easy to understand.
Accurately representing our non-ideal world, this books technical contents greatly differ
from most academic textbooks false ideal perspective. The content is injected with real
world quantities and characteristics. For experienced electronics professionals, educators,
and hobbyists, this book affords a good reality check and comprehensive review to assist
your career or your students, to better prepare for your next job interview, and to inspire
your next electronics projects.
Chapter 2: Diodes
Zero in on diode, the building block of transistors. This chapter explains not only what a
diode is made of but also the real world characteristics of diode and some practical diode
circuits.
density digital designs such as Application Specific Integrated Circuit (ASIC), Field
Programmable Gate Array (FPGA), or microprocessors, digital designers often use
software to write programs/code for generating CMOS design. Using VHDL or Verilog,
instead
Chapter 6: Communications
Electronic communications are technology. It is an enormous businesses. Radios, cell
phones, home and business computers connected to the internet by using either wired or
wireless connections are just some examples. The vast majority of this technology is only
possible due to the advanced development of electronic communication systems.
Additionally, amplitude modulation, frequency modulation, and phase locked loops will
be discussed in this chapter. Understanding basic communication theories, techniques, and
parameters will greatly assist your work in the communications engineering field. the
foundation of wired industry with its market and wireless communications
covering both consumers and
Chapter 7: Microcontrollers
Microcontroller silicon chips have found their way into a variety of electronic products.
One automobile alone has an average of eighty microcontrollers controlling the engine,
steering wheel controls, GPS, audio systems, power seats, and others. Microcontrollers are
embedded in many consumer and industrial electronics including personal computers, TV
sets, home appliances, childrens toys, motor control, security systems, and many more.
The final products that use microcontrollers are embedded systems. These devices are
field programmable: they allow system designers to program the chip to the needs of a
specific application, while letting end users perform a limited amount of modification. For
example, an end user turning on a microwave oven is actually programming the timer.
However, the end user does not have access to the source code on the microcontroller,
hence the name embedded systems. Moreover, the same microcontroller can be used in
multiple designs. For instance, dishwashers and refrigerators use the same microcontroller
with each design having its own specific code downloaded to the microcontroller,
resulting in two completely different applications. The microcontrollers field
programming capabilities allows many applications to be designed at a very low cost.
Comprehending microcontroller architecture and basic programming techniques will
prepare you to excel in this field.
Current
________________________________________________________________________
- 1 Resistor
________________________________________________________________________
- 1 Voltage
________________________________________________________________________
- 5
Definition______________________________________________________________________
- 5 Ohms
Law______________________________________________________________________
- 6 Power
_________________________________________________________________________
- 7 Voltage Source and Schematic
______________________________________________________ - 7 Current Source
and Schematics _____________________________________________________ - 8
Electrons
_______________________________________________________________________ 8 Current versus
Electrons___________________________________________________________ - 9
Kirchhoffs Voltage Law (KVL)
______________________________________________________ - 9 Kirchhoffs
Current Law (KCL)______________________________________________________ 11 Parallel Circuit
__________________________________________________________________ - 11
Parallel Resistor Rule
____________________________________________________________ - 12 Series
Resistor
Rule______________________________________________________________ - 13
Current Divider Rule
_____________________________________________________________ - 15 Voltage
Divider _________________________________________________________________
- 16 Superposition
Theorems__________________________________________________________ - 19
DC Circuits
_____________________________________________________________________ - 22
IC Packages
____________________________________________________________________ - 24
Summary
______________________________________________________________________ 33 Quiz
__________________________________________________________________________
- 33
Vrms
_________________________________________________________________________
- 54 Impedance, Resistance, and
Reactance______________________________________________ - 54 Capacitors
_____________________________________________________________________ - 55
XC versus
Frequency_____________________________________________________________ 56 Simple Capacitor Circuit
__________________________________________________________ - 57 I (t) = C
(V)___________________________________________________________________ 59 Capacitor Charging and Discharging
Circuit___________________________________________ - 60 Parallel Capacitor
Rule ___________________________________________________________ - 63
Series Capacitor Rule
____________________________________________________________ - 63 Power
Ratio in dB
_______________________________________________________________ - 64 R C
Series Circuit
________________________________________________________________ - 64
20 dB per Decade
______________________________________________________________ - 65 LowPass Filter
_________________________________________________________________ - 68
Phase Shift
____________________________________________________________________ - 69
Radian
________________________________________________________________________
- 70 ICE
___________________________________________________________________________
- 71 Inductors
______________________________________________________________________ 73 XL versus Frequency
_____________________________________________________________ - 74 V (t) =
L (I) ___________________________________________________________________
- 75 ELI
___________________________________________________________________________
- 77 Q Factor
_______________________________________________________________________ 77 Parallel Inductor Rule
____________________________________________________________ - 78 Series
Inductor Rule
_____________________________________________________________ - 79 HighPass Filter
_________________________________________________________________ - 80
Real L and C
____________________________________________________________________ - 83
Practical AC Circuits
_____________________________________________________________ - 85 Ringing
and Bounce _____________________________________________________________
- 86 Inductive
Load__________________________________________________________________ 87 Diode Clamp
___________________________________________________________________ - 88
Series R L C
Circuit_______________________________________________________________ 89 LRC Parallel (Tank)
Circuit_________________________________________________________ - 91
Transformers__________________________________________________________________
- 93 Half-Wave
Rectifier______________________________________________________________ 95 Switching versus Linear Regulators
_________________________________________________ - 97 Buck Regulator
_________________________________________________________________ - 97
Summary
_____________________________________________________________________ 100 Quiz
_________________________________________________________________________
- 101
____________________________________________________________ - 114
Common Emitter Amplifier
______________________________________________________ - 115 Common
Collector Amplifier (Emitter Follower)______________________________________ 118 Common Base
Amplifier_________________________________________________________ - 120
Single-Ended Amplifier Topologies Summary
________________________________________ - 121 Tranconductance (Gm), SmallSignal Models ________________________________________ - 121 Common
Emitter Amplifier Input Impedance ________________________________________ 123 Common Emitter Amplifier Output Impedance
______________________________________ - 124 Common Collector Amplifier
Small-Signal Model _____________________________________ - 127 Common Base
Amplifier Small-Signal Model ________________________________________ - 128
Single-Ended Amplifier Summary
_________________________________________________ - 129 NMOS and PMOS
______________________________________________________________ - 130 3D
NFET
______________________________________________________________________ 131 Drain Current and Threshold Voltage
______________________________________________ - 132 NFET and PFET
Symbols _________________________________________________________ - 132 IC
Layout
_____________________________________________________________________ 134 VHDL and Verilog
______________________________________________________________ - 135
MOSFET Cross Section and Operations
_____________________________________________ - 136 MOSFET On-Off
Requirements____________________________________________________ - 137 ID
versus VDS Curve
____________________________________________________________ - 139 CMOS
Source Amplifier _________________________________________________________
- 139 MOSFET Parasitic
______________________________________________________________ - 142
Common Drain Amplifier (Source Follower)
_________________________________________ - 143 Common Gate
Amplifier_________________________________________________________ - 145
Bipolar versus CMOS
___________________________________________________________ - 147
Differential Amplifiers
__________________________________________________________ - 148
___________________________________________________________ - 219
Table of Contents XV
Analog-to-Digital Converter
______________________________________________________ - 219 Nyquist
Frequency _____________________________________________________________ 221 ADC Gain and Offset Errors
______________________________________________________ - 222 Digital-toAnalog Converter ______________________________________________________ 224 Binary-Weighted DAC
___________________________________________________________ - 225 555Timer
____________________________________________________________________ - 226
Summary
_____________________________________________________________________ 230 Quiz
_________________________________________________________________________
- 230
MCU
Parameters_______________________________________________________________
- 248 Harvard Architecture
___________________________________________________________ - 251 Data and
Program Memory ______________________________________________________ 251 MCU Instructions
______________________________________________________________ - 255
Instruction Clock
_______________________________________________________________ - 257
Internal Oscillator
______________________________________________________________ - 258
Interrupt
_____________________________________________________________________ 260 Special Features
_______________________________________________________________ - 261
Development
Tools_____________________________________________________________ - 262
Debugger_____________________________________________________________________
- 263 Design Example:
Comparator_____________________________________________________ - 265
Design Example: Timer
__________________________________________________________ - 269 Summary
_____________________________________________________________________ 271 Quiz
_________________________________________________________________________
- 271
Current
Electrical current is quantified as change ( or delta) of electron charge (Q) with time.
Think of it as flow rate in plumbing. measure of charges (Q) flowing through a point
(node) with time (see figure 1.0). Currents unit is amperes (A) with I being its symbol.
Electrical current is a the number of electron
Table 1-1: Resistor band color, digit values, multiplier, and tolerances
Lets apply this to an example. What is the resistance of the carbon resistor that has
Brown, Orange, Red, and Gold bands? First, brown yields 1; orange means digit 3;
red multiplier means 100; gold represents 5% tolerance. The resistance is therefore
calculated as:
13 X 100 = 1,300 or 1.3 k with 5% tolerance.
Figure 1.1b:
Surface-mount resistor
Surface-mount resistors, on the other hand, are popular due to their miniature sizes. They
are ideal for portable applications when small size is necessary. Figure 1.1b shows several
surface-mount resistors. A surface-mount resistor can be measured as small as 0.2 mm
(millimeter) X 0.4 mm (millimeter). Because surface-mount resistors are small, in order to
determine their values, numbering codes are used instead of color bands. The numbers
printed on the resistor are usually 3-digit numbers.
The first two numbers represent the first two digits of the resistor values while the third
digit represents the number of zeros. For example, a resistor marked with 203 means 20 X
1,000 or 20 k. A 105 resistor gives 10 X 105 or 1 M. Resistors manufactured by
microelectronics technology use different methods to determine resistances. Depending
upon the chip manufacturing process, there can be multiple resistor types, ranging from
metal and thin-film to poly resistors. The resistances are determined by the vertical and
horizontal dimensions in conjunction with the sheet rho (pronounced as row) resistance.
Sheet rhos units are in per square ( / square). For example, a Bipolar-CMOS
(BiCMOS) process thin-film resistors sheet rho is specified as 1,000 / square. Length
/ Width defines the square numbers. If the resistors length and width are drawn as 10
micrometers (um) by 10 micrometer (um) respectively, the number of square equates to 10
um / 10 um = 1. The resistance is then calculated as:
Regarding the chip manufacturing process, in addition to sheet rho resistances, each
process offers a slew of devices with a unique set of parameters. Below are some common
ones you will likely encounter. Transistors minimum geometries: CMOS uses gate length
where bipolar transistors use emitter width. Transistors maximum operating frequencies:
capacitors capacitance per unit area; temperature coefficient (it determines how much
variations device parameter changes with temperature); maximum voltage supply and
break down voltages; transistors drawn versus manufactured dimensions, metal level
numbers available, and many more. Further explanations of these parameters will be
discussed later in this book. Full understanding of these parameters is necessary before
deciding on a process to use for a particular chip design. Further details on microelectronic
design will also be discussed in later chapters.
Voltage
Voltage is the potential difference (subtraction) between two points (nodes). The object of
these points can be any material. The most common materials are electronic devices such
as resistors, diodes, and transistors, which are the main focus of this book. Each electrical
parameter has its own symbol and unit. They are summarized in table 2-1.
Table 2-1:
V, I, R symbols; units
Definition
Direct current (DC) states that electrical current flows through a resistor without changes
in amplitudes or frequencies. A waveform can be used to make clear such phenomenon. A
waveform is a time (transient) domain graph that shows quantities such as voltage,
current, or power on the vertical (Y-axis); time on the horizontal (X-axis) (see figure 1.2).
In this waveform, the DC voltage level stays the same over time while the frequency of
DC is zero. We will further define amplitude and frequency in chapter 3, AC.
Ohms Law
Ohms law states that when there is a voltage developed (drop) across a resistor, i.e.,
voltage difference between two resistor ends (nodes), electrical current is bound to flow.
The mathematical relationship between voltage (V), current (A or Amp), and resistance
():
Figure 1.4:
Slope equals resistance
safe level, resistance needs to increase. For example, to lower the current to 1 mA, 1 V
source yields:
R = (1 V / 1 mA) = 1,000 or 1 k
Note: k = 1 X 103 = 1,000
Many portable electronic designs draw less than 1 mA of current to conserve battery life
resulting in large values of R. This explains why thousands or even hundreds of thousands
of are frequently seen.
Power
Power (P) definition:
P = I2 X R or V2 / R
The unit of power is Watts (W) and its symbol is P. A modern smartphone power
amplifier consumes about 300 mW (milliwatt) in idle mode. With 4 V lithium-ion battery
(a popular cell phone battery type), antenna load resistance can be calculated:
300 mW = 42 / R R = 53.33
input. Load examples are motors, electric fans, lights, etc. An ideal DC voltage source has
zero internal resistance, capable of sourcing (sending) and sinking (receiving) infinite
current amount to and from the load. A non-ideal voltage source contains finite (non-zero)
internal resistance and cannot supply or receive infinite current amount. The most
common DC
although the majority of schematics are entered into computer software. This makes it
very easy to design and modify electrical schematics. Popular electronic schematic
software tools will be discussed in chapter 4, Analog Electronics. Ideally, ground is at
absolute 0 V with zero resistance. Keep in mind real-world ground has non-zero
resistance. The ground signal amplitude depends on multiple factors (mostly from
electrical noise), which will be discussed later on. The current source symbol in figure
1.5a contains an arrow signifying the current flow direction. Both triangular and
horizontal line ground symbols are interchangeable although some use the triangular
symbol strictly for power ground; the horizontal symbol for signal ground. Triangular
ground symbols are used throughout this book.
Electrons
An atom is made up of tiny particles: protons (positive charge), neutrons (neutral), and
electrons (negative charge). Protons and neutrons are in the center of an atom while
electrons surround the nucleus. Electrons are ions (particles) containing negative charges.
Difference in electron and proton numbers gives rise to various atom structures (chemical
elements). In this book, we mainly microelectronics, such as silicon and attracted to
positive charges (terminals and polarities). The symbol Q quantifies electron charges.
The unit of Q is coulomb (C). One electron charge holds:
focus on chemical elements that are used in
germanium. The negatively-charged electrons are
KCL states that current going into (passing through) a point (node) is equal to current
coming out of the same node. We could use the same circuit in figure 1.7 to examine this
theory. This is a series circuit. The current goes into left-hand side (node) of the resistor,
and thus is equal to the right side of the resistor. We will use a parallel circuit in the next
segment to further explain KCL.
Parallel Circuit
Series circuit states that current only flows in one direction. In parallel circuits however,
current flows in more than one direction (see figure 1.8).
You may notice that the equivalent resistance of multiple resistors is always slightly less
than the smallest resistor among the resistor groups. From the above example, the
equivalent resistance of 1 , 2 , and 5 is 0.58 . Its less than the smallest resistor
value 1 . This gives you a quick way of knowing if the equivalent resistance you come
up with makes sense or not. Note that if the resistor numbers in parallel are exactly the
same sizes, the equivalence resistance is calculated as resistance of one resistor divided by
the total resistor number, e.g., 10 || 10 || 10 = 3.33 ( 10 / 3 = 3.33 ). This rule,
however, doesnt apply to parallel resistors that have different sizes.
We then further consolidate the two resistors (T and R_eq) into one resistor. We will call it
R_total. Using series resistor rule, R_total = T + R_eq = 10 + 5 = 15 . The
consolidated one voltage source, one resistor circuit is shown in figure 1.13.
Figure
1.13: Simplified one voltage, one resistor circuit
We now can simply use Ohms law to calculate I_TOTAL. I_TOTAL = 5 V / 15 =
0.33 A. At this point, we can apply KVL to make sure the analysis is valid. 5 V + ( 0.33
A X 15 ) = 0 V To figure out I_A, I_B, we first calculate the voltage drop across T using
Ohms law:
Voltage Drop across T = (I_TOTAL) X (T) = 0.33 A X 10 = 3.33 V
Since voltage at left side of T is 5 V and the voltage drop across T is 3.33 V, the voltage at
the right-hand side of T (node A and B) is:
Voltage Drop across T = (Voltage at Left Side of T) (Voltage at Right Side of T) 5 V
(Voltage at the Right Side of T) = 3.33 V
(Voltage at the Right Side of T) = 5 V 3.33 V = 1.67 V
Its crucial to recognize that voltage across a device means the difference (subtraction)
between two nodes. Now we can use Ohms law again to calculate I_A and I_B. Because
voltage at right side of T is common to node A and B (Voltage at Node A = Voltage at
Node B):
I_A = (Voltage at Node A) / A = 1.67 V / 10 = 0.167 A I_B = (Voltage at Node B) / B
= 1.67 V / 10 = 0.167 A
To prove the analysis is correct, simply use KCL which states that I_TOTAL = I_A + I_B
I_A + I_B = 0.167 A + 0.167 A = 0.33 A = I_TOTAL, it checks out!
Notice if both resistor sizes are the same on each branch, the current amount will be
equally divided in a parallel circuit. If the resistors A and B are different sizes, the current
is less on the branch that has the larger resistor and vice versa. This concept is illustrated
in figure 1.14.
In this example, I_total = 2 A, A = 20 , B= 10 :
This shows that I_A is less than I_B (As resistance > Bs resistance). To further prove
this is correct, apply KCL:
I_total = I_A + I_B = 0.66 A + 1.33 A = 2 A It checks out!
Voltage Divider
The voltage divider is used all too often. We will start with the definition then use simple
circuits to explain it. Just like it sounds, a voltage divider divides voltage. The word
divides does not mean there is a mathematical division; it means the voltage is
reduced by the resistors. Below is a simple series circuit (see figure 1.15) to explain
voltage divider.
RA is in the numerator when calculating VA. RB is in the numerator when calculating VB.
VA and VB are simply the ratio of individual resistance (RA, RB) over the sum of all
resistances (RA + RB) in the circuit. If you look closely, the VA, VB formula comes from
Ohms law and series circuit rule. We know that the current going through A and B are the
same (series circuit rule). VA / 10 = VB / 10 . This current can be calculated from the
10 V source in series with RA + RB (Ohms law):
each branch is the same: by using Ohms law, KVL and KCL. One interesting fact is that if
the resistance is larger than the other(s), such resistor would have the most voltage drop
across it. This is demonstrated in figure 1.17, where resistor B value is larger than A, thus
voltage
drop across B is larger than A. This observation is exactly opposite to the current divider
rule where larger R sought smaller I and vice versa. In figure 1.17, lets assume
RA = 5 , RB = 10
To seek the voltage drops across RA and RB, we use the voltage divider formula:
Superposition Theorems
So far, weve focused only on one voltage source circuit. Practical circuits have more than
one voltage and/or current source. Numerous theories exist which attempt to explain how
the circuits are analyzed in academic textbooks (Thevenin, Norton, and Mesh, just to
name a few). I decided to use superposition because of its simplicity. By definition,
superposition states that if a circuit contains multiple voltage or current sources, any
voltage at a node within the circuit is the algebraic voltage sum found by calculating
individual voltage one at a time. Furthermore, any voltage source will be seen as a short to
ground when calculating other voltages in the remaining circuit. Any current source will
be seen as open circuit. Lets use a simple example to understand superposition (see figure
1.18).
3)
Second circuit: The 5 V DC source is shorted to ground (see figure 1.20).
By inspection, figure 1.20 is transformed to figure 1.21. This is a series circuit where the
voltage drop across 3.33 k is between Vx_2 and ground (0 V). Ohms law states that
Vx_2 = 100 uA X 3.33 k = 0.333 V when a 100 uA fixed current source flows through
3.33 k.
DC Circuits
1) What is the difference between an ideal and non-ideal voltage source?
This question leads to the understanding of voltage source and voltage divider non-ideal
characteristics.
Rules:
Ideal voltage source: Zero internal resistance
Non-ideal voltage source: Non-zero (finite) internal resistance Ideal current source:
Infinite internal resistance
Non-ideal current source: Non-zero (finite) internal resistance
A non-ideal voltage source can be viewed as a voltage divider. Figure 1.22 demonstrates
this concept. If it were an ideal voltage source, internal resistance would be zero . The
voltage at node A will be exactly the same as voltage originating from the voltage source.
If node A is the output voltage, input would be the same as the output. In a not-so-perfect
world, voltage source would have finite internal resistance. This finite resistance
originating from the voltage source makes the circuit look just like a voltage divider.
Voltage at node A is no longer the same as the original voltage source. In a non-ideal
world, when you connect a voltage source to a resistor, the output will not be exactly the
same as the input. High quality power supplies offer extremely low internal resistance
(still non-zero), and your output is almost the same as the input. Its for this reason
voltage divider is seldom used as a constant voltage source. Using Figure 1.22 as an
example, if the original voltage source on the left is 10 V, the intended voltage output is 5
V at node A. By design, we set both resistors to have the same values (voltage divided by
half) so that 5 V at node A can be obtained. In reality, the voltage at node A wont be
constant at 5 V. Firstly, any changes from the original input source will change the voltage
at node A (again by the voltage divider action). Secondly, any change in the resistances
(e.g., caused by temperature variations) will also change the voltage at node A. To achieve
a more stable voltage output, low drop-out and switching regulators are used, which will
be discussed later in this book.
sampled circuits, application notes, and package information. Thorough device datasheet
understanding allows you to decide quickly if the part is right for your design. A datasheet
is a document provided by the electronic system component manufacturers that details
specific device name, number, features, functions, and parameters related to the device
electrical performances. Many datasheets come with electrical test and characterization
graphs along with devices dimensions. Some even provide sampled application circuits.
IC Packages
Leading semiconductor companies all design and produce integrated circuits (ICs), which
and Siliconware Precision Industries. The IC package could come with interface pins or
ball-shaped bumps that connect to the other ICs or devices at the board level. Figure 1.25a
shows a Microchip Technology Analog-to-Digital Converter (ADC) IC with a package
length of about 10 mm long.
Figure 1.26 illustrates the current flow direction from higher potential to lower (left to
right). Notice the two horizontal lines symbol representing voltage source symbol.
Figure 1.27:
Voltage divider
5) There are many kinds of electronic measuring instruments. The most basic ones are
multimeter, oscilloscope (scope), function generator, and DC power supplies. There are
analog and digital multimeters (DMM). Both have the abilities to measure voltage and
current. An analog multimeter has a needle to display the measurement results.
discussed shortly in chapter 3, AC. A simplified graphical DMM view is shown in figure
1.29. I, V, and COM are terminals. Test cables and leads are plugged into these
DMM terminals. The other ends of the cables connect to the device being measured.
COM corresponds to common that should be connected to the lowest potential (ground
or the most negative supply voltage) during the measurement. Size, accuracy, range
numbers, resolutions (the smallest values the DMM could measure), maximum voltage,
current ranges are criteria in choosing DMMs. Aside from knowing how DMM works,
understanding how it measures voltages helps you troubleshoot your circuits much
quickly. We use the voltage divider to expand this idea further (see figure 1.30).
Figure 1.31:
DMM measures current
Figure
1.32: Agilent Power supply, multimeter, U3606A
6) Is it true that if you have voltage, you always have current? What about the circuit in
figure 1.33? What is the voltage at node A assuming 9 V is an ideal source? The answer is
no, not always. The circuit below is a series circuit with a broken loop. No current is able
to flow through the loop due to infinite resistance from the open circuit. Using Ohms law,
there is 0 V drop across the resistor, V = I X R = 0 X R = 0 V The resistor potential
difference can be derived:
(9 V Voltage at Node A) = 0 V
Then, Voltage at node A = 9 V
Summary
DC electronics are the most basic, easy to learn electronic theory. The chapter started with
basic electronic properties (voltage, current, and resistor). Basic electronic principles were
then discussed: Ohms law, KVL, and KCL. We then went over series and parallel
resistors rules, and voltage-current divider rules explained by practical circuit examples.
Superposition theorems, IC package, electronic measuring apparatus, non-ideal
characteristics of voltage, current sources, and resistors were reviewed. Once you become
proficient in basic electronics principles, you can then apply theories to explain and
analyze any circuits with ease. This builds up a strong foundation for further study, use,
and applications of more complex electronics.
Quiz
1) Show current flow direction and amount of current, if any (see figure 1.38).
Chapter 2: Diodes
Diodes are passive electronic devices that do not generate electrical energy or power.
Passive devices only dissipate or store energy. Resistors and diodes are examples of
passive devices. Diodes are made of P (positive) and N (negative) type junctions. They are
the building blocks of transistors. Transistors, by far, are the most widely used electronic
components in electronic systems. Diodes are used in many electronic circuits that we
encounter daily. Understanding diode structure, device physics, behavior, and diode
circuits prepares you well to further understand transistors and complex electronic circuits.
Figure 2.0:
Silicon atom, 14 electrons, 4 electrons on outer shell
P-N Junctions
Diodes are formed by merging two different types of materials. Silicon and germanium are
the most popular material choices used in semiconductors. From a performance
standpoint, germanium offers faster switching capability with lower reliability. With
silicons abundant
supply and higher reliability, silicon is the most popular material in semiconductor
technology. 1, DC, chemical materials (elements) atoms. Each atom consists of electrons,
protons, and neutrons. Silicon has total 14 electrons (dots) with 4 electrons in the outer
shell (see figure 2.0). An atom is stable if the outer shell contains two or eight electrons.
By bombarding silicon (Si) with chemicals, we can alter its properties to create P-N
junctions. For example, to create a P-type junction in silicon, we bombard silicon with
boron (Br), which has three electrons in its outer shell. By adding borons three electrons
to silicon, which currently has four electrons, seven electrons are now in the silicon atoms
outer shell. Recall that the silicon atom wants to have eight
electrons to fill up its outer shell. These seven electrons leave a net positive charge (hole)
in the modified silicon atom outer shell (see figure 2.0a).
From chapter are made of
V across the diode, the positive charge from the source opposes the holes in the P junction
causing the holes in the P junction to diffuse towards the depletion region. The same
action takes place in the N junction where electrons are moving towards the depletion
region. Since 0.5 V is less than 1 V, which is the minimum voltage required to turn on the
diode, the diode is now reverse-biased. Modeling the diode as a switch, its currently open
(off). If we increase the voltage source to 1 V, the switch overcomes the built-in potential,
causing holes and electrons to flow in the reverse direction breaking through the depletion
barrier. Current then starts to flow. The diode is now conducting. As a switch, its now
closed (on).
I = Io X (eqV / K T 1)
Io: Leakage current; q: Electron charge (1.6 X 10-19 C); V: Voltage across diode; K:
Boltzmanns constant (1.38 X 10-16); T: Absolute temperature (Kelvin). The transfer
function of temperature from Kelvin to Celsius is K = C + 273; for room temperature, 27
C, K = 27 + 273 = 300 K. This diode current model indicates that for a given
temperature, increasing diode voltage increases diode current. Every diode has its own set
of parameters (ratings). Maximum forward voltage is the maximum voltage a diode could
withstand in forward-bias mode before it breaks down (shorts or blows open). Reverse
voltage: This number determines the maximum reverse-biased voltage a diode could
withstand before reverse breakdown. Diode output current defines the current level during
forward bias and is approximately constant in high forward voltage. Maximum reverse
current (leakage) defines the current amount through a diode during reverse bias.
Maximum power dissipation describes the amount of power (Watts) allowed for a given
diode voltage and current, power = (I) X (V).
Diode Circuits
1) Many circuits utilize diodes. A diode can be used as a voltage regulator (see figure 2.5).
A voltage regulator by definition is an electronic device that generates a constant voltage
source. The ideal voltage regulator can source and sink infinite amounts of current. The
tilted up-pointing arrow in the voltage source means its a changing (sweeping) variable
voltage source. The diodes forward-bias voltage is 200 mV in this sampled circuit.
Voltage at node D is the thin trace (V-I graph on the right). As the voltage source sweeps
from 0 V to 200 mV, there is no current flowing in this circuit due to the fact that the diode
remains off (reverse-biased). Therefore, node D voltage follows variable voltage. Using
Ohms law, there is no voltage drop across the diode, i.e., Input voltage node D voltage
= 0 V, and current = 0 A. When variable voltage increases to 100 mV, node D follows at
100 mV. Once the variable voltage source reaches 200 mV, the diode starts to turn on.
Node D voltage is now roughly fixed at 200 mV. Current continues to increase
exponentially as the variable voltage source continues to go up.
Figure 2.10
Surface-mount diode (Courtesy of SEMTEX)
Figure 2.11
7) A zener diode is a very popular diode type commonly used in linear regulator
applications. Linear regulators are the building blocks of virtually all electronic power
supplies. As opposed to switching regulators, linear regulators are on 100% of the time.
Switching regulators means that devices that turn on and off periodically will potentially
increase power efficiency. We will take a closer look at switching regulators in chapter 3,
AC. Figure 2.12 demonstrates a simple zener diode implementation used as a voltage
regulator. A zener diode operates in the reverse-biased region, i.e., the left-hand side of the
I-V diode curve. When it reaches the rated reverse-biased threshold, 5 V, it behaves as a
voltage source staying at 5 V. Once the zener diode starts conducting, it remains turned on
Figure 2.12: Zener diode circuit, V, I curve as a linear regulator as long as variable
voltage source stays at least or above 5 V.
Summary
Diodes are formed by P-N junctions. They are basic transistor building blocks. Powerful,
practical electronic circuits can be built and designed by using diodes. The chapter started
with silicon atomic structure, then basic diode formation process, followed by diode DC
characteristics (I-V diode curve). We then examined forward and reverse-biased
definitions as well as several practical diode applications. Ideal- and non-ideal diode
characteristics were discussed. The chapter closes with LED, zener diodes, and the linear
and switching regulator principle of operations and applications.
Quiz
1) If you measure voltage across a diode between the anode and cathode, the DMM reads
1 V. Is the diode forward- or reverse-biased?
2) Draw a DC graph of nodes A and B during 0 V to 5 V (DC sweep) using the diode
circuit (see figure 2.13). Assume forward-biased voltages are 1 V.
3) Design a circuit that drives 5 LEDs. Assume 5 V is the supply voltage and the
minimum current needed to turn on each LED is 10 mA. When the LED conducts, it drops
1.5 V. Hint: Include LED voltage drop. Decide if you should choose parallel or series
configurations.
4) Using figure 2.13, at 5 V DC, draw a DC sweep graph of nodes A and B over
temperature ranging from 40 C to + 125 C (see figure 2.14). The temperature
coefficient of both diodes is 2 mV / C.
temperature sweep
5) 1N4001 is a popular general-purpose diode that is capable of handling up to 1 A of
forward current (see figure 2.15). Its length is less than 10 cm; forward voltage drop is
rated at 1.1 V, 27 C room temperature; reverse voltage is specified at maximum of 50 V.
Using DMM, 100 mA forward bias current is measured; the voltages at the anode and
cathode of the diode are the same. What condition is the diode most likely to be? Would it
mean it is shorted, open or working properly?
Sine Wave
We will use sinusoidal wave and AC parameters to explain most AC operations. The most
common AC waveform is the periodic sinusoidal wave. Sinusoidal (sine) wave comes
from trigonometry in mathematics. Figure 3.1 shows a periodic sine voltage waveform in
time (transient) domain. It means that the frequency is fixed while the waveform
amplitude is changing. Other than the sine wave, the square wave and saw-tooth wave are
also common AC signal sources. The schematic symbols of all three types are shown
below.
Sine wave Square wave Saw-tooth wave
In other words, 60 Hz means that there are 60 cycles occurring in one second (see figure
3.2). The significance of this example is that 60 Hz is the US household power outlet
frequency. A 3 gigahertz (GHz) signal (the typical CPU clock speed of todays desktop
computers) runs 3 billion cycles in one second.
AC source. Neutral is the return current path for the AC source. The ground terminal
has a zero voltage potential and zero resistance. It provides a path for the current to the
earth, which is a huge mass of conductive materials such as dirt, rock, ground water, etc.
Since the earth is a superb conductor, it makes the ground terminal a great voltage
reference for electrical systems as well as a safety measure by directing all unwanted
buildup of electrical charge to the earth, thus preventing damage to the equipment and the
user. Electrical equipment, such as computers, is often built with a chassis ground. This
zero voltage connection provides a common point of voltage reference with respect to
internal circuitries and for safety reasons.
Duty Cycle
So far, we have discussed peak voltage, amplitude, frequency, and period. Now, we will
look at duty cycle. The duty cycle is the ratio of on-time over one period (on-time + offtime) expressed in percentage:
From figure 3.3, the time it takes for the upper half of one sine wave cycle to complete is
ontime. The other half, off-time, is the time it takes for the lower half of the sine wave
cycle. By definition, On-time + Off-time = One period (see figure 3.4). For a periodic
waveform, ontime is exactly the same as off-time. Using the duty cycle equation, you can
see that the duty cycle of a periodic 60 Hz sine wave is 50%:
Vrms
Vrms stands for root mean square voltage. It directly relates to Vpeak discussed in
previous section:
We will discuss the meaning of the 0.707 constant in detail shortly. Electronic products
show Vrms information in the datasheets where the manufacturers use Vrms to specify the
noise amount. Ideally, noise, as a parameter, should be minimal. Manufacturers normally
use Vrms rather than Vpeak because Vrms is less than Vpeak by about 29.3% (100%
70.7% = 29.3%). If Vpeak = 100 mV, Vrms = 70.7 mV.
Capacitors
A capacitor is a passive electronic device that does not generate energy. However, it stores
energy through an electric field. A capacitor is formed by two conductive plates separated
by an insulator (dielectric). There are plenty of conductive plate materials as well as
insulator types. The most common ones are tantalum, ceramic, polyester, and electrolytic.
Figure 3.6 shows a capacitor graphical representation, capacitor schematic symbol,
discrete tantalum, electrolytic capacitors, and film capacitors.
XC versus Frequency
If the frequency now increases to 2 MHz, then Xc = 80 m. In short, Xc is inversely
proportional to frequency. See bode plot in figure 3.7. A bode plot is a graph that shows
AC (frequency) analysis. It includes X-Y axis where X-axis is frequency. Keep in mind
that even though impedances changes with frequencies, the capacitance values remain the
same. From above, capacitance remains 1 uF between the two frequencies.
short).
Applying the same rule, if frequency is zero
(DC), Xc would become infinitely large (DC block).
capacitor. The capacitor datasheet should spell out the maximum voltage.
Steps 3 and 4: When the switch opens, energy stored on the capacitor in the form of
voltage has no other path to go (discharge) and therefore remains in the capacitor. The
capacitor can now be viewed as a battery holding up the charge.
I (t) = C (V)
By knowing the voltage, capacitance, and Xc, t can be obtained:
t = C (V) / I
The charging behavior is further made clear in the waveform shown in figure 3.10. You
can see that it takes time (t) to charge up the capacitor (dotted line) to full voltage.
Figure
3.13: R, C series circuit
constant means t = RC. Substituting that into the equation yields the following:
V_cap = Vin X (1 e1)
V_cap = Vin X 0.64
From this result, at one time constant, voltage at the capacitor is 64% of the input voltage.
For two time constants, time is equal to 2 X RC. V_cap now equates to:
V_cap = Vin X (1 e-2) = Vin X 0.87
Plug in some realistic numbers and let us further demonstrate this concept. Suppose the
lowest and the highest levels of the square wave are 0 V and 1 V respectively. R = 10 k
and C = 1 uF. One time constant yields 10 k X 1 uF = 10 ms. It means that it takes 10
ms for V_cap to reach 0.64 V (64% of 1 V). For two time constants, i.e., 2 X R C = 20
ms, it takes 20 ms for V_cap to reach 0.87 V (87% of 1 V) (see figure 3.15). When the
square wave goes from high to low, the capacitor was discharged (decay) using the same
mathematical model.
For power:
The difference
between voltage, current, and power dB calculation is the constant 10 vs. 20.
Power Ratio in dB
For example, an audio power amplifier outputs 7.5 W, the input supply voltage, current is
10 V and 1 A. What is the power ratio in dB?
The input power is found by: V X I = 10 V X 1 A = 10 W:
R C Series Circuit
Figure 3.18:
RC series circuit in
frequency domain
We will now move onto using the same circuit from figure 3.13 to explain frequency
domain in figure 3.18. We would define the square wave voltage source as Vin (input
voltage), voltage at the capacitor is Vout (output voltage). To analyze this circuit in
frequency domain, we need to derive a transfer function. A transfer function is an equation
that spells out the relationship between input and output. If you look closely, its nothing
more than a voltage divider where the capacitor is an impedance varying resistor, (i.e.,
Xc). The transfer function thereby is:
20 dB per Decade
This transfer function shows that for given resistor and capacitor sizes, increasing
frequency causes the Vout to decrease. The bode plot below elaborates this concept (see
figure 3.19).
As frequency increases, voltage falls rolling off at 20 dB per decade rate. A decade is 10
times change in frequency. Assume at 10 kHz, Vout starts to fall; Vin is at 10 V. Vout / Vin
in dB; frequency and Vout are developed below in Table 3-2. There is a negative sign of
dB after 0 dB. Its due to the 20 dB per decade reduction rate.
At 20 dB,
Vout:
Frequency is then found by:
At 40 dB, Vout:
100 = 1 2f
f = 16 Hz
1,000 = 1 2 f f = 160 Hz Apply the same technique, it can be estimated that the
frequency increases 10 times for every 10 times reduction in Vout. Table 3-3 summarizes
these findings for R = 1 k, C = 1 mF. The exercise above shows that you can design the
circuit by changing the R and C values to fine tune a unique frequency in such a way that
Vout starts to reduce. This concept extends to a very popular capacitor filter application:
low-pass filter.
Low-Pass Filter
Figure 3.21 is a popular circuit called the low-pass filter. It allows signal to pass through
only at low frequency filtering out high frequency signals. A low-pass filter is used to
remove high frequency noise effectively improve electronic system performance. The
capacitor used in this circuit is called decoupling or bypass capacitor. The down side to
this noise reduction technique is the additional R and C components adding bill-ofmaterials (BOMs) costs and space on the printed-circuit board. BOMs are used to estimate
overall system costs. They include all hardware components as well as printed circuit
boards costs. One filter parameter often used is f 3dB. It denotes specific frequency value
when the output starts to fall to 70.7 percent of the input. Its the point where the output
just starting to roll-off. Using this characteristic, filter performance can be summarized
(see figure 3.22).
Phase Shift
In the RC low-pass filter circuit, there is a phase shift between the voltage at the resistor
and capacitor. Phase shift is the time difference amount from the original timing position
to a new one. A phase shift can be positive or negative. To understand phase shift in the
low-pass filter, we use a 360-degree circle to interpret a full cycle sine wave in figure 3.23.
Radian
The equation on the previous page is a function where V(t) is a portion of Vpeak at any
particular time. = 2 f or (2 ) / t is the angular velocity (distance divided by time).
Figure 3.24 below shows the various radians around a full cycle sine wave and a table
with degrees correlate with radian in and decimal values. Radian can also be defined as:
degrees of a circle, if
given a radian, a particular degree is easily found via the 2 and 360 degree ratio. For
example, radian = 1, degree X:
(2 / 360 degrees) = (1 radian / X degree)
X = 57.30 degrees, where = 3.14
If arc distance = 2, radius = 0.5. Radian:
Radian = 2 / 0.5 = 4 radians = (1.27 X ) radians
The rotation degree can be calculated by the 2 and 360-degree relationship. Lets assume
the rotation degree is Y. Use 4 radians from the above example:
(2 / 360) = (4 radians / Y)
(2 / 360) = 1.27 / Y
Y = 229.18 degrees
ICE
In the RC filter circuit, the voltage at the capacitor lags current. Some use I to C to E
(ICE) as a way to recognize this phenomenon. I corresponds to current, C is the
capacitor, and E is voltage potential across the capacitor. In figure 3.25, voltage at the
capacitor appears on the right while both capacitor and resistor currents (on the left) lead
capacitor voltage by 90 degrees. Because the resistor and capacitor are connected in series
with only one current branch, the capacitor current has the same phase as resistor current
and voltage. In other words, the capacitor voltage is lagging capacitor and resistor currents
by 90 degrees. This explains why Xc has a negative sign in the R C circuit calculation in
figure 3.18. It designates the 90-degree phase shift.
Inductors
An inductor is an electronic passive device that does not generate energy but rather stores
energy in a magnetic field. Inductors are typically made of wounded coil in multiple forms
and sizes. Common inductor materials are iron, copper, and ferrite. Many characteristics
are exactly opposite that of a capacitor. Figure 3.27 shows several inductor types and its
schematic symbol.
Figure 3.27: Assorted inductors (top) and inductor schematic symbol (bottom)
Inductor value (inductance) is measured in unit Henry (H). They exhibit reactance, called
inductive reactance (XL) measured in Ohms (). The inductor symbol is L. Some
inductors are constructed in the microelectronic scale housed in small semiconductor
packages. The smaller sizes save area, however, small sized inductors offer much less
inductance.
XL versus Frequency
XL = 2 () (L) >> 2 , L, XL =
Applying the same rule, if frequency is zero (DC), Xc would become zero.
XL = 2 (0) (L) = 0
Lets use a simple inductor circuit to explain this in figure 3.29. Connecting a DC voltage
source to an inductor is equivalent to connecting the voltage source to a zero resistor.
This implies that the inductor practically is non-existent (DC short).
V (t) = L (I)
A simple mathematical model can be used to represent a capacitor.
Figure 3.30:
Inductor circuit explained
After the switch is closed, current starts to ramp up and the magnetic field starts to
increase. It takes t for the inductor to build up the magnetic field and current to its
maximum level. The field strength and current depend on the inductance amount, which
relates strongly to the inductor materials and proportionally to the coil number.
Immediately after current ramps up to the highest level, the switch opens. The inductor
tries to maintain current flow and the inductor will flip polarity. The magnetic field
strength decreases and current ramps down. Figure 3.31 shows the current ramp (current
ripple) waveform. If, for example, inductance is 1 H, 1 V across the inductor results in
current ramp of 1 A in 1 S.
(1 V) X (1 S) = (1 H) X (I)
(I) = 1 A
Power management applications step up and/or down input voltage to provide higher or
lower output voltage, current, or power. Some power management designs operate in DC
such as those (diodes, zener diodes) mentioned in chapter 1, DC. Many power
management applications operate in AC and at much higher frequency. For example, a
400 kHz (2.5 ms period) switching regulator takes 12 V input voltage and regulates to 1.2
V output. It specifies that 10% duty cycle (0.25 ms) is required with maximum 2 A ripple
current at the output. The inductor size can be calculated:
(12 V) X (0.25 ms) = L (2 A)
L = 15 mH
ELI
As for voltage leads and lags, inductors behave exactly the opposite of capacitors. We use
E to L to I (ELI) where E is potential difference, L represents the inductor, and
I corresponds to current. Inductor voltage is leading the current by 90 degrees, shown in
figure 3.32.
Q Factor
The inductor quality factor (Q) dictates how good an inductor is. This factor determines
how much loss the inductor incurs in terms of heat and magnetic field losses. Q factor is
modeled by 2 f, inductance (L), and the inductors internal electrical resistance (R).
The same as the resistor rule, if the parallel inductors are the same sizes, the equivalent
inductance is the inductance divided by the number of inductors, (i.e., 100 nH / 2 = 50
nH). If 3 inductors connected in parallel are all equal in inductances, the equivalent
inductance:
A + (F || (B + E + D)) + C
High-Pass Filter
Lets use a simple inductor circuit in frequency domain (AC analysis), illustrated in figure
3.36, to help our inductor knowledge sink in further.
Vout = 7.07 V
Figure
3.37: R L vector diagram
Figure 3.38 shows the timing waveform between inductor and resistor voltage. They differ
by 45 degrees. If the input frequency changes, the resultant Z changes as well as the
rotation angle (phase shift).
>> 1 k,
= 20 X 0 dB = 0 dB
See figure 3.39 for Vout / Vin in the dB bode plot. At DC, Vout is at ground (0 V). With
dB, as frequencies increase, negative dB goes up with Vout going up to 0 dB (Vin). This
is why the circuit is called a high-pass filter. At DC or low frequency, Vout is close to
ground or no signal at the output. The signal only passes through at higher
signal frequency.
Figure 3.39: Vout / Vin vs. Frequency To determine 3db bandwidth of a high-pass
filter:
Real L and C
Before we step into real world circuits, its beneficial to know capacitors and inductors
device models. Device models include additional components (R, L, and C) that are called
parasitic. Although these components are small in quantity, they could have major effects
on circuit performance. A non-ideal capacitor model is shown in figure 3.40. It includes
the capacitor itself, leakage resistor, equivalent series resistor (ESR), and equivalent series
inductance (ESL). ESR contributes to heat loss. ESL contains XL. 10 m is considered
good performance for a 500 uF aluminum capacitor. Recall that Xc decreases with
increasing frequency. In reality, if the frequency is high enough, XL from ESL would
eventually kick in, tilting the overall impedance upward (see figure 3.41). The uptick in
Xc occurs at extremely high frequency. Some datasheets will not show them because its
above the normal operating frequency for a specific capacitor.
Figure
3.42: Inductor parasitic
At high signal frequency, XL ultimately decreases (see figure 3.43). For a high frequency
surface-mount inductor with 100 nH, ESR can be as low as 500 m.
Practical AC Circuits
Figure 3.44a is a typical circuit used in a Frequency Modulation (FM) radio circuit. It
eliminates noise by clipping out signal above the upper and below lower diode voltage.
More AC circuits will be presented in chapter 4, Analog Electronics. In this circuit, D1
conducts in the positive half AC cycle leading Vout at +2 V, during the negative half AC
cycle, the D2 forward-bias resulting in 2 V at Vout while the D2 anode stands at ground.
See Vin and Vout waveforms in figure 3.44b.
Inductive Load
You need to be mindful about an electronic load that is inductive during switching. In
figure 3.47 below, when the switch is fully closed, the inductive load turns on.
inductor voltage. The electronic load could be damaged by exposing it to large voltage
amount. We call this phenomenon inductive kick.
Diode Clamp
To solve this problem, a diode can be added (see figure 3.49) in parallel with the inductor.
When the switch opens, the diode now conducts and holds (clamps) the diode anode at 2
V above the 7 V source. In other words, the electronic load voltage is safely clamped at
no more than 2 V above 7 V. This diode, sometimes called a commutating diode, has no
impact on normal operation when the switch is closed. The diode in fact is reversedbiased, appearing as an open circuit. This technique is also called snubber circuit. The
disadvantage of using the diode is the additional charge and discharge time because of the
diode resistance and parasitic.
Series R L C Circuit
Recall the voltage, current lead, and lag differently among R, L, and C. This interesting
feature creates many useful circuits like the R L C series circuit in figure 3.50.
All currents in a series circuit are in phase. Capacitor voltage lags its current by 90 degrees
(ICE) while inductor voltage leads its current by 90 degrees (ELI). This results in inductor
voltage leading capacitor voltage by 180 degrees. Using the same AC principles, voltage,
current, and phase information can be extracted. In figure 3.52, the vector diagram shows
inductor voltage (VL) is leading capacitor voltage (VC) by 180 degrees. The resistor
voltage is at zero degree as the reference voltage. VL is standing upward in the vector
diagram while VC is pulling downward due to the 180-degree phase difference. There is a
net voltage sum depending upon the XL and XC impedance sizes. This series circuit only
has one current going through all three components. If the C and L were designed to have
the same impedances, the resulting circuit is purely resistive, i.e., no phase shift between
voltage and current. The net VL and VC voltage yields zero voltage. This leads to
maximum current flowing in the circuit with minimum impedance. This particular
frequency is called resonant frequency. Frequency affects both XL and Xc. L C reactance
is heavily controlled by frequency. Keep in mind, however, the non-ideal R, L, and C
nature could become factor in the RLC circuit. We can derive resonant frequency using
figure 3.52: Vout = 0 when XL and XC cancel each other out: XL = Xc or XL Xc = 0.
Maximum current occurs when XL Xc = 0, i.e., minimum impedances. To look for the
resonant frequency, we simply apply XL = XC then solve for resonant frequency, f:
At resonant, XL = Xc, the total reactance is at maximum while circuit current is minimum.
Positive peak inductor current cancels out the negative peak capacitor current (see figure
3.54). Resonant frequency can easily be tuned by varying inductor and capacitor sizes for
a given frequency. For example, to achieve 1 MHz resonant frequency using a 10 mH
inductor, the capacitor value can be evaluated:
Transformers
A transformer is an AC circuit that steps up or down AC voltages. The operation of a
transformer can be explained by electromagnetic theory. Transformers are used in many
applications such as electric power generation and electronic device charging, (e.g., laptop
and cell phone battery chargers). A transformer requires at least two sides to operate:
primary and secondary sides. Multiple secondary sides are often found in complex
transformer designs. The key to transformer operation is electromagnetic theory where
changing voltage and current induce voltage and current on the other side of the circuit
through electric and magnetic fields generated on both sides. In figure 3.56, the primary
side on the left is powered by an AC voltage source which connects to wires. The wires
are rounded with many turns (turn numbers), called N1. These turns are tightly wrapped
around the core, which is made of conductive materials. The wires on the secondary side
wrap around the core also with fixed turn numbers (N2). For step-down applications, from
a household electrical outlet (120 V AC) to DC, the secondary turn number is less than the
primary one. The input AC voltage (Vin) is generating magnetic and electric fields from
the wire carrying AC current. These fields are directed to the secondary side via the core,
inducing changing voltage and current on the secondary side. The current amount and
voltage at the output (Vout) are determined by the turn number ratio between primary and
secondary sides. Lets use some real numbers to further elaborate it.
N1 = 100, N2 = 10, Vin = 120 V, Vout =?
Half-Wave Rectifier
Using a diode rectifier, a zener linear regulator could further transform AC voltage to DC.
A halfwave rectifier is a classic example shown in figure 3.57. The diode only conducts
during the positive Vin half cycle. Vout is at 0 V during the negative half (Diode reversebiased) cycle. By adding a capacitor in the circuit, a DC-like output is acquired similar
to figure 3.58. During the positive half cycle, the capacitor is charged up to the Vin peak.
During the negative half cycle, the diode turns off, and charges accumulated on the top
capacitor plate slowly discharge to the resistor delayed by the RC time constant. This
output is not a stable DC voltage due to the fact that the voltage is being charged and
discharged. The amplitude of this charge and discharge voltage is called ripple voltage.
Ripple voltage defines how well the Vout is compared to a stable DC voltage.
Buck Regulator
Lastly, a switching voltage regulator is shown in figure 3.61. This is a buck regulator
circuit invented in the 1970s. It continues to be popular in power management systems. It
merely consists of three devices: a switch, a diode, and an inductor. This circuit steps
down a higher voltage to a lower one. One application is the 5 V DC outlets in
automobiles. They run off a 12 V lead-acid car battery, which is stepped down to lower
voltages for portable electronics used inside automobiles. V(t) = L (I) can be used to
explain this circuit. When the switch is closed, the diode is reversebiased and inductor
current starts to ramp up with a fixed voltage across it. The time it takes for the current to
ramp to its peak is ton (on-time). During this time, the switch is closed. The voltage across
the inductor is (Vin Vout). The switch then opens, and the inductor flips polarity trying
to maintain current flow (see figure 3.62).
Figure 3.61:
Switching regulator
Figure 3.62:
Switch opens
The only current path is through the diode, which is now forward-biased (see figure 3.62).
This causes the diodes cathode to be one diode below ground ( Vdiode). This diode
sometimes is called a catch diode. Its intended to be switching fast to keep up with the
on-off switching action. To achieve just that, its quite typical for a catch diode threshold
to be as low as 200 mV. Using KVL, the voltage across the inductor is now
(Vout ( Vdiode)) = Vout + Vdiode.
The switch-open time duration is toff. For a given inductor size, current change (either
ramping up or down) has the same amplitude (see figure 3.63). The inductance and I
literally are constants.
Vdiode is designed to be as low as possible. Assume Vdiode is much smaller than Vout
and becomes negligible. (Vin Vout) X ton = Vout X toff Solve for Vout: Vin X ton
Vout X ton = Vout X toff
Vout (ton + toff) = Vin X ton
Duty cycle needs to be less than or at least equal to one (duty cycle 1) in order for Vout
to be lower than Vin. For example, if Vin is 10 V, regulated output voltage is 5 V. 50%
duty cycle is needed (ton = toff). If the switching frequency is 400 kHz:
duty cycle = 0.5 = ton / (ton + toff)
(ton + toff) = Period = 1 / 400 kHz = 2.5 us
0.5 = ton / 2.5 us
ton = toff = 0.5 X 2.5 us = 1.25 us
To change Vout, you need to control the switchs duty cycle using control circuits, a
voltage divider, and a comparator. In figure 3.64, the output is always in AC, i.e., the
output voltage is toggling back and forth. The amplitude of AC output waveform is
quantified as ripple voltage. The peak-to-peak value of the ripple voltage determines how
well the output looks like a DC signal. The smaller the ripple, more stable the output
would be. Due to the load attached to the Vout causing uneven current flow, noise in the
system, and possible intermittent Vout disconnection, Vout could change erratically. The
triangular symbol with the + and signs inside is the operational amplifier (op-amp). The
op-amp and control circuit are part of the feedback mechanism. It takes a voltage sample
and compares it to a fixed value (VFB). The result of the difference feeds back to the
control circuit. The control circuit then alters the switchs duty cycle. The whole concept
is to maintain constant output by adjusting the switchs duty cycle according to the
feedback from the Vout. If Vout goes too high, the switch turns on less to bring the Vout
back down, and vice versa. The opamp in this circuit is a comparator that compares
voltage between VFB and Vout. The positive op-amp terminal changes if Vout changes
(voltage divider) causing the op-amp output changes. The control circuit takes this change
then adjusts the duty cycle. If the Vout drops, the switch turns on longer (increasing the
duty cycle), bringing the Vout back to its original value. Feedback techniques in the opamp are used in countless electronics products. They will be further examined in chapter
4, Analog Electronics. Using a voltage divider can control Vout level easily by changing
the resistors ratio. For example, target Vout = 2.5 V, VFB = 1.25 V. If resistors are the
same size, then:
This feature allows you to program the output voltage by using different resistor sizes.
The buck regulator is a simple, yet powerful architecture demonstrating the simplicity of
basic AC theories in creating useful and practical electronic circuits.
Summary
AC is an extension of DC and diode theories. AC characteristics empower large number of
modern electronic systems and circuits. We covered basic AC parameters, definitions, and
components. Ideal and non-ideal capacitors and inductor characteristics were reviewed
followed by simple LC circuits including low- and high-pass filters. Series and parallel
LRC circuits were then discussed with several other practical AC applications (rectifiers,
transformers, diode clamps, and snubber circuits). We also explored resonant frequency,
vector diagrams, bode plots, and switching and linear regulators towards the end of the
chapter. Only with a solid foundation in DC, diodes, and AC, can more complicated
electronic circuits be understood, designed, tested, and analyzed. Table 3-5 is a summary
of inductor and capacitor characteristics.
Quiz
1) The signal is 5 sin (2 1000 t + 20 degrees). What are the signal frequency and Vpeak?
2) The peak of an AC voltage (Vpeak) may be calculated as: Vrms X Constant. What is
the constant value?
3) The ideal inductor stores energy in ________________ field.
4) The ideal capacitor stores energy in ________________ field.
5) If an AC signal is running at a 25% duty cycle, and on-time is 250 ns, what is the
frequency?
6) Derive the Vout to Vin transfer function of the boost-switching regulator (see figure
3.65). Hint: Assume diode forward voltage drop is 1 V.
voltage-doubler circuit called a charge pump. While switches 1 and 4 are closed, switches
2 and 3 are open, and vice versa, charge pumping the capacitor. If Vin is 10 V, examine the
circuit and draw the transient response waveform of Vin and Vout, assuming Vout
connects to a resistive load and the RC time constant is negligible.
Figure 3.68:
Charge pump circuit
11) A tank circuit shown in figure 3.69 consists of 10 mH and 100 pF capacitors. What is
the resonant frequency of this tank circuit? The Q factor of a resonant circuit can be used
as a figure of merit to describe how good the tank circuit is. The higher the Q, the smaller
the bandwidth. This results in sharper AC response, as shown in figure 3.70. Bandwidth is
measured from the peak reactance to both rising and falling at 70.7%. What is the
bandwidth of this tank circuit if Q is 100?
Bandwidth = fresonant/ Q
Analog IC Market
Before we dive into the world of analog electronics, lets take a look at how big the analog
market really it. The analog IC market size is about US $17 billion according to 2011
market data from research firm Databeans. Plenty of electronic products deal with analog
signals. When you speak into your smartphones, your voice is an analog signal that is
processed and digitized before being transmitted through the air. The top five analog IC
vendors account for almost 40% of total market share. They are Texas Instruments,
STMicroelectronics, Infineon Technologies, Analog Devices and Qualcomm. Low costs
and technological advancement in electronics technology made electronics an ideal choice
for processing analog signals. Electronics take analog signals as input; then the signals are
filtered and amplified before passing to the next processing phase. Such a process is called
signal conditioning. Major analog electronics products include standard amplifiers,
comparators, analog-to-digital converters (ADCs), digital-to-analog converters (DACs),
radio frequency (RF) chips, power management systems, and more. Many analog
electronics are now combined with digital electronics. The industry terminology of such
framework is mixed-signal design. These systems contain a mix of analog and digital
design combined into one semiconductor chip. Some refer these chips as system-on-achip (SOC). Products containing mixed-signal electronics are plentiful. Figure 4.3 shows
several industries that use mixed-signal electronics and the market and product categories
within. In each market, numerous electronic functions and applications are employed:
audio, video, automotive, LED lighting, Ethernet network, wireless network,
telecommunication applications, medical equipment, motor control applications,
renewable energy, aerospace, military, defense applications, touch screen, smartphone
applications, industrial testing, manufacturing equipments, and the list goes on.
NMOS and PMOS transistors respectively. Chart 4-1 below shows all transistor and
process types. We will focus on NPN, PNP, and enhancement mode NFET and PFET in
this book.
Figure 4.5:
Two diodes on NPN and PNP
NPN and PNP transistors are each formed by two diodes (see figure 4.5). For NPN, the
base (anode) and emitter (cathode) is one of the two diodes. The second diode is formed
by the base (anode) and collector (cathode). You can see that the base is shared between
the two diodes in NPN. Both the NPN collector and emitter are highly concentrated with
electrons. Relatively speaking, there are more electrons in the emitter than in the collector.
The base, on the other hand has higher holes concentrations. PNP is also formed by two
diodes. The terminal names are: P (emitter), N (base), and P (collector).
From a performance point of view, NPN switches faster than PNP due to electrons moving
at a higher speed than holes. Even with this performance difference, both NPN and PNP
are used frequently together.
arrow.
Figure 4.7 NPN diodes in schematic symbol
Transistor Cross-Section
A conceptual NPN device and a realistic Silicon Germanium (SiGe) transistor cross
sections are shown in figure 4.8. Transistor regions are created one layer at a time starting
from the bottom, involving hundreds of steps by complex semiconductor manufacturing
equipment. Many of these steps utilize chemicals in gas or liquid form. Ion implantation
and diffusion processes are major process steps in creating junctions, also called
diffusions. In the conceptual view (figure 4.8), the substrate is an area filled (doped) with
positive ions (holes) by chemical reactions with the silicon wafer used as the devicesupporting structure. The N pocket (junction or diffusion) is doped with electrons
supporting the collector. Base and emitter junctions are built on top of the collector. The
dimensions and thickness of the junction vary from one process to another. Nonetheless,
they are measured in the order of micrometer (um). Because germanium requires less
energy than silicon to excite electrons from one energy band to the next, transistors made
by germanium are faster, consume less power, and generate less electrical noise. Its
disadvantage is lower reliability compared to silicon, especially in higher temperatures
and the high cost of manufacturing. However, by combining both silicon and germanium
in one process, we can leverage the low cost silicon manufacturing capability while
gaining the performance benefits of germanium. In 1989, IBM Microelectronics first
introduced a mainstream, high volume SiGe IC process. Since then, IBM has pioneered
SiGe with other major semiconductor companies following suit with their proprietary
SiGe processes. The latest development of SiGe has demonstrated that CPUs successfully
operate at more than 100 GHz clock speed (conventional desktop computers CPU clock
speeds are less than 10 GHz). This is ideal for wireless and high-speed applications. On
the silicon germanium cross-section diagram below, the base emitter region is the critical
area defining transistor performance in terms of switching speed, noise, and power
consumptions. In the SiGe process, germanium is doped in the base region, improving
operating frequency, reducing noise, and increasing power
capabilities.
Table 4-1:
Base, collector, and emitter Impedances
Figure 4.9:
Simple transistor circuit
The graphical representation of the NPN circuit operation explains the reason (see figure
4.10). The base junction is filled with positive ions (holes). The base size (width) is
relatively smaller than the collector and emitter. Only small numbers of electrons can
emit from the emitter towards the base forming a small base current (Ib). The majority
of electrons are swept across the base junction, collected by the collector as long as the
collector is tied to a positive terminal (a positive 5 V attracts electrons). Recall from
chapter 1, DC, that electrons and current flow in reverse directions. This collector current
(IC) combines with the base current (Ib) flowing downwards to form emitter the current
(IE). To turn on the transistor, base-emitter voltage (VBE) needs to be at least equal to or
larger than the diode threshold (VBE forward-bias threshold). The second condition is
that the collector has to be more positive relative to the base. The current transfer function:
Figure
4.10: NPN operations
IE = IC + Ib
Beta () is used to specify current gain:
Many academic textbooks claim that the base current is zero for simplicity reason. This is
a false assumption. In the real world, Ib is non-zero and it could adversely affect circuit
performance. Typically Beta () is around 100 to 200. If Ib = 1 uA, beta = 100:
Beta in the real world doesnt stay constant and change over temperature. This imperfect
characteristic could become a major design challenge. Many design tasks are to
compensate for these changes, keeping the circuit running in stable conditions over wide
temperature range. We use Alpha () to specify the IC to IE (IC / IE) ratio. For a non-ideal
transistor, where Ib is non-zero, is always less than 1.
VBE
As input voltage (VBE) continues to go up, this causes IC and IE to increase as well. The
VBE transfer function is:
IC = A X IS X e (VBE/VT) IE = IC + IB
Up to this point, the VBE diode is fully on. The transistor is operating in the active region.
On the other hand, the base collector diode is kept intentionally off. You will see in the
next section that it is critical to keep this diode off for optimal transistor operation.
Furthermore, you will see in the next section that IC will eventually stop increasing even
with increasing VBE. PNP, in contrast, works in an opposite manner in a sense that the
current flows from emitter to base and collector. Figure 4.11 shows the NPP and PNP
current directions using schematic symbols. Knowing how to connect the terminals to
appropriate voltage levels or bias the transistors the right way gives you great control over
a transistors operations.
VCE = VC VE = VC 0 V = VC
This graph shows 5 IC vs. VCE curves. Each curves VBE is different. VBE1 > VBE2 >
VB3etc. As mentioned in previous section, as VBE increases, IC increases accordingly,
as shown by the vertical up arrows on the left of figure 4.12. The dotted line intercepts
(cross) each curve to form a load line. For each VBE increase, (e.g., VBE1), the load line
intersects the IC curve and extrapolates down to VCE1. Increase VBE1 to VBE2, and the
load line intersects with the IC curve leading to VCE2. This process continues as VBEs
increase. The load line shows that as input voltage (VBE) increases, IC increases and VCE
decreases, shown in the horizontal arrow right below the X-axis. From VCE1 to VCE4,
the transistor current is constant at each VBE. In other words, the IC has little effect on
decreasing VCE. This is explained by a device physic effect called emitter current
crowding. This effect reduces base-emitter area reducing the current gain significantly.
This is why the IC starts to bend down at higher VCE. From VCE 1 to 4, the transistor is
said to be running in the normal operating region (almost constant current). Noticed I
mentioned almost constant. Within this region, the collector current actually goes up
slightly with increasing VCE instead of remaining absolutely constant. The Early effect
explains this phenomenon. The Early effect was discovered by Mr. James Early in 1952.
This effect states that base width is modulated as the VCE changes in the operating region.
As the VCE continues to rise, the effective base width gets reduced further due to the
spreading of depletion region into the base, increasing current gain slightly and therefore
the uptick in IC (IC) (see figure 4.13). VBE continues to increase to VBE5 and VCE
goes down further to VCE5. At this point, the IC starts to fall. Continued VCE reduction
leads to more IC decreases. This region is called saturation. The small region where IC
just started to fall (bend) is called the knee region. It defines the point where the
transistor starts going into saturation. During saturation, the current is changing,
modulating with changing VCE. This collector current change could cause unstable
system operation if a constant current is expected. If VCE goes down even more, IC
would eventually reach zero current and the transistor is now in cut-off region (Zero IC).
Ideally, you would want to operate the transistor in the normal operating region where the
IC is relatively constant. In addition to a stable collector current, the normal operating
region offers the highest voltage output swing. This is the optimal operating region often
referenced as the transistor Q point.
Figure 4.14:
Revised NPN circuit
As Vin rises above the diode forward-biased threshold in figure 4.15, IB, IC, and IE start
to flow. Suppose IC = 1 mA at 1 V input. Transistor Beta = 100 (these numbers are
devicespecific), R = 1 k, VC = 4 V, Ib = 10 uA, and IE = 1.01 mA
in dB = 20 log (1)
= 0 dB
On phase shift, the output follows the input. Both are in phase. Figure 4.19 shows the
phase relationship between Vout, Vin, and the 0 dB gain. The emitter followers gain in
reality is slightly less than 1, which will be discussed in the next section. If you question
why use the emitter follower if the Vout = Vin, voltage gain sometimes may not be
your primary goal. First, the emitter follower has current gain from beta. Secondly, the
strong appeal of the high input, low output impedances makes the common collector
(emitter follower) an ideal choice as a buffer (more on buffer in chapter 4, Analog
Electronics). The following model in figure 4.20 illustrates this buffer idea with a multistaged amplifier design.
that presents finite input impedance, Rin. From chapter 1, DC, we know that this forms a
voltage divider denoted by the dotted rectangle. To achieve the closest voltage possible at
Stage 1 input from Vin, RVin ideally would be zero while Rin would be infinite. These
situations, however, are not practical in the real world (RVin > 0, Rin < infinite). Instead,
we choose the right amplifier topology to give us the highest possible impedance (highest
output voltage level) as possible. At Stage 1 output, we need to condition the output to
have the lowest possible output impedance. It faces the same issue where the output ties to
Stage 2s input forming a voltage divider. Finally, Stage 2 output connects to a load.
Ensure Stage 2 Routs low impedance is critical especially when Load Rin may not be
easily changed due to system requirements. Using an emitter follower (high input, low
output impedance) is a good choice for Stage 2 to drive the load.
Gm is equal to the output current change divided by input voltage change. Multiplying
Gm by Vin gives rise to output current, Gm X V. Recall that a transistor is an active device
that produces a large current if certain requirements are met. Gm X V is used to model a
transistor as a current source. Lets now apply these concepts back to a common emitter
amplifier to derive voltage gain. First, we need to transform the original circuit into a
smallsignal model circuit using the Gm and superposition theorem.
Figure 4.22 is a small-signal model of a common emitter amplifier (hybrid- ) model.
VBE = Vin,
r in terms of , Gm:
The negative voltage gain sign is because V+ was converted to ground while current
continues to flow from ground towards RC. The voltage drop across RC would have to be
below ground by ( (Gm X Vin) X RC). This negative sign agrees with previous
assessment that the common emitter amplifiers input and output are out of phase, i.e.,
when input is + output is . If RC = 100 k, IC = 1 mA, VBE = 1 V:
hfe = Gm X RC = 1 m
X 100 k = 100
Figure
4.24b: Revised common emitter small-signal model
The voltage gain also needs to be revised from the small re as follows:
From the above, you can see that the voltage gain is reduced by the re in the denominator.
The voltage gain is further reduced if an external resistor is connected at the emitter
terminal. You may wonder why anyone would want to design an amplifier with lower
gain. The reason is to keep the amplifier stable. which is called emitter de-generation, it
oscillations. The details of the emitter de-generation relate to circuit design techniques and
beyond the scope of this book. The readers should however, at least take note of their
existence.
By adding an external resistor at the emitter, helps prevent the amplifier from going into
The voltage gain came in slightly less than 1 without any phase shift (the output follows
the input).
Figure 4.26:
IOUT = Gm X VBE:
The current going through re came from the base; re is the effective input impedance. Vin
= IB X re = VBE,
Notice the gain is positive, i.e., there isnt any phase shift from the input to the output.
This agrees with previous assessment. The drawback of the common base amplifier is that
the input impedance re is quite low. Be sure that the voltage source driving the emitter
input is high impedance or else the input level at the emitter will be degraded. The output
impedance is largely dependent on the RLoad just like the common emitter amplifier.
From a design perspective, a small-signal model is a nice tool to check if the circuit makes
sense first before the actual design.
strength, contract manufacturing facilities are available. There are companies (foundries)
worldwide. The top 4 IC Manufacturing Company (TSMC), United Microelectronics
Corporations (UMC), Global Foundries, and Samsung Semiconductor. In 2011 they
brought in, combined, over US $20 billion in revenue. The foundry business model has
made fabless design companies a means to manufacture chips without building a fab.
These chip manufacturing capabilities not only apply to CMOS, but also to bipolar and
any other discrete devices.
3D NFET
A NMOS 3-dimentional cross section model is shown in figure 4.28.
u: effective mobility,
Cox: gate-oxide capacitance per unit area. W, L: CMOS transistors width and length:
VGS = (Voltage across gate and source) = VG VS
Figure 4.31:
CMOS transistor top view
IC Layout
The actual devices shapes printed on the semiconductor chip are the device layout.
Figure 4.32 shows the top view of a silicon chip layout comprising transistors and resistors
created by IC schematic capture software (top). An Intel i7 core silicon chip (About 215
mm2) seen under a microscope (bottom) contains over one billion transistors.
Figure 4.32: IC layout in software (Top), Intel I7 core silicon chip (Bottom) Courtesy
of Dr. Bruce Wooley and Tallis Blalack (Stanford University)
behavioral models. The scripts are called Very High Level Descriptive Language (VHDL).
One popular scripting language is Verilog. Below is a script example for a 2-input AND
gate. This logic AND gate (further discussed in chapter 5, Digital Electronics) consists of
A and B inputs and F output. module AND2gate (A, B, F);
input A;
input B;
output F;
reg F;
always @ (A or B) begin
F <= A & B;
end
endmodule
The Verilog scripts would be processed by sophisticated software algorithm in the form of
simulations and verifications. Digital designers would use timing waveform tools that are
built in the software to verify functionalities performing timing analysis of the design.
Upon digital design completion, the final steps are synthesis using a computer-aided
design (CAD) tool, which generates final schematics and physical layout automatically via
automatic-synthesis function. These chip-design methodologies are very complex. There
are only a handful of companies supplying software in this area. Cadence Design Systems,
Mentor Graphics and Synopsis are market leaders in this field. Once the circuits were
constructed in the schematic capture software using schematic symbols, such design
would need to be converted to layout using layout software. High-density design
incorporates automatic layout generations. The verification process, Layout versus
Schematic (LVS), checks if both schematic and layout match or not. Layout designers will
correct any discrepancies if found, between schematic and layout. Design Rule Checking
(DRC) is another verification tool. DRC checks if the physical layout meets the design
rules set by the manufacturing processes. A design rule example is the minimum gate
length. If the gate in the layout is drawn shorter than the minimum gate length specified by
the manufacturing process, the DRC will flag indicating a DRC fail. The layout designers
can then correct the errors accordingly. Once LVS and DRC are complete, the layout will
be sent electronically to manufacturing. This process historically is called tapeout. The
time it takes to manufacture ICs differs by companies. Generally speaking, it takes several
weeks to complete the entire process. ICs printed on the silicon wafers are processed in
batches. They often are counted in lots (boxes), in which each lot contains number of
wafers (10 to 12 typically). The number of lots depends on the order sizes. Electrical tests
are performed throughout the manufacturing process to make sure devices are within test
spec.
source amplifier
Figure 4.39: Common source amplifier input, output
If, for example, VGS = 0 V (VG < VT), NFET is off. No ID or IS would flow. No voltage
drops across the resistor. VD is at positive voltage supply. One incentive using MOSFET
as an amplifier choice is the infinite input impedance at the gate (capacitor). Recall
chapter 3, AC, capacitors are open circuits at DC, i.e., infinite impedance. From an input
impedance standpoint, it is preferable that the amplifiers input stage have extremely high
impedances (maximum voltage at the input). This gives MOSFETs better edge over
bipolar transistors, not to mention the benefit of lacking DC gate current. These features
make CMOS circuits easier to build, test, and measure. The same small-signal model
technique used to analyze bipolar amplifiers can be used on CMOS circuits as well. The
original common source amplifier in figure 4.35 was transformed to the small-signal
model in figure 4.39a on page 141. The voltage at the gate, VG is the same as Vin. It is
now facing an open circuit by the gate-oxide capacitor. Gm in this circuit is:
The positive voltage source ties to the drain resistor (RD), is converted to a short circuit
shown in the bottom of figure 4.39a. The voltage gain of the final small-signal model
circuit is calculated as:
The voltage gain sign came from the fact that V+ was converted to ground while
current continued to flow from ground towards RD. The exact same analysis technique in
the bipolar common emitter amplifier applies to common source. The voltage drop across
RD is below ground by (Gm X Vin) X RD. The result of this small-signal model
indicates that the voltage gain is controlled largely by Gm and the RD size. The higher the
Gm and RD, the more voltage gain you could achieve. For example, a common source
amplifiers ID = 1 mA, VGS = 1 V, RD = 10 k. Voltage gain:
MOSFET Parasitic
Small-signal analysis applies to any amplifier design. It simplifies design tasks and gives
first-order confidence the design works to your expectations. However, many real world
circuits process AC signals. This AC requirement complicates transistor behavior. The
NFET model examines what it means in figure 4.40. Parasitic capacitances are distributed
around both bipolar and CMOS transistors. The NFET example includes capacitors from
gate-todrain capacitor (CGD), gate-to-source (CGS), drainto-substrate (CDSub), drain-tosource (CDS), and source-to-substrate (CSSub). The capacitances of these parasitic caps
are relatively low. They have little effects in DC. If you recall chapter 3, AC, Xc = 1/ 2 f
C, Xc is infinite at DC. If the signal frequency is high, Xc starts to decrease generating
current paths via the capacitors. This Xc has profound effects on transistor functions
including changes in gain, leakage current, input, and output impedances. This somewhat
explains why analog design is a challenging task in addition to numerous changing
parameters, from power supply values, temperature fluctuation, frequency ranges, or
bandwidth. In most cases, a transistor datasheet only list specifications as a range of
numbers at some pre-defined conditions. These capacitances are strong function of VGS,
VDS, temperature, and switching frequency. MOSFETs datasheets sometimes list them as
input capacitance (CISS). They can be in the order of 100s of pico farads (pF). For high
speed applications, gate charge is an important parameter that describes how much charge
(Q unit in coulomb) the MOSFET needs to switch at certain conditions. These parameters
become significant at high speed, which could slow down the overall speed. Gate charges
are heavily depending on MOSFETs threshold voltage (VT) as well as the type of load
connected to it. To select the right MOSFET for an application, engineers need to
understand the trade-off among parameters and performance.
Figure 4.41:
Common drain (source follower) amplifier
Using a NFET-based source follower, when VG is at ground (VGS < VT) and NFET is
off, ID = IS = 0 A. No voltage drops across the RS. VD is measured at positive voltage
supply. Same small-signal model technique used to analyze common source amplifier can
be used on common drain amplifier. Figure 4.41 was transformed to small-signal model in
figure 4.43.
Figure 4.43:
Common drain amplifier small-signal model
The voltage at the gate, VG, is Vin. It is now facing an open circuit by the gate-oxide
capacitor. Similar to a common source amplifier, Gm in this circuit is:
The voltage gain of the source follower is slightly less than 1 (Negative dB). For example,
a common drain amplifiers ID = 1 mA, VGS = 1 V, RD = 10 k. Gm = 1 m / 1 = 1
m. The voltage gain is thereby:
Figure 4.44:
Common gate amplifiers (N/PFETs)
Figure 4.46:
Common gate amplifier small-signal model
VIN = VS VG = VSG = VGS
Vout = VD = (Gm X VGS) RD
From the gain equation, you can see that gain is positive indicating there isnt any phase
shift. The amount of gain is mainly controlled by Gm and RD.
Differential Amplifiers
So far, we covered single-ended amplifiers. Differential amplifiers (diff amp) are wellsuited to many applications. They are in many cases superior to singled-ended design.
This section describes what diff amps are and the motivation behind using them. Look
back at singleended amplifiers. The inputs and outputs are referenced from positive to
ground or the most negative rail voltages. We know by now there is no such thing as a
perfect voltage source or ground. A DC power supply, even ground, has noise riding over
it (see figure 4.47). These imperfect qualities lead to inaccuracies.
These noises become more
apparent in microelectronics when transistors are measured in the sub-micron level
running in extremely low voltages. Any substantial noise could falsely trigger a transistor
to give wrong results. One solution to this problem is to not use ground or the negative rail
as a reference to the input but rather to use two (differential) inputs instead. Figure 4.48
consists of two NFETs (Q1, Q2) and two drain resistors. The input voltage is no longer a
single-ended input reference to ground. It consists of two inputs, V1 and V2. More
precisely, the inputs are the difference between V1 and V2 (V1 V2 = Vdiff). This
topology eliminates ground as voltage reference.
Figure 4.48:
Differential amplifier
Common Mode
Figure
4.49a: Current split in differential amplifier
In terms of diff amp voltage gain, we first need to introduce common mode. Common
mode voltage = (V1 + V2) / 2. When both V1 and V2 are the same (see figure 4.49a),
there is no voltage difference between the two inputs. Currents (I1, I2) are split equally
between two drain resistors (KCL in chapter 1, DC). The outputs are at the drain between
Q1 and Q2. They are exactly the same, i.e., the voltage output difference is zero. The
amplifier now has zero differential voltage gain. When both inputs are the same, diff amp
exhibits zero common mode gain. The zero common mode gain is yet another advantage
over single-ended topology. Any noise appearing at both inputs, if they are equal in value,
would not get amplified showing up at the output. However, even with diff amp, there
would be some small common mode gain. This gain is caused by the mismatch
between resistor and transistor sizes even if their designed values are the same. What it
means is that during the manufacturing of electronic components, no two physical
electronic components can be manufactured identically to each other due to process
technology limitations (gradients). For example, for a resistor with 10 k in value, there
could be plus or minus percentage (e.g., 5%) difference between the actual resistors and
the resistors design value. In other words, there could be as much as 500 difference
between the two physical 10 k resistors. This percentage difference varies from process
to process. A process spec sheet would tell you such information. Besides the resistors,
transistors have same inaccuracies where no two transistors are the same
even if they are identical in the schematic. Their
width, length, and VT may be slightly different.
These non-ideal device characteristics lead to
uneven current between I1 and I2, even when V1
and V2 are the same. These differences in current
results in voltage difference at the output, hence
common mode gain. The current (I1 + I2) combined
at sources is called tail current (tail-like shape of
Figure 4.49b: Tail current source vs. resistor NMOS). These currents are sunk by the
current source. Numerous academic textbooks use a resistor at the source to produce the
current. This is impractical because the current generated by the voltage drop across the
resistor is constantly changing when V1 and V2 are AC signals. This leads to differences
in I1, I2, and drain voltages. The voltage gain will be changing constantly, unacceptable
for stable gain operations. Most real world diff amps use current source to supply constant
current to the circuit (see figure 4.49b).
We could use figure 4.50 to show the meaning of voltage difference at the output. If V1 >
V2, current is steered towards Q1 so that I1 > I2 (larger I1 arrow). This
generates a voltage
difference in current
difference (Vout_diff) between Q1, Q2s drain voltages (VD_Q1 < VD_Q2). To find out
the exact differential amplifier gain, we could use the same smallsignal model technique in
the previous section and apply a half-circuit analysis. A half-circuit takes the half of the
differential circuit where the common mode voltage input is zero:
Figure
4.50: Voltage output difference
V1 = V2
If both inputs are the same, V1 = V1, for differential voltage input:
Vin_diff = V1 ( V1) = 2 X (V1)
We split the differential circuit in half. V1 would be equal to Vin_diff divided by:
The differential gain is a function of Gm X (RD1 + RD2) where (RD1 + RD2) is the
output impedance. To visualize how diff amp works, we use Vout_diff vs. Vin_diff DC
graph in figure 4.51a. When V1 = V2 (Vin_diff = 1), Vout_diff = 0 (no voltage gain).
When V1 > V2, Vin_diff is positive (right-hand side of the graph). V1 >> V2 indicates Q1
VDS approaches 0 V (cut off). The most negative the curve can go is V++. When V1 <<
V2, Vin_diff is negative (left-hand side of the graph). If V1 << V2, Q2 VDS approaches 0
V (cutoff), and the highest the curve can go is V++. The resistors in the diff app are called
passive load resistors. In practical diff amp circuits, load resistors are seldom used. With a
transistors high drain impedance, transistors are used as active loads to achieve high gain
in diff amps. An example is shown in figure 4.51b. This differential amplifier topology is
the basic building block of the operational amplifier. The two PFETS are constructed as a
current mirror with high drain impedance. Current mirror is discussed in the next section.
Figure 4.51b:
Active load
Current Mirror
Lets examine the current mirror (see figure 4.52a). They are widely used in
microelectronic design to generate current references. The purpose of the current mirror is
to first generate a reference current (IREF), then replicate it to create multiple copies. The
copies of the current can be manipulated by varying transistor sizes. The current copies
can then be used in other places throughout the design. Its simplicity makes a powerful
circuit to easily generate any number of currents from only few components. Figure 4.52a
is a current mirror example made up of a 10 k resistor and two NPNs (Q1, Q2). This
circuit is only practical when implemented in an IC design; discrete components exhibit
too many parameter mismatches making it difficult to achieve descent accuracy. The Q1
collector is shorted to Q1 and Q2s bases, i.e., VC = VB. This forces both Q1 and Q2s
VBEs to be equal. If you recall the collector current equation:
IC = A X IS X e (VBE / VT)
The PMOS current mirror used in the differential amplifier as active load works similarly.
Figure 4.52b shows an example. For 1 V VGS, ID assumes to be 0.4 mA (process
dependant). The reference current:
VGSs for two PFETs on the right have are the same (gates and sources are tied together).
Because their sizes are 2X and 3X larger than the reference PFET:
IOUT1 = 2 X 0.4 mA = 0.8 mA
IOUT2 = 3 X 0.4 mA = 1.2 mA
PFETs drain is high impedance. As discussed in the prior section, this is advantageous in
a differential amplifier where current mirror is frequently used as an active load to provide
higher voltage gain.
Op-Amp
Operational amplifier (op-amp) inputs are differential; output is typically single-ended
although differential outputs are fairly common. Differential amplifiers in the previous
section are great choices for op-amp input. All amplifiers discussed so far are open-loop
where the amplifier output is not connected back to the input (feedback). An op-amp
connected in open-loop offers extremely high gain. To achieve such impressive gain,
multistaged amplifiers are needed. Total system multi-stage amplifiers gain is determined
by the multiplication of individual gains. Assume individual stage gains are A1, A2, and
A3, total opamp gain = A1 X A2 X A3. An op-amp with reasonable bandwidth could
have open-loop gain of 90 dB to 100 dB.
To achieve reasonable,
manageable gain, feedback or closed-loop configuration is necessary. As for unity-gain
bandwidth, its the frequency where the op-amp drops to a gain of 1 (0 dB):
Recall the low-pass filter in chapter 3, AC. We could use a bode plot to explain op-amp
gain vs. frequency (see figure 4.53). Ideally, the higher the unity-gain bandwidth, the
better the op-amp will be. Transistors are active devices. An op-amp is made primarily of
transistors. At low frequency (DC), gains in dB would be much more than 0 dB as
opposed to
Op-Amp Rules
These are the rules associate with op-amp worth noting:
1) Input impedance: infinite
2) Output impedance: zero
3) Input offset voltage: zero
Lets take a complete op-amp circuit as an example to make these rules clear in figure
4.56.
Q3, Q4 is off. Even V2 is high enhancing Q2; there isnt any current flowing through it.
This pulls Q2s drain down which in turn causes Q5 VGS larger than VT turning it on. If
VGS is known with a drain resistor size designed properly to be higher than VBE voltage
plus the I R drop (voltage across) of the emitter resistor, Vout is lifted up. Table 4-6 shows
the op-amp operation with terminal definitions. One easy way to interpret this summary is
that an open-loop inverting amplifier simply means when the input of the inverting
terminal is higher than of the non-inverting terminal, the output goes low and vice versa
(see figure 4.57a).
This means that it only takes 50 uV difference between the positive and negative terminals
to flip the output to either 5 V or ground. This is a comparator circuit comparing the
voltage difference between two terminals. The outputs are either going up to the positive
rail or ground. Open-loop is perfect in comparator topology because of its high gain. This
high gain directly relates to high slew rate, which specifies how fast voltage changes over
time, i.e., V / T. For example, a step response at the input produces an output with slew
rate at 10 V / 1 us (see figure 4.57b). This means the device would be able to change 10 V
at the output in one microsecond (us). A high slew rate is desirable because it reduces the
time for the input and output to reach to its intended levels. Settling time is another
important op-amp spec that is commonly found in a datasheet. In figure 4.57c, settling
time specifies how quickly the op-amp responds to an input and output settles in 2 us
when the output value stays within the predefined error band.
Figure 4.57b: 10
V / 1 us Slew rate
Inverting Amplifier
Inverting amplifier is first shown in figure 4.58. Our goal is to develop the Vout vs. Vin
transfer function, i.e., closed-loop gain, with respect to the Rf and Ri. You will see in a
moment that the amplifier gain is nicely set by Rf and Ri. In this configuration, the input
voltage connects to
terminal (V). There
the negative is a resistor
feedback network, Rf and Ri. Part of the output is now feeding back to the opamp input
creating a closed-loop circuit. For closed-loop op-amp connections, if the op-amp output
stage (transistors) isnt driven in saturation (out of range), Vout would do whatever it takes
to force the difference between positive and negative terminals to be zero, V+ (V) = 0.
This rule means that V has the same voltage as the V+ at 0 V. This ground potential is
called virtual ground. Once we have obtained the virtual ground connection, we can
apply the infinite input impedance op-amp rule. A transformed circuit inside the dotted
line is developed (see figure 4.59). The infinite input impedance prevents any current
going into the op-amp turning it into an open circuit. This op-amp literally can be taken
out of the picture for the transfer function gain analysis.
Figure 4.58:
Inverting amplifier
The voltage gain, Vout / Vin, is now easily determined by the Rf to Ri ratio. Due to the
(Vout / Vin) sign, this is an inverting amplifier. Vin increases and Vout decreases with a
controllable gain. If the desired gain is 5, Ri = 10 k:
Non-Inverting Amplifier
What if you want a positive gain at the output? One could add a common source or emitter
amplifiers at the op-amp output to revert the phase, or could use a non-inverting amplifier
(see figure 4.62).
Figure
4.63: Modified non-inverting amplifier
The same rule is applied to the noninverting amplifier. Both positive and negative
terminals are at the same voltage potentials. This makes V = Vin. This op-amp rule
converts figure 4.63 to the final modified version (see figure 4.64). This circuit strikingly
resembles a voltage divider. The voltage transfer function is thereby:
Op-Amp Parameters
There are many op-amp parameters in addition to gain, slew rate, and settling time. Get
familiar with these op-amp parameters makes choosing, designing, and testing op-amps an
easier task. The other major significance of op-amp feedback topology is the ability to
alter the op-amp input or output impedances. For the input, it could be a negative effect.
Ideally, op-amp inputs are infinite, which is now lowered by the Ri and Rf.
-Supply and input voltage: Supply voltage defines absolute maximum and minimum
values of power supply you can apply to the op-amp. Input voltage defines the highest and
lowest voltage you can apply to the input terminals. Unless the op-amps are rail-to-rail,
input voltage is less than supply voltage.
-Supply current: It tells you how much current the op-amp will be sourced from the opamp power supply. When the op-amp is not driving any load or amplifying any signal, the
op-amp still draws current to keep its operations. This current is specified as quiescent
current. Quiescent current applies to any electronic device such as voltage regulators or
controllers.
-Common mode rejection ratio (CMRR): It has the same definition as described in
previous section. It tells how well the op-amp rejects the common mode signal from noise.
The CMRR unit is in dB. The larger the dB, the better CMRR performance would be.
-Power supply rejection ratio (PSRR): It specifies how much output changes from
power supply changes. Its measured in dB with transfer function as: (Power supply) /
(Vout). PSRR is infinite in an ideal case (Vout = 0).
-Output voltage swing: It defines the voltage range the output could go from the most
positive to the most negative levels. The range depends on the load. With a smaller load
(big load resistor, lower current), the output can go higher than a larger load.
-Output source and sink current: This is the maximum current op-amp could supply and
receive. Figure 4.65 depicts what source and sink current mean. There are two electronic
loads (circle symbols) in this circuit. The top load turns on when op-amp output goes low
sinking current towards the op-amp. When the op-amp output goes high, the top load turns
off, and the bottom load turns on. The op-amp is now sourcing current to the bottom load.
The current amount capable of sourcing and sinking to and from the load is the op-amp
source/sink current parameter.
-Input offset voltage: This is the voltage difference between the positive and negative
terminals that is needed to bring Vout to zero. Ideally, input offset is zero, meaning when
the difference of the two input terminals is the same, there is zero voltage output change.
Figure 4.65:
Op-amp source, sink current
-Input offset current : This current goes in or out of the op-amps input terminals. An opamp with a CMOS input stage doesnt have such spec. Only bipolar carries this spec due
to base currents. For NPN, input bias current goes into the op-amp. For PNP, base current
comes out of the input terminals. This current adds to the offset voltage. For this reason,
minimal input bias current is desirable.
-Power consumption: The maximum power in watts that op-amp consumes. This relates
to power supply voltage and supply current.
-Input impedance: This is the input impedance looking into the op-amp. For a CMOS
input op-amp, input impedance is infinite. For a bipolar-based op-amp, its bases
impedance is high but not infinite. 5 M input impedance is typical.
-Open-loop gain, bandwidth: Some use large signal voltage gain to represent open-loop
gain. Instead of dB, some datasheets translate dB to V / mV to describe open-loop gain.
For example, 100 V / mV is equivalent to 100 dB. 20 log (100 / 1 m) = 100 dB. Openloop gain can be realized in a bode plot in frequency response (see figure 4.66). The openloop gain is much larger than controlled closed-loop gain.
LM741
Perhaps the most talked about op-amp in academics is the general purpose LM741 opamp. Its an 8-pin bipolar transistor-based, differential input, single-ended output op-amp.
Figure 4.67 shows LM741 in a metal can package; it also shows the pin names, and
numbers. The diameter of the can is about 0.37 inch. Pins 1 and 5 are usually connected
together with a 10 k resistor to reduce the offset voltage.
Figure 4.67: LM741 in a can package (left) and pin names, numbers (right)
Table 4-7 Texas Instruments part of LM741 datasheet. http://www.ti.com/product/lm741
equal to IREF. The main errors Figure 4.68: Current mirror errorcome from the base current and
the size mismatch between the two NPNs. Figure 4.68 examines this inaccuracy. Using the
KCL, IB + IC = IE rule, it can be seen that IOUT is two IBs less than IREF. IOUT =
IREF (2 X IB). For example, VBE = 1 V, IC = 0.3 mA (a specific transistor spec).
IREF = (5 V 1 V) / 10 k = 0.4 mA = 400 uA. Suppose beta () = 100, IB = 0.3 mA /
100 = 3 uA. From the math derivation in figure 4.68: IOUT = IREF (2 X IB) = 400 uA
(2) X (3 uA) = 394 uA
The current error in percentage:
Despite 1.5% appearing to be a low number, recall that VBE and transistor beta are
dependent on temperature. This error worsens with temperature and supply variations. The
error percentage could go up quickly. For high accuracy design, it may be unacceptable.
Because this error is mainly caused by the base current, you may be tempted to use a
CMOS transistor to solve this problem, thinking that there is no gate current in MOSFET.
However, VT matching of CMOS is worse than VBE in microelectronic design. Device
matching quantifies how well two devices would be identical to each other.
Comparatively, because CMOS VT matching is poorer than bipolar VBE due to the
matching problem, the benefits of zero CMOS gate current are diminished.
normal operating region (constant current). All these design fixes so far require good
transistor understanding. Any electronic innovations are always backed by basic electronic
principle no matter how complicated they turn out to be.
Bipolar Cascode
The technique of constant collector voltages is called cascode. Figure 4.70 is a current
mirror using this technique.
transistors head room would be reduced (reduced head room). This is particularly
apparent in low voltage applications. In general, cascodes are not designed for extremely
low voltage design due to the head room issue.
Darlington Pair
The Darlington pair configuration is a popular circuit. This circuit was invented by Mr.
Sidney Darlington in 1953 when he worked at Bell Lab. Its still used today in many
modern ICs. Lets use PNP devices, this time connected as Darlington shown in figure
4.71. This circuit is a differential amplifier using PNP as the input stage, NPN as active
load. The Darlington pair provides two features in this circuit: 1) maximum current gain,
and 2) input voltage conversion. On point 1, current is increased from Q1 to Q2 using the
transistor beta rule as
follows: Assume transistors beta () are equal,
>> 1,
Q1_IB (1 + )
Q2_IC = X Q1_IB (1 + )
Q2_IC = X Q1_IB X
Q2_IC = 2 X Q1_IB
This shows that output current IE (Q2_IE) is much larger than the input current (Q1_IB)
by 2. For example, if Q1_IB = 10 uA, beta are all 100. Q2s emitter current:
Q2_IE = 1002 X 10 uA = 100 mA, 10,000 times larger
On point 2, the input voltage at the Q1 base is lifted up two VBEs at Q2s emitter
(Q2_VE). If the input is 2 V, VBE is 1 V, and Q2_VB is at (2 V + 1 V) = 3 V. Adding one
more VBE gives 4 V at Q2s emitter, keeping Q2 and Q3 out of saturation. This input
voltage conversion is likely needed especially when the input voltage is relatively low. For
designs that require low input voltage, the Darlington pair becomes an ideal choice as an
input stage. Imagine using the same circuit without the Darlington in figure 4.72. With 1 V
input at Q1 and 1 V VBE, emitter voltage at Q1 = 1 V + 1 V = 2 V. Q3 collector stands at
1 V from Q3s VBE. VEC across Q1 is now 2 V 1 V = 1 V. For a particular bipolar
process, 1 V VEC may be too low, forcing Q1 into saturation. Saturation should be
avoided at all costs because it takes time for the transistor to recover from saturation
during switching, hurting timing performance.
CMOS Cacosde
Cascode can also apply to CMOS transistors. A CMOS cascode circuit is shown in figure
4.73. Q1 and Q2 gates and Q2 drain are tied to each other. This makes Q1 gate-to-source
voltage (Q1_VGS) equal to Q2 drain voltage. Gate-to-source voltage of Q2 is Q2_VGS.
Apply KVL, source voltage of Q2, Q2_VS = (Q1_VGS Q2_VGS). Plug some numbers
into the circuit. You will gain some real insights into how it works. For example, if
Q1_VGS = Q2_VGS = 1 V for a given transistor size, VT, and temperature, then
according to the Q2s source voltage equation, it is equal to: Q2_VS = (1 V 1 V) = 0 V.
This makes Q1 drain-to-source voltage (Q1_VDS) zero volt cutting off Q1. This circuit
does not operate properly. To fix it, the device size needs to be changed; use the drain
current equation:
By changing the transistor size, VGS could be modified for a given VT and drain current.
In this case, we would like to increase the Q1 VGS to be larger than Q2s. We double Q1s
width to change Q1_VGS from 1 V to 2 V. Q2_VS is now: 2 V 1 V = 1 V. For low
voltage CMOS process, 1 V is possibly enough to keep Q1 from cut-off.
gain of one. Comparing to source and emitter followers (single-ended), a voltage follower
is superior because the output is the same as the input without any voltage drop (recall
source and emitter follower output is slightly less than the input).
Summing Amplifier
The next circuit in figure 4.75 is called summing amplifier. It is an inverting amplifier
with multiple inputs connecting to the negative terminal.
This circuit is
a summing amplifier circuit with an inverted output. It adds all input voltages together.
The result of the sum arrives at Vout is phase-shifted by 180 degrees.
to further
is an active
Figure
4.77: Active low pass filter using op-amp
This is a low-pass filter with high input and low output impedances by the op-amp (active
device). In some cases, you may want to maintain finite gain in high frequency. A simple
change to the circuit (adds Rf) in figure 4.78 achieves that. Revised transfer function:
Figure 4.78:
Add Rf in active low-pass filter
Based on this transfer function, starting at low frequency, the denominator is close to zero.
Vout / Vin is large. Input frequency starts to increase, and Vout / Vin starts to fall at 20 dB
/ decade rate. At extremely high frequency, voltage gain remains roughly constant because
2 f C cancel out each other:
The transfer function is best described by a bode plot (see figure 4.79).
At high frequency, voltage gain remains constant and holds steady by Rf to Ris ratio. The
bode plot above is an excellent method to verify circuit behaviors and performances. With
the use of capacitors and inductors in feedback circuits, you need to take phase shift into
consideration because it could potentially cause oscillations. Recall R C, voltage, and
current (lead, lag) characteristics in chapter 3, AC. Feedback signal arriving back at the
input may either lead or lag output signals. These L, C components could cause circuits to
behave erratically (circuit oscillation). Unwanted oscillations create noise and unstable
output in the system. They should be prevented at all costs. The criteria of oscillation
depend on phase shift that exceeds 360 degrees when gain is above unity. In circuit design
analysis, gain and phase margins are often used to determine oscillation criteria. We will
look a closer at these circuit design criteria later in the positive feedback section.
Circuit Simulator
On circuit design process, circuit simulation software like Multisim (made by National
Instruments) is popular among academia. Often used in electronics course labs by
students, Multisim constructs (schematic entry) analog and digital electronic circuits at the
device level. You can easily place schematic symbols and connect them by wires in
software. Multisim offers simulation capability (DC, transient, and AC). The simulation
results can be displayed on computer monitors in graphs and waveforms. You can place
test probes on nodes (nets) to measure V and I anywhere in the schematic. Adding
electronics instruments (DMM, oscilloscope, function generator, etc.) is convenient with a
few mouse clicks. Its a great way to confirm theories and verify applications before
building the physical circuits. Figure 4.80 and 4.81 show an op-amp simulation bench,
component selection window, and scope waveform window.
numbers, resolutions, and speed. Many high-end scopes are capable of measuring in
gigahertz (GHz) or gigabits per second (Gbps) with built-in printers and touch screen
displays. Scopes have connectors (plugs) that allow Bayonet Neill-Concelman (BNC)
cables to be connected to it. At the other end of the cable would be the AC signal being
measured. The scope displays X-axis as time, Y-axis as either the current or voltage. Users
can zoom in and out of the waveform using voltage and time scales knobs. Figure 4.82
shows an Agilent DSO5012A Series Oscilloscope with dual channel, 100 MHz, 2G
sample/s. The voltage probe in the figure connects electronic circuits and oscilloscopes.
One end of the scope probe connects to the scope connector. The probe tip on the other
end connects to the circuit of interest. Probes are divided into categories such as active or
passive. Active types contain amplifiers to amplify signals. Passive ones are less
expensive with resistors and capacitors built into them. Many probes come with
switchable attenuation settings, e.g., 1X, 10X. The X represents the attenuation ratio. For
1X, the signal at the test pin to scope connector is 1:1 (no attenuation). 10X means the
signal arriving at the scope is reduced by 10 times relative to the test pin signal. Probe
datasheets list probe parameters including input resistance, capacitance, bandwidth,
voltage range, etc. 1X and 10X probes parameters may differ greatly. The 10X setting
offers lower capacitance (<20 pF) with much wider bandwidth.
Figure 4.83:
Tektronix AFG2000 Function Generator (Courtesy of Tektronix)
Hysteresis
Test equipment and electronic systems require the use of hysteresis to reduce false trigger
caused by system glitches. An example is household air-conditioning (A/C) and heating
systems using a thermostat. Figure 4.84 shows the temperature profile of a room over
time. When the temperature rises above a 27C set point, the A/C system turns on to bring
the temperature down. Meanwhile, when the temperature falls below the set point, the
heating system turns on to bring the temperature back up. The single temperature set point
triggers many on-off pulses (false trigger denoted by the dotted circles in figure 4.84).
This increases the wear and tear of the system over time. To prevent that, a hysteresis zone
can be implemented. In figure 4.85, the hysteresis zone consists of two thresholds (upper
and lower). The A/C system only turns on when the temperature goes above the upper
threshold. If it falls below the upper limit, the system ignores it and the output remains
high. When it crosses the lower threshold, the heating system turns on to bring the
temperature up. The detailed implementation of hysteresis will be discussed in the next
section (positive feedback).
Figure 4.86a:
Op-amp with hysteresis, Vin
(before 2.5 V), Vout stays at 5 V due to the comparators high gain. Once Vin rises slightly
above 2.5 V, Vout flips to the 5 V rail (V > V+). Now, the comparators threshold V+ is
at 2.5 V (set by the voltage divider). Vin continues to increase above 2.5 V while Vout
remains at
5 V (V > V+). As Vin (V) starts to fall from its peak just below 2.5 V, it continues to
stay low. V remains less than V+. Once Vin (V) falls below 2.5 V (V < V+), Vout
flips to the positive rail. The same mechanism repeats to the next cycle. The upper and
lower thresholds can be easily set by varying the sizes of R1 and R2.
Instrumentation Amplifier
So far, to control gains, all op-amps were constructed with external feedback. An
instrumentation amplifier (INA) allows gain control with external feedback while
maintaining high input impedance. The primarily use of INA is to offer high differential
gain and reject common mode signal originating from noise. INAs come in many forms.
One of the most popular one is the two op-amp INA shown in figure 4.90.
input impedance. The differential gain transfer function of the above INA is as follows:
Linear Regulator
As previously discussed in chapter 2, Diodes, and 3, AC, a zener diode is a linear
regulator. The circuit from figure 2.12 is shown again in figure 4.91. A zener regulator
comes with deficiencies: zeners cathode (node Z) is high impedance. Unless a loads
impedance is extremely high, output degrades substantially (voltage divider). This
problem can be solved by using low-output impedance of emitter or source followers as
buffer shown in figure 4.92. The dotted rectangle represents the impedance transformation
model from highto low-output impedance
(upper right of figure 4.92). There are two
voltage dividers. The
R1 = 1 k, R2 =
1 k
The voltage where the Vout starts to fall out of regulation is called the drop-out voltage.
Its a critical LDO design parameter. The drop-out voltage is the minimum voltage across
the collector and emitter. The lowest drop-out voltage of this example is the VCEsat
(saturation voltage between collector and emitter). This is the voltage at which LDO is
still able to maintain regulation. The smaller this voltage, the better the LDO is because
the it utilizes the most available Vin before falling out of regulation. In this design, the
PNP VCEsat can be as low as 0.7 V. Drop-out voltage relates strongly with load current.
For low load current, VCEsat can be as low as 50 mV. Such low drop-out voltage has
propelled LDO applications to portable, handheld devices in recent years. In addition to
drop-out voltage, transient response is also a design parameter. Output could change
quickly. It takes time for LDO to respond. This time delay is an important consideration,
especially in timing-critical applications. The type of Vin is another design consideration
where Vin could be rectified AC or pure DC. Most LDOs are able to regulate Vout to as
close as + / 5% of the nominal value. LDO by itself draws current even though the
RLoad is disabled or idle. This quiescent current becomes the dominating factor of
draining input battery. Many modern LDOs integrate special features including thermal
shut down and current limit capabilities to prevent damage from excessive temperature
and current to the LDO ICs. For example, load could suddenly drop significantly,
overloading the output. This excessive current could damage the pass device if current
limit capability does not exist. Excessive current can also be caused by the input voltage
(inrush current). The detailed design implementation of thermal shutdown and current
limit is beyond the scope of this book. However, the functional block diagram of these
features is shown in figure 4.96.
Figure 4.96: LDO with current limit and thermal shutdown features
In this example, a current limit resistor, V_iLimit (between Q2 collector and Vout) is
added to the LDO. The size of the resistor determines the current limit threshold. The
internal current limit comparator (iLimit) controls Q2. If over current is detected by the
voltage drop across the V_iLimit resistor, for example, Vout suddenly shorts to ground.
Q2s base will then pull up, shutting itself off. As a result, no current will flow to the load
without damaging the pass device (Q2). The thermal shutdown circuit uses the positive
temperature coefficient of the resistor to combine with the negative temperature
coefficient of VBE diode. A temperature transfer function and threshold can be developed.
Once the temperature goes above the designed trip point, the temperature sensors
collector pulls up, yanking Q1s base down. Q1 collector pulls up turning off Q2. LDO is
then disabled. Both features prevent current flow to the load reducing the possibility of
damaging the pass device.
Summary
Analog electronics interface, transform, and process many analog quantities in all kinds of
applications. Analog electronics should be treated as an extension of DC, diodes, and AC,
because bipolar transistors are made of two diodes. Without a complete understanding of
diodes, its difficult to get a good grasp of transistors. Full analog electronics
understanding leads us to advanced digital signal processing (DSP) and more complex
electronic systems. The building blocks of analog electronics are transistors. Transistors
come in many shapes and forms. Bipolar and CMOS are the most popular types. Switches
and amplifiers are common applications built by transistors. Transconductance smallsignal models are suitable for finding out the exact voltage, current, and power gains of an
amplifier depending upon the amplifier topologies. The op-amp is by far the most widely
used electronic device that is implemented in a large number of designs. This chapter only
covers a few op-amp circuits. Its up to the reader to further explore other circuit
implementations as well as design techniques and tradeoffs. With a solid understanding of
transistors and op-amps, complex circuits can be easily built, tested, and analyzed.
Quiz
1) Design a simple current source. Use one diode, one resistor, and one voltage source.
Your design target is 10 uA from a 5 V supply. Assume VBE = 1 V. Hint: Short the NPN
base and the collector together to form a diode.
2) An amplifier has the following open-loop frequency response (see figure 4.97). From
DC to 10 kHz, gain is at 100 dB. Estimate unity-gain frequency.
Figure 4.98:
Op-amp current source
4) Many analog applications involve measuring temperature. A thermocouple is often used
to measure temperature and produce an analog voltage. Thermocouple devices consist of
two pieces of wire (conductor) made of different kinds of materials. The first conductor
generates a voltage change from temperature change. The second conductor type would
generate a voltage giving a different temperature gradient change. The transfer function of
temperature per degree depends on the thermocouple type. A K-type thermocouple gives
about 40 uV per C while an S-type would give roughly 7 uV per C. Figure 4.99 below
shows a typical thermocouple application.
Figure 4.101:
Common emitter amplifier
As Vin goes up, voltage across the collector resistor increases, causing VC to decrease.
Excessive Vin increase could cause VC to go too low forward biasing the base-collector
diode. How do we utilize the Schottky diode to avoid NPN saturation knowing that the
Schottky diode offers low forward voltage drop?
6) A popular circuit technique is the open-collector (bipolar) or open-drain (CMOS),
shown in figure 4.102. One of the applications of this circuit technique is I2C (i square c)
communication protocol for clock and data lines. The drain in this circuit connects to an
external R1 (pull-up resistor). Its called pull-up because when Q1 is off, the external pin
pulls up to the rail generating a logic 1 (true) signal and vice versa. By knowing the onresistance of Q1 and R1 sizes and the precise voltage, current consumption can be
obtained. Assume the rail voltage is 5 V, Q1 on-resistance is 200 m and R1 is 4.7 k
(the typical size of I2C implementations). What is the voltage at the external pin when the
control signal goes high?
Figure
4.103: Open-loop
Op-amp comparator
8) Design an active low-pass filter with f 3db at 10 kHz and a fixed gain of 10 starting at
1 MHz (see figure 4.77), assuming Ri = 100 k.
9) Figure 4.104 shows the package of a standard MOSFET, 2N7002 by NXP
Semiconductor. This MOSFET is spec at 60 V, 300 mA NFET. 60 V is the maximum
drain-to-source voltage. 300 mA means that this NFET is capable of supplying 300 mA
drain current (ID) at a specific VGS. Use the datasheet below and find the VGS value so
that 2N7002s drain current is 300 mA.
http://www.nxp.com/documents/data_sheet/2N7002.pdf
Figure 4.104
2N7002 MOSFET (Courtesy of NXP Semiconductors)
10) On-resistance (RDSon) is non-zero in real transistors. What is the RDSon and drain
current (ID) of 2N7002 if VGS = 5 V?
11) Use PFET to design a Wilson current mirror. The current mirror will produce a 10 uA
NMOS Inverter
In figure 4.38 from chapter 4, Analog Electronics, an NFET and resistor are used to
construct an inverter. When VIN is high (e.g., 5 V logic), VOUT at the drain is low. In
high density CMOS design, two CMOS complimentary transistors (NFET, PFET) are used
instead. The reason for that is because of power consumption. Compared to a PFET and
NFET type of inverter, an NFET and a resistor inverter draw more power. This is not an
ideal situation for powersensitive applications such as high-speed CPU design. When
input is high, NFET is enhanced, and current flows through the resistor; NFET and the
resistor are burning I2 R power.
Table 5-2: Inverter truth table with N, PFET on, off requirements
Inverter Action
To understand NFET and PFET inverter we need to model the transistors as a switch. The
following switch modes in figure 5.6 further describe these circuit operations. If the FET
is on, its enhanced (switch closed). If the FET is off, its cut-off (switch is open). If the
gate is fed high at VIN (left-hand side of figure 5.6), PFET turns off (top switch opens),
NFET is enhanced, and VOUT pulls down due to a non-existing current path. When VIN
is low (right-hand side of figure 5.6), NFET turns off (bottom switch open), PFET
enhanced, and VOUT pulls up due to a nonexisting current path.
Shoot-Through Current
At first glance, it appears that this inverter does not draw any current at all. But if you look
closely, youll see that it draws transient current during VIN transitioning from high to low
and vice versa. This current is called shoot-through current. Figure 5.7 shows the VIN
transition causing the shoot-through current. Pay attention to the VIN midpoint (2.5 V).
Both P and NFETs are enhanced at the midpoint of VIN causing current to flow through
both transistors. The result of that is the shoot-through current occurring at each VIN
transition. Figure 5.8 is a shoot-through
Ring Oscillator
A popular circuit called a ring oscillator is made of inverters. Ring oscillators can be used
in semiconductor process development to characterize device performance. A ring
oscillator comprises three inverters (see figure 5.9). Suppose the input signal level (far
left) is logic 0 (dotted oval), the NOT gate inverts it and yields logic 1 (first inverter
output). This logic 1 feeds into the input of the second inverter. This inverter changes it to
logic 0. At the third stage output (far right), it yields logic 1 again. This logic 1 (far right
inverter output) resets the input of the first stage from 0 to 1 (dotted line). The logic level
A
real inverter waveform is shown in figure 5.10.
OR Logic Gate
There are other logic gates that are in the mix of digital building blocks. They are OR,
NOR, AND, NAND, and XOR gates. Below is the OR gate schematics symbol (see figure
5.12).
OR Gate Schematic
Several transistors are needed to construct
the OR gate. Figure 5.13 shows the schematic
of an OR gate. Two PFETs are connected in
series. Two NFETs are connected in parallel.
Recall the transistor on/off table in chapter 4,
Analog Electronics. The OR gate operation is
understood as such: If either A or B input is
high, the NFET drain (inverter input) gets
pulled down, and the inverters output is
high. The output only goes low if both A and
B inputs are low. When this occurs, NFETs
turn off and PFETs are enhanced, yanking the
inverter input high. This results in inverter
Three-Input OR Gate
An OR gate, or any other logic gate for that matter, can have more than two inputs. A
threeinput (A, B, C) OR gate symbol is shown in figure 5.14.
LSB, MSB
Among the three digits in the OR gate truth table, the number on the far right-hand side
represents the least significant bit (LSB). It carries the smallest weight amount. The
number on the far left-hand side is the most significant bit (MSB). It carries the largest
value. This weighted approach can be explained by converting 110 back to decimal. The
LSB currently has a value of 0 and has a weight of 20. The second digital 1 has a
weight of 21. Finally, the MSB carries a weight of 22. To covert 110 back to a decimal
number, multiply the corresponding binary digit by its weight, then add them up:
MSB LSB
(22 X 1) + (21 X 1) + (20 X 0) = 6
All combinations of gate input numbers yield an output of logic 1, except for an input of
all 0s. The name OR gate comes from the fact that the output yields a logic 1 if one or all
of the inputs is high. To fully understand logic gates, we cant just memorize the truth
table. Instead, we need to fully understand the input and output conditions of a specific
logic gate. With the understanding of these conditions, we can then come up with the truth
table values.
NOR Gate
By adding a dot at the OR gate output, NOR gate is obtained (see figure 5.15).
XOR Gate
The last basic logic gate is the exclusive OR (XOR) gate. XOR outputs go high if the
inputs are different (rows 3 and 4). If the inputs are the same, outputs stay low. The XOR
symbol and operation table are shown in figure 5.17 and table 5-8.
Combinational Logic
Combing logic gates together create an endless number of possible combinations. These
logic circuits are created using combinational logic. Figure 5.19 below shows a practical
example. For safety reasons, automotive makers implement the windshield wiper
operation in such a way that the windshield only works if three conditions are met. First,
the front hood is completely closed, and both the windshield wiper switch and the ignition
key are turned to ON positions. This leads to a simple three-input AND operation.
Meanwhile, to make it easier for automotive technicians to work on the windshield wiper,
there is a bypass switch in place to turn the wiper on regardless of the three conditions. An
OR gate combined with an AND gate could accomplish that.
Boolean Algebra
To express the operations more logically, we apply Boolean algebra. For an AND gate,
inputs are multiplied (solid dot) by each other. For an OR gate, inputs are added to each
other. Figure 5.20 describes the logical circuits in Boolean algebra and the symbol
definitions: F (front hood), WS (wiper switch), I (ignition key), B (bypass switch), and
WM (windshield motor).
The application below shows another example of a Boolean circuit expression. Two
temperature sensors are used to control a heating system. If the first or second temperature
falls below a certain temperature (logic 0), the heating system turns on. The logic circuit
and Boolean algebra are shown in figure 5.21.
Figure
5.22: NAND and NOR gates Boolean equations
Latch
Combinational logic output does not require any previously stored information (memory)
to obtain a valid output. Many electronic systems, however, require memory to be used for
desired operations. For example, when the user of a microwave oven enters the cooking
time, the time is stored as memory within the microwave oven electronics. Many
automobiles nowadays have memory seats. The passcode of a home security system is
stored as memory within the system. Smartphone cameras store images or videos as
memories. There are many more electronic applications that use memory. Digital circuits
such as the latch and flip-flop are basic building blocks of digital systems and data storage
elements. Digital systems combined with standard logic gates and memory are called
sequential logic. The difference between a latch and a flip-flop is that a flip-flop uses a
clock to determine the output states, a latch does not. A latch consists of two inputs, a set
(S) and reset (R), and a differential output pair (Q, Q_bar). Figure 5.23 shows the latch
schematic symbol.
Flip-Flop
In the previous latch example, flip-flop would be an ideal choice to control output with
timing requirements. The S-R edge-triggered flip-flop symbol (see figure 5.27) is similar
to that of the latch except that there is an additional pin for the clock input (C). With the
additional clock pin, this flip-flop triggers the output in response to the rising or falling
edges of the clock, hence the name edge-triggered flip-flop.
flip-flop symbol
The operation of the S-R edgetriggered flip-flop is that the output responds only when
clock is high. When clock source is low, outputs remain in their previous states. The
timing diagram in figure 5.28 shows how flip-flop operates. Clock pulse C runs at a fixed
frequency with a 50% duty cycle. S and R signal levels are randomly assigned. During the
first rising edge of S, Q should have been set to high; instead, it stays low because the
clock pulse is low. Q goes high right after the rising edge of the clock. Q continues to stay
high while S remains high. After the first S falling edge, Q resets to low during the high
clock. The first rising edge of R has no effect on Q because S is low. On the second rising
edge of S, Q remains low due to clock being low. Q rises upon the next subsequent high
clock. Q finally gets reset when R goes high. Some flip-flops respond to the falling edge
of clock instead of a rising one. Such a flip-flop symbol is shown in figure 5.29 (dot at the
C pin).
5.31).
Frequency Divider
Figure 5.32:
Divide-by-two frequency
divider
One popular application of J-K flip-flops is the frequency divider. A divide-by-two
frequency divider is shown in figure 5.32. Its a 2-bit divider. The bit is the basic unit of
digital information. Its the smallest addressable unit in digital system. A bit could be
assigned either 1 or 0 (transistor on or off). Digital electronics use bits and bytes to
quantify memory size. For example, 8-bits of memory is equivalent to 1 byte. A bit in the
frequency divider represents the number of
possible combinations there are in binary system. For a 2-bit system, there are 22 = 4
combinations. For a 4-bit system, there are 24 = 16 combinations. Table 5-8 shows the
number of possible states in decimal up to 8 bits.
to low. QB remains high even when QA (QBs clock source) goes low. The process then
continues. You can see that the clock frequency of C is divided by half through QA. QBs
frequency is four times less than C. Additional dividing action can be achieved simply by
adding flip-flops in series. This flip-flop utilizes the clock connected in series, i.e., each
clock is independently operated. This could potentially create a timing error as one flipflop has to wait for the output to respond before triggering the clock of the next flip-flop.
Shift Register
Flip-flops clocks can be connected on a dedicated line making it common among all flipflops. A well-known circuit called a shift register accepts data serially, one bit at a time on
a dedicated line. The shift register output is in the exact form of the input, in this case,
serially. An example of a 3-bit shift register is shown (see figure 5.34). This connection is
a daisy-chain connection. Its name came from the fact that multiple devices are connected
as a chain.
Multiplexer
A more intuitive way to control gain is to use multiplexer (MUX). A multiplexer has
multiple inputs. It selectively uses only one specific output channel depending on the
control signal (CTRL). A simple MUX symbol and circuit are shown in figures 5.37 and
5.38.
channel A is ignored and B channel is selected. The final gain control circuit
implementation using MUX is shown below (see figure 5.39).
Figure
5.39: Gain control circuit using MUX and op-amp
Mixed-signal
If the op-amp on the previous page is bipolar-based, this is a mixed-signal system,
meaning it combines both analog and digital circuits. Both CMOS and bipolar devices can
be used in digital and/or analog designs. The trade-off comes down to power,
performance, and cost. Many applications require interfacing between analog and digital
quantities. For example, when you are talking on a cell phone, your voice is an analog
quantity. Using analog-to-digital converters (ADCs), the voice is digitized and upconverted to a much higher frequency before transmitting as radio-frequency waves in the
air. Once the signal is received by the receiving phone, the process is reversed using
digital-to-analog converters (DACs) where the digital signal is converted back to sound as
analog signals. This analog-to-digital, digital-to-analog concept is shown below in figure
5.40. Electronic systems such as the one below require engineers ability to determine
what type of device to use in either analog or digital systems.
Level Shifter
To resolve this load issue, a driver (level shifter) circuit can be used. A level shifter
translates (shift) voltage levels from V+ to higher V++ increasing current driving
capability. Figure 5.41 demonstrates this concept.
Multi-Layer Board
For printed circuit board design, multiple layers of power supplies and grounds are
regularly implemented in printed circuit boards (PCB) with the same idea above
(segregating noises). Figure 5.42 shows a student-designed circuit board (a temperature
sensor application) using a microcontroller, seven-segment display, AC-DC conversion,
and transformer. The bottom of figure 5.42 shows a Microchip Technology audio
development board for audio applications. This board divides the power and ground into
multiple layers. The input and output jacks (connectors) of this board are 3.5mm.
Analog-to-Digital Converter
Analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) are found in
literally all kinds of electronic products. Lets first look at ADC. The ADC schematic
symbol is shown in figure 5.43. ADCs come in wide varieties and they are categorized by
performance parameters such as speed (sampling rate in Hz) and resolution (number of
bit) in addition to channel numbers, noise levels, temperature, voltage ranges, and
accuracy. Analog Devices, Texas Instruments, Linear Technology, Maxim Integrated
Circuits, and Microchip Technology are among major ADC suppliers. Most offer online
parametric product search such as this site from Analog Devices:
http://www.analog.com/ps/psthandler.aspx?pstid=10169&la=en to help customers choose
the right parts for their designs. Typical resolution ranges from 8-bit for low-end ADCs to
high-end 24-bit ADCs. The higher the resolution, the more accurate the ADCs are. For
example, an 8-bit ADC with 5 V analog reference voltage yields 256 steps, 28 = 256. Each
step, therefore resolves to 5 / 256 = 19.5 mV. If it were a 24-bit ADC, a 5 V reference
voltage results in 298 nV per step, a much more finer and accurate ADC. The analog-todigital conversion of an 8-bit ADC is described in figure 5.44. The analog input signal is
reproduced then converted to a digital signal as seen in the waveform. ADCs can be
classified in different market segments. From industrial measurement, video, audio, and
data acquisition, to highspeed instrumentation and radio-frequency applications, ADC
topologies are categorized by architecture. Popular ones are sigma-delta (-), successive
approximation (SAR), and pipeline. The differences among their architecture are
characterized by resolutions and sampling rate. Sigma-delta ADCs operate high
resolutions (12 to 24-bit) operating at low sampling rate (10 to 10 kHz). SARs operate in
mid range performance (12 to 16-bit, 100 kHz to 10 MHz). Pipeline runs in the highest
sampling rate (10 MHz to 1 GHz) with the lowest resolutions (8 to 16-bit).
Nyquist Frequency
When we talk about sampling rate, its identified as how often the ADC takes an analog
signal sample. The higher the sampling rate, the more accurate the output would be.
Another ADC spec is throughput rate. Its defined as mega-sample per second (MSPS).
Low end, low cost ADCs run in the 100 Hz range, with high-end ones running in the 1
GHz range. The waveform below (see figure 5.46) shows that the sampling frequency is
running twice as fast as the input signal. Its converting the analog-to-digital signal twice
in every input signal period. The twotimes sampling frequency is the Nyquist frequency.
Its the minimum frequency that the sampling signal needs, i.e., at least twice as fast as the
input signal (and preferably more than twice), in order to convert an analog value into a
digital value with less error.
Figure 5.47: 3-bit (8 levels) analog input to digital output transfer function
The digital outputs look like ladder steps. These outputs are 3-digit binary numbers with 8
possible output combinations (2 3 = 8). Starting from 000, the value corresponds to 0 V
analog input. Going up one step in the ladder, 001 will be resolved to 1 V input, so on
and so forth. There are eight individual analog input ranges: 0 to 1 V, 1 V to 2 V, etc.
These produce a discrete output code for each analog input. Each analog input voltage
range can literally take an infinite number of values (the definition of an analog signal),
causing differences between the actual analog input and the exact value of the digital
output. This uncertainty is collectively called quantization error. This error ultimately
leads to quantization noise with the ADC.
Digital-to-Analog Converter
Digital-to-analog converters (DACs) are the reversal of ADCs, converting digital signals
to analog ones. The DAC output is the proportional value of the digital inputs based on a
reference voltage. The DAC schematic symbol is shown below (see figure 5.50).
Figure 5.50:
DAC schematic symbol
DACs can be found in all kinds of applications: audio, video, digital processing, wireless
systems, manufacturing, motion, process controls, data acquisition, and measurement that
require digital programming capabilities, just to name a few. The DAC transfer function
can be derived below:
The 101 digital inputs are first converted to a decimal number using a binary-to-decimal
conversion method. Regarding DAC architecture, many academic texts cover resistive
dividers and binary weighted and R-2R ladder DACs. As with ADCs, DACs applications
are widespread, from cameras, audio and video processing, and medical imaging, to
wireless communications and advanced TV applications. Many end-system designs now
incorporate system-on-chip (SOC) methodology where analog, digital function and
circuits are integrated in one single piece of silicon, motivated by small die sizes, less
board space (lower costs). Majority of high end IC suppliers design, manufacture systemon-chip ICs. One example is in the wireless industry where transceivers (transmitter and
receiver combined in one design) transmit and receive radio signals. Individual circuit
blocks could include ADCs, DACs, amplifiers, buffers, phase lock Loop, multiplexers,
filters, voltage-controlled oscillator, voltage, current references, and other logic circuits all
on one single die. To successfully design highly integrated products, engineers must
understand the entire system-level specifications. Many designs involve circuit and
Binary-Weighted DAC
Figure 5.51 is a simple DAC example called binary-weighted DAC. Its based on a closedloop inverting opamp using summing amplifier topology. D0, D1, and D3 are digital
inputs making it a 3-bit DAC. VOUT is the analog output. All three digital inputs will
have the same voltages. Since D0 input has the largest resistor resulting in the least
amount of current, its the LSB of the DAC where D2 is the MSB. Applying the inverting
amplifier gain rule from chapter 4, Analog Electronics, if all D0 to D3 are high 111 at 5
V, the VOUT is derived as below.
For
example, if R = 10 k, and RF = 5 k, VOUT = (5 / 10 k + 5/ 20 k + 5 / 40 k) X
5 k, VOUT = 4.38 V
555-Timer
Perhaps the most widely discussed IC in college curricula is the 555-timer. It can be
implemented in many applications, e.g., precision timing, oscillation, pulse generation,
and pulse width modulation (PWM) with an adjustable duty cycle. The original 555-timer
was invented by Mr. Hans Camenzind who passed away in 2012 at the age of seventyeight. Its one of the most successful ICs ever invented. It remains widely used in
academics and commercial applications. Figure 5.53 shows the 555-timer block diagram
and pin names.
Summary
In this chapter, digital electronics were discussed from the ground up. We started from bits
1 and 0 and the definitions of logic gates, and then explained operations from the
device perspective. Spanning from simple logic circuit blocks to popular digital and
analog circuits, ADCs, DACs, multiplexers, digitally controlled variable gain amplifiers,
555-timers, summing amplifiers, and other practical circuits were presented and explained
in a simple manner combining real world quantities and parameters.
Quiz
1) Construct an AND gate using CMOS transistors.
2) Design a frequency divider that generates a 2 MHz square wave signal from a 16 MHz
input clock. Hint: Use three J-K flip-flops.
3) Create a 1 GHz output clock from a 0.5 GHz clock source. Verify it using timing
waveform. Hint: Use a two-input XOR. Separate the 0.5 GHz into two signals. Feed them
to the inputs of the XOR. Make the inputs 90 degree out of phase from each other.
4) Design a variable-gain op-amp (see figure 5.36) with the following gain options: 2, 4, 8,
and 16.
5) How many levels of digital outputs does an 8-bit analog-to-digital converter (ADC)
have? What is the output code of the first and last levels?
6) Calculate the resolution of a 16-bit ADC if the analog reference voltage is 1.8 V.
7) Design a 555-timer application that is astable-based meaning its unstable in both states.
Draw trigger, discharge, threshold, and output waveforms Hint: Connect the trigger, and
threshold pins together.
8) A 3-bit Digital-to-Analog Converter (DAC) has the following transfer function:
Vout = (Vref X D) / (2n 1)
D: Digital input; Vref: Reference voltage; Vout: Analog Output voltage; n: number of bits
Calculate Vout using digital inputs below. Vref = 2.5 V.
a) 010
b) 111
Chapter 6: Communications
An electronic communications systems function is to transmit and receive information
from one end to another and vice versa. Some communications are one-way (simplex)
meaning one end can only transmit, the other can only receive. Radio and television
broadcast are examples of simplex communications. Other communications techniques are
occurring in both directions (bi-directional). In bi-directional systems, information can be
communicated in two ways: 1) occurring at the same time (full duplex), and 2) one
direction at a time (half duplex). Cell phones and computer networks are prime examples
of full-duplex systems while walkie-talkies (two-way radios) are examples of half-duplex
communications. Communication systems that are able to transmit and receive signals are
called transceivers. A cell phone is a classic transceiver example. Communication systems
comprise a series of analog-to-digital, digital-toanalog conversions where information is
transmitted and received via a communication medium (channel). The medium could be in
the form of wired or wireless (signal travels through the air). The raw material of any
wired medium is typically copper. Fiber optics have gained popularity in recent years.
Most wired communications are standardized as protocols by organizations such as The
Institute of Electrical and Electronics Engineers (IEEE). Well-known protocols are RS232 (computer serial port), RJ-45 (phone connector standard) and coaxial cable. Voltage
levels, attenuations, impedances, and frequency ranges are clearly specified by each
standard. A wireless signal goes through the air as the medium is an AC signal called a
radio-frequency (RF) signal. Before transmitting through the air, signals in the
communication systems are first up-converted to much higher frequencies of RF signals
frequency. The RF signal frequency ranges are wide-ranging from 3 kHz to 300 GHz. This
chapter primarily focuses on wireless communications. In the US, each individual
frequencies region (band) hold specific purposes, from phone, radio, satellite, and
television, to broadband communications. Each type occupies a specific frequency region
called a frequency band (spectrum). Frequency band allocations are controlled by the
Federal Communications Commission (FCC), a government agency. The picture below
shows a portion of the frequency spectrum designated by the FCC. The numbers on the
top represent the frequencies in Hz. Each rectangle defines the names of usage and
frequency ranges. Communication systems work mostly on frequency domain.
in the middle at 10 kHz. The rest of the spectrum span from 0 Hz to 20 kHz does not show
any visible shapes. This demonstrates that the signal frequency is constant at 10 kHz.
Recall that in chapter 3, AC, we derived resonant frequency using LC tank circuit. Using
such a circuit is a good example of producing a signal with sharp frequency response
similar to figure 6.1. Most radio signal transmitters implement some type of resonant
circuits to generate filtered, amplified, frequency-sharp response such as series L C where
maximum current occurs (XL Xc = 0), i.e., minimum impedances. This type of design is
called a band-pass filter. It allows a signal to pass through only within a specified
bandwidth (frequency range). Figure 6.1a shows the band-pass current and impedance in
frequency domain.
Modulation
Regardless of wired or wireless signal, most systems go through a modulation process,
which is defined as combining the original information of interests with a carrier signal. A
carrier frequency needs to run at a much higher frequency than the information signal. The
result of this combination yields a modulated signal that includes both the original
information riding along with the carrier signal. This technique squeezes more information
within a certain bandwidth, raising the data rate before the signal was transmitted.
per second (bps). It a measure of how many bits are processed, transmitted, or received
per one second. A popular serial data transfer protocol such as USB version 2.0 (high
speed) data rate is about 48 Mbps. The newer USB 3.0 (super speed) is specified at
maximum 4 Gbps. Figure 6.4 shows a USB logo commonly seen on electronic products.
C = F
To further understand why modulations are used, we need to discover the relationship
between frequency, wavelength, and light speed. RF signals are simply electromagnetic
waves that travel through air space at the speed of light. Wavelengths unit of
measurement is the meter. Its the fundamental frequency period. The transfer function of
frequency (F), wavelength (), and light speed (C) is defined as:
C = (F) X ()
Speed of light (C) is a constant that is equal to 3 X 108 meter / second. From the transfer
function, if F goes up, needs to go down so that C remains constant. In wireless
communications, antennae are used frequently. determines the antenna size, i.e., and
antenna size are proportional to each other. To reduce antenna costs, its desirable to keep
the as small (frequency as high) as possible. The other incentive of keeping the antenna
smaller in size is to prevent additional noise captured by the large antenna size. For
example, the wavelength () of a 90 MHz frequency modulation (FM) radio signal is,
C = (F) X ()
= C / F
= 3 X 108 / 90 X 106 = 3.33 meters
From this example, you can see that in order to keep antenna size small, frequency would
need to increase with the constant speed of light (C). By using modulation technique, high
frequency modulated signal can be created by adding a higher frequency carrier signal to
the original signal. We will first see how amplitude modulation works in the next section.
Amplitude Modulation
Amplitude modulation (AM), often used in radio system, best describes how modulation
works. In the US, the AM radio is broadcast on multiple frequency bands. The range of
frequencies goes from 535 KHz to 1,705 KHz. We will figure 6.6 to further understand
AM. In this example, the audio signal operates at f1; the sinusoidal carrier frequency
operates at f2. We assume f1 is also a periodic sinusoidal wave for simplicity reasons. In
reality, the audio signal will be in the form of random voice (analog) signals. The
minimum frequency of the carrier signal (f2) needs to follow the Nyquist theorem, i.e., f2
needs to be at least twice as much as f1. The f1, f2 waveforms are shown in figure 6.6. By
adding f1 and f2 together, the modulated signal can be obtained (see figure 6.7). This
signal contains the original information and the carrier signal running at higher data rate
than the original signal (f1). Note that the amplitude of the modulated AM signal changes
with the f1s amplitude. The modulated signal is enclosed with a sine wave shape, the AM
envelope. The AM envelope is not actually present in the modulated signal. It
characterizes how well the modulated signal is created. To determine the quality of the
modulated output signal, some criteria such as modulating index or the modulation factor
are used. Figure 6.7a on the next page shows Emin, Emax, the minimum and maximum
peak-to-peak levels.
Figure 6.7a:
Minimum and maximum peak-to-peak levels
Ideally, the modulation index is 1 (Emin is zero). Emin is the major error source regarding
AM transmission. It represents crossover distortion where the signal is transitioning
through the horizontal axis. To further quantify distortions, a Bessel chart can be used in
the table 6-2 below. The table consists of the modulation factor in the far left column. The
smallest factor is zero, meaning there are no harmonics, sideband components, or intermodulation. They practically represent a DC signal. As frequency increases, so do the
harmonic appearances and side bands. These cause the number of side band increases
expanding to the right-hand side of the table. This chart is only showing the modulation
factor up to 1.5 as an example. The modulation index could effectively go up to 10. The
values in the sidebands are normalized sideband amplitude values. The side bands at the
farther right-hand side would have the lowest amplitude compared to the left, e.g., 0.56,
0.23, 0.06, and 0.01 on modulation factor 1.5.
AM Transmitter
The circuit below (see figure 6.8) is an AM transmitter circuit example. This circuit can be
used to create the AM modulated signal in figure 6.7. It is simply a common emitter
amplifier where the collector voltage is the resulting signal modulated by adding the
carrier and audio signals together. By varying the collector resistors, the modulation factor
can be adjusted. The LRC circuit fine-tunes the AM signal frequency using resonant
frequency and band-pass techniques.
Frequency Modulation
Frequency modulation (FM) works fundamentally different than AM. FM radio signal
allocation in the US ranges from 88 MHz to 108 MHz. Although both AM and FM add
audio and carrier signals together before transmitting via the air, unlike AM, FMs
modulated signals amplitude does not change when frequency changes with respect to the
audio signal amplitude. This phenomenon was described in figure 6.9. f1 is the original
audio signal adding to the carrier signal (f2). As the audio frequency (f1) reaches the peak,
the frequency of the FM modulated signal is the highest. When it crosses the zero
horizontal axis, it runs at the lowest frequency. Its due to this nature that FM is far
superior to AM in terms of signal quality, because the AM amplitude fluctuates with the
original signal. These fluctuations greatly contribute to noise. On the contrary, the FM
amplitude stays roughly constant, eliminating the majority of noise components. Its for
this reason radio stations use FM to broadcast higher-quality music. On the other hand,
AM is used mainly for audio (talk shows) broadcast. To achieve unchanged amplitude,
FM noise clipper circuit discussed in chapter 3, AC, can be used (see figure 3.44a).
to the output of the internal voltage controlled oscillator (VCO). PLL is a negative
feedback system. Its task is to self-correct phase difference between the two phase detector
inputs until the difference is zero. When this happens, the internal signal is phase locked
with the external signal. At first glance, PLL does not look that practical. One might say I
could use the external signal as my clock source directly. Why do I need a PLL? From a
practical point of view, that is a correct statement and legitimate question. To answer the
question, you should understand that a practical PLL is implemented with a binary divider
to create signals at multiple frequencies. Figure 6.11 shows the actual implementation.
computers, high-speed digital design, microprocessors, and systems that use clock
distributions.
Summary
We covered basic communication systems at the component and system levels in this
chapter. Communication engineering standards, protocols, and specifications were covered
emphasizing time, frequency domain, frequency, wavelength, and speed-of-light
modulation and demodulation techniques, amplitude modulation modulation (FM) were
described at the device and system levels. AM and FM circuits such as AM transmitters
and receivers were reviewed. Communication system parameters such as bit rate, baud
rate, harmonics, inter-modulations, modulation index, and Bessel charts were discussed.
The chapter closes with phase lock loop theory and applications.
relationship. Among
(AM) and frequency
Quiz
1) From the spectrum analyzer display shown in figure 6.14, determine approximately
total bandwidth needed transmit such a signal. Span: The difference in frequency between
far left to right of the display window. Start, Center, and End are the absolute starting (far
left), center (middle), and ending (far right) frequencies in the display window. the
to
Chapter 7: Microcontrollers
Microcontroller Units (MCUs) are silicon chips that act as the brains of many electronic
systems. They are found in commercial, industrial, consumer, and military electronic
products. Automobiles, computers, audio, video, lighting, wired/wireless network
communication, LCDs (liquid crystal display), touch screens, medical devices, motor
controls, temperature controls, power management, mechanical systems, childrens toys,
and home appliances (airconditioners, washer, driers, microwave ovens, and refrigerators)
are all controlled by MCUs. The systems containing MCUs are called embedded systems.
The MCUs are embedded inside without direct access by the end users. The end users
do not have access to the design source code (computer programs). Users only have
limited numbers of programming capability. One example is a microwave oven where
users program the cooking time by inputting the time. Users cannot change how the
time is inputted (e.g., which button to use to input the time). The button locations and the
beep volume and frequency are hard coded in the source programs by the embedded
system designers. The source code was downloaded to the MCUs during design and
manufacturing. MCUs therefore are field programmable. One MCU could have many
applications as long as the source code is different, making MCUs highly configurable.
Embedded system engineers use software development tools to develop and debug
programs. We will discuss development environments later in the chapter. The worldwide
MCU market share was US $13 billion from 2011 data. The top ten worldwide MCU
vendors account for 70% of total MCU sales. They are Renesas Electronics, Freescale
Semiconductor, Atmel, Microchip Technology, Infineon Technologies, Texas Instruments,
Fujitsu, NXP, STMicroelectronics, and Samsung. Among major MCU markets, the
automotive market accounts for almost half of the total market size. Popular programming
languages used by embedded system engineers are assembly, C, and C++. In terms of
MCU types, MCUs are similar to conventional microprocessors in a sense that they both
have CPUs. The difference is in the peripherals (external components). Although both
CPUs and MCUs communicate with peripherals through data and address communication
buses, CPU peripherals are external while MCU peripherals are internal on the same chip
(on-chip). With CPUs, peripherals such as volatile Random-Access Memory (RAM), nonvolatile Read-Only Memory (ROM), clocks, printers, disk drives, monitors, keyboards, or
mice are external devices. In MCUs, RAM (data memory) and ROM (program memory),
along with other peripherals, are on-chip with the CPU. Some examples of MCU
peripherals are comparators, ADCs, DACs, and timers. Depending on the type of MCU,
some come with data bus interfaces including Universal Synchronous Asynchronous
Receiver Transceiver (USART), Serial Peripheral Interface (SPI), Inter-Integrated Circuit
(I2C), Universal Serial Bus (USB) and Pulse Width Modulation (PWM) channel. Newer
MCUs come with networking protocols such as TCP/IP, Ethernet, and many other wireless
network capabilities. Due to a large number of peripherals available on MCUs, they are
highly configurable through software programming to control their functions. MCU
datasheets that are several hundred pages are quite common. Figure 7.1 on the next page
shows a simplified block diagram of a CPU and MCU.
Figure 7.1:
Simplified CPU and MCU block diagrams
MCU Parameters
The CPU performance within MCUs is usually lower than conventional computing ones
because there is no need to design embedded systems running in multiple GHz speed.
CPUs in computers often use a passive heat dissipation device called a heat sink to help
disperse heat into the surrounding air due to excessive heat generated by fast clock speed.
Many embedded designs involve human interactions, (e.g., by pushing a button or
inputting on a touch screen). The time delay may be in the milliseconds. MHz clock is
quite sufficient to meet the requirements. For this reason, a heat sink is seldom needed. An
MCU with a CPU that runs above 100 MHz is considered high performance. Many
MCUs CPUs implement ARM (Advanced RISC Machines) architecture. ARM is a
microprocessor family designed according to ReducedInstruction-Set-Computing (RISC).
RISC-based CPUs require a lot fewer transistors than conventional CPUs. This leads to
relative slow clock speed and lower power consumption. This low power methodology
ultimately benefits MCUs from a lower unit price, making it ideal for low-cost designs.
This explains the large MCU application numbers in the market. Figure 7.2 shows a
wireless smoke detector design reference by Microchip Technology using a conventional 9
V alkaline battery.
Figure 7.2: Wireless smoke detector (far right); smartphone, home security system
(bottom)
In addition to the standard parameters such as supply voltage and temperature ranges,
there are vast numbers of MCUs to choose from differentiated by types, product families,
peripherals, and packages. Major MCU vendors like Microchip Technology offer close to
1,000 MCUs to customers. Table 7-1 attempts to list some MCU parameter metrics. Most
MCU vendors have parametric search websites so engineers can look up parts fairly easily
based on their needs.
Harvard Architecture
PIC implements Harvard architecture. The special feature of this architecture is the
separation of program and data memory. Program memory (flash) stores user programs.
The CPU fetches (retrieves) program instructions (commands) from the program memory
on a dedicated bus. Data memory writes or reads data (file registers) to and from RAM
and the CPU on a separate bus. The advantage of the Harvard architecture is that the CPU
fetches and executes program instructions at the same time maximizing timing efficiency.
These instructions perform mathematical, arithmetic, and logic operations upon interacting
with the program and data memory. Figure 7.4 demonstrates the Harvard architecture.
Figure
7.5: Simplified 8-bit PIC data memory block diagram
Each register needs to have an address so that the CPU knows where to access (fetch) it.
This is achieved by using the address bus between the RAM and the CPU. Once the
specific registers location is known, data is then transferred between the RAM and CPU
on the data bus. This addressing scheme applies to both data and program memory. To
strike this point clear, the revised Harvard architecture in figure 7.6 shows the address and
data bus in conjunction with the instruction bus.
Figure 7.7:
PIC18s program memory map
As mentioned previously, there are large numbers of PICs offered within a specific family.
The data and program memory space is device specific, i.e., the sizes vary from one part
to the next. The byte numbers shown are an example only. On PIC18 paging and banking
are used in addressing memory. Program memory is divided into pages while banks divide
data memory. Using the data memory map in figure 7.5 on page 251 as an example, there
would be total of 16 banks with each bank occupying 256 file registers, adding up to 4,096
file registers. 256 X 16 = 4,096. In the data memory, there are two main register types:
general-purpose registers (GPRs) and special-function registers (SFRs). GPRs hold
dynamic data during the execution of a program while SFRs are mainly for peripheral
configurations and operations such as input and output ports (I/O), timers, ADCs, DACs,
and PWMs. The SFR addresses are fixed in the data memory, and start from the lowest
address (see figure 7.8 on the next page).
MCU Instructions
The MCU instruction word length varies from one PIC family to another. The PIC18
instructions are 21-bits wide whereas the PIC16 instructions are 14-bits wide. Regardless
of bit size, all instructions consist of operation code (op-code) and operand. Op-codes are
the instructions that perform arithmetic and logic operations. Operands are file registers
addresses. Some instructions are byte-oriented while others are bit-oriented. Byte-oriented
instructions operate on the entire register. Addition, subtraction, logic operations, data
moving, and branching operations are examples of byte-oriented instructions. Bit-oriented
operations perform bit operations. Bit shifting and clearing are examples of bit-oriented
operations. An instruction set is a collection of all instructions. The instruction numbers in
the instruction set is family-specific and may differ greatly. Table 7-2 below lists some
common byte- and bit-oriented instructions in assembly language. Mnemonics in the left
column represent the operands names.
be common anode (CA) or cathode (CC) type. All anode nodes are connected together in a
common anode-type display. Turing it on requires power (5 V) to the CA node, and an RC
pin to get pulled down. The resistors functions are to limit the LED current.
Instruction Clock
Every instruction takes time to complete. The instruction clock is derived from an external
clock source that could come from two sources: 1) mechanical resonant devices, such as
crystals and ceramic resonators, or 2) electrical phase-shift circuits such as resistors and
capacitor oscillators. The trade-off between the two is that mechanical oscillator runs at
much higher accuracy with low temperature drift (change). RC oscillators, in contrast,
suffer from poor accuracy (more than 5%) over temperature. The precise instruction clock
frequency is device specific. In the 16-bit PIC24 family, the internal instruction frequency
is 2X slower than the external clock. The dsPIC30 has four external clock cycles per
instruction clock. Figure 7.11 on the next page shows a PIC24s oscillator (FOSC) and
instruction (FCY) frequencies. It takes two external clock cycles for one instruction period
(TCY).
Internal Oscillator
MCUs come with internal oscillators; some even have a PLL frequency synthesizer onchip. Designers can select, via software, an internal oscillator to supply the system clock,
the clock for the CPU, and other peripherals. The flexibility of selecting the clock sources
gives designers the flexibility to tailor their applications for optimal performance and
power consumption. Figure 7.12 is a simplified PIC MCU clock source block diagram.
The LP, XT, HS, RC, and EC designations are as follows: EC (quartz crystal resonators),
LP, XT, HS modes (ceramic resonators), and RC mode (resistor-capacitor circuits).
Among ceramic resonators, LP: lowpower crystal, 0 to 200 kHz, XT: crystal or ceramic
resonator, 0 to 4 MHz, HS: high gain setting for the crystal.
Figure
7.13: Timers function
Other than timing, the timer can be used as a counter to count an event. When counting,
the timer increments on every inputs rising or falling edge independent of the internal
clock. In this case, the timer is effectively counting signal transitions. Timers can record
an events arrival time; generate periodic interrupt; and measure pulse width, period,
frequency, or duty cycle. Moreover, we can use a timer to generate a waveform. A simple
application example using a timer could be toggling the LED connected to a GPIO pin
many times per second. This requires timer configuration to overflow the number of times
per second generating an interrupt. The ISR would include the code to blink the LEDs
accordingly. Some programming examples will be shown later in the chapter.
Interrupt
Interrupt is another major MCU feature. It provides a real-time response to the MCU from
either external or internal events. When an interrupt occurs, the main program stops and
the interrupt flag goes high. MCU is instructed to jump to and then run the interrupt
service routine (ISR). ISR is a user-defined program and can implement any MCU
features the programmers would like. Upon ISR completion, the program resumes running
the main program from where it was stopped by the interrupt. The interrupt flag then
needs to be cleared by software. If interrupt is not enabled or if the interrupt never occurs,
ISR will not be called and the interrupt flag will never be set. You can think of ISR as a
program waiting to run under special conditions. These conditions are fully configured by
the programs. There are many interrupt sources; table 7-4 lists some of them. The external
interrupt is a dedicated external pin used exclusively for interrupt. See figure 7.14 for a
practical external interrupt example.
Figure 7.14:
Practical example of external interrupt
Special Features
MCUs have many built-in features making it highly field programmable. Some MCUs
have separate power supply pins to provide supply voltages to CPUs and peripherals
separately. Isolating power supplies is essential in reducing noise from one area to another.
Some MCUs have internal regulators allowing one external supply voltage (VDD) and
power up multiple blocks within the MCU. This saves on MCU pin and board space while
keeping the number of external supply components minimal. Figure 7.15 elaborates on
this concept. A watchdog timer (WDT) is an independent timer that could recover from a
software malfunction, (e.g., an infinite running loop). If the WDT is enabled followed by
an overflow before it is reset via software, it assumes software control has been lost. It
then automatically resets the PIC. It can be used to wake a device from sleep (low power
mode) without reset provided that the WDT is reset periodically before it times out.
Power-On-Reset (POR) places the MCU in reset state when power is first applied. It then
releases the device from reset after a period of time. This time is controlled by the internal
power-up timer. The PORs job is to give enough time for the VDD to rise up to the
minimum level. Both POR and WDT reset are software configurable. Brown-Out-Reset
(BOR) resets the device if the VDD for the CPU core falls below a certain threshold. A
PIC24 MCU VDD core minimum is around 2 V. During reset, if the VDD core rises up
again, there is a delay time of about 20 us the MCU needs to wait before it gets released
from reset. The idea of BOR is to prevent erratic behavior due to excessive system noise
that may change VDD levels unexpectedly. The delay timer ensures that the voltage is
stable before releasing the device from reset. The Oscillator Start-up Timer (OST) is an
external crystal or resonator. The OST will automatically count 1,024 oscillator cycles
before releasing the clock to the MCU making sure the oscillator has stabilized. Sleep
mode is used to save power by minimizing clocks. The core and most peripherals can be
stopped as a result of sleep. Some PIC MCUs have XLP (extra-low power) technology
to save power with current running as low as 20 nA in deep sleep mode. The device goes
into sleep mode by executing a SLEEP instruction. Unlike an external Master Clear reset,
there are several events that can wake up the device from SLEEP without resetting the
device. The watchdog timer timeout, I/O pin, and peripheral output changes can wake a
device up while not resetting the MCU and then resume program execution. Sleep mode is
extremely useful in battery-powered applications to extend battery life. Examples of
applications are portable medical devices such as blood pressure meters and digital
thermometers; smart energy meters such as water, gas, heat, and electric meters; LCD
drivers for graphic display; integrated USB applications; smart cards for authenticated
systems; embedded wi-fi (wireless fidelity) modules; and power radio modules such as
ZigBee or RFID (radio frequency ID).
Figure 7.15:
Internal regulator
Development Tools
Most MCU vendors offer free stand-alone software development kits (software platform)
to embedded system designers and programmers. The development kits are a collection of
software components all combined into one software package. The components include a
program (code) editor, project manager, programming language support, source-level
debuggers, and software plug-ins. Embedded system engineers can use these software
features to develop, debug applications, hardware all in one software environment.
MPLABX is the latest development tool by Microchip Technology. Its an integrated
development environment (IDE) for embedded system engineers to develop code
{
printf (X is equal to 1); }
You can easily see that its evaluating whether X is equal to 1. If it is, then the program
prints out X is equal to 1. Recall MCU families earlier in this chapter. Each family
requires a compiler or assembler within the IDE to convert the programs and outputs to
machines codes before the MCU can run its operations. Most compilers and assemblers
are free. Many are both companyspecific and device-specific, e.g., an 8-bit MCU design
needs an 8-bit compiler, and the same compiler would not work on 16- or 32-bit code nor
would it work in another companys IDE.
Debugger
Debugging the programs within an IDE is called simulation and debug. Simulation checks
for the programs syntax errors using its programming algorithm built within the IDE
software. The ultimate goal of any embedded design is to verify that the code works on the
actual hardware using the debug function. To do so, the debugger is supported in the IDE
to act as a bugreporting tool between the IDE and target system (hardware). The debugger
sends the code out to the hardware that runs the applications based on what the code is
written for. It then reports back to the IDE through the debugger if there are any issues. It
keeps track of data and program memory contents along with program status. If the
program did not work the way the application was intended to, the programmers could
then use the reported information to modify the program accordingly. This error reporting
and program modification process repeats until the desired operations occur at the target
hardware. Microchip Technology offers several choices of debuggers. PICKIT3 is a lowcost debugger with many useful features embedded system designers need. Many
microcontroller companies offer variety of evaluation and development boards. Arduino is
a palm-sized, single-board microcontroller popular among academia and hobbyists.
Microchip Technology also supplies a variety of evaluation and development boards.
Figure 7.17 on the next page shows PICKIT3 and an evaluation board that has a LDC
screen on it.
It supports full, high-speed USB connection, wide-input voltage ranges (2 V to 5 V), and
multiple breakpoints so that engineers can pause the program during code executions.
From figure 7.18, you can see that ICD3 acts as the communication bridge between the
IDE and the target board. ICD3 allows users to add breakpoints in the program. The
debugger pauses at where the breakpoint is located during debug. The program continues
to be halted unless programmers click continue in the IDE. Breakpoint is a powerful
debugging tool for pinpointing errors in a program effectively. Figure 7.18a shows an
occurrence highlighted in a red box. When the debug starts, the program executes
instructions one line at a time. At line 13, where the breakpoint is added, the program
pauses during debugging. Programmers can now monitor and view program, data, and
memory contents as they wish. Clicking the continue button in the IDE resumes
program execution and move onto the next line of code (line 14).
with capture and PWM modules. In this example, the objective is to detect the portable
devices battery voltage. When the battery voltage falls below a threshold, the MCU
comparator output pin will pull up. This output pin can be used to turn on an LED,
notifying the user when the battery is low. The comparator output connects to an internal
timer as a pulse counter. In the application block (see figure 7.19 on the next page), R1
and R2 set the battery voltage threshold. Assume battery voltage is 5 V when fully
charged. 3 V is the threshold voltage you want to light up the LED. Using the voltage
divider rule, resistor values will be:
R1 = 10 k, R2 = 16.67 k
The comparator output goes to an XOR gate. The same output goes to the timer, which
acts as a counter (more on timer later). The second XOR input is a comparator control bit.
It controls the polarity of the external XOR output. If the inverter bit is set to logic 1
(true), the XOR output is inverted. If the inverter bit is set to logic 0 (false), the XOR
output is not inverted.
1, TIMER0
increments on high to low transition. If its set to zero (clear), TIMER0 increments on low
to high transition. There is a prescaler function that slows the clock down. PS<2:0> means
there could be 8 prescaler options (23 = 8). The timer rate can be divided from 1:2 all the
way to 1:256. For example, if the instruction clock runs at 1 MHz, PS bits are set to have a
decimal value of 4, and the internal clock is now running at 250 kHz (1 MHz / 4 = 250
kHz). The next timer bit is a PSA bit. It determines whether or not you want to use a
prescaler. If not used, no clock rate reduction occurs. For an 8-bit timer, when the timer
rolls over to 255, an interrupt automatically occurs (256 incrementing started from 0 and
ends at 255, 28 = 256). We can then use the interrupt signal to control other functions. The
OPTION register is the timer control register. Lets use TIMER0 to create a time delay of
2 ms. At the end of the 2 ms, an interrupt signal is generated. In this example, we are using
a 16 MHz crystal oscillator. First we need to figure out the instruction clock cycle from the
crystal. If you recall, the timer is fed by the internal clock. This clock comes from a crystal
oscillator. Wed need to divide the crystal by four to get instruction clock cycle. That turns
out to be 250 ns.
To slow down the clock, we use the prescaler value of 32. This gives us the actual
instruction clock frequency at 125 kHz (4 MHz / 32 = 125 kHz) or 8 us clock cycle (1 /
125 kHz = 8 us). Consequently, each step the timer counts is now 8 us. To achieve 2 ms
delay, we need to set TIMER0 register to start from 5 so that it will increment 250 steps
rolling over at 255 (5 to 255 = 250). Loading the option register in figure 7.22 would do
exactly what we want.
character type.
void delay(char x)
The void keyword means this C function does not return any values back to the operating
system. Within the function, we declare i, initialize x, and clear the TIMER0 register.
Since i is an index, we can step through 5 times. Recall that we need to roll over not just
once, but 5 times in order to get 2 ms.
int i, TMR0 = 0, x = 1;
We disable the TIMER0 interrupt by assigning 0 to the timer interrupt enable bit so that
the interrupt flag is first clear initially.
INTCONbits.TMR0IE = 0;
The next step is to load the option register with the appropriate bit values.
OPTION_REG = 0b00000111;
With a simple for loop, the program presets the TIMER0 register to 5 so that it overflows
on the
250th pulse (250 X 8 us = 2 ms).
for ( i = 0; i < x; i ++) { INTCONbits.TMR0IF = 0; TMR0 = 5
Inside the for loop, we first clear the interrupt flag, just to make sure it wasnt set from
other parts of the program. We set x to 1 so that this for loop only executes once. Indexing
it once is all we need to roll over the timer register by setting TIMER0 register started
from 5. The while statement monitors the interrupt flag. It will set if the timer register rolls
over at 255, and then the program will exit out of the for loop. The result of this function
is that we successfully create a 2 ms time delay.
while (!(INTCONbits.TMR0IF)); }
Summary
Microcontrollers market and definitions were first described in this chapter, followed by
MCU types, parameters, architecture, instruction cycle, and instruction set definitions.
MCUs equip with many peripherals that are highly configurable to allow embedded
system designers to tailor specific applications. Practical MCU applications using
comparators, timers, debuggers, IDEs, and programming techniques were covered.
Embedded system engineers need to master both hardware and software skills. A good
understanding of MCU parameters and the datasheet will lead to increased design
effectiveness and efficiency, reducing product design time to market.
Quiz
1) Name five popular MCU applications.
2) Name three differences between MCUs and computing CPUs.
3) What are the two types of memory found in MCUs? What are the differences between
them?
4) What are the most popular MCU product families in number of bits? What does this
number mean?
5) List five popular MCU peripheral modules.
6) If an MCU uses an external oscillator running at 32 MHz, what is the instruction cycle
frequency?
7) List three MCU special features and briefly describe their functions.
8) Write an assembly code that subtracts the value of 5, which is stored in the working
register, from the GPIO register. The result of the subtraction will be stored in the file
register (F).
9) If the instruction clock cycle in the timer design example (see page 269) is divided
down by a 1:8 prescaler instead of 32, what is the final clock frequency?
10) Write a C program to create a 1 ms time base using TIMER1 module.
History
The development of PLCs first started with General Motor (GM) in the late 1960s within
its Hydra-Matic division. The original objective of the PLC was to replace bulky, costly
relays, eliminating cables in the manufacturing systems. The benefits are that they reduce
cost and increase the range of functions, versatility, and flexibility while achieving higher
reliability. A relay acts like a switch applying electromagnetic theory to operate. Its main
function is to control mechanical movements (see figure 8.2). By closing the switch
(above the relay control AC source), an AC control signal is applied to the
electromechanical relay. It energizes the coil via the electromagnet magnetizing the
armature, causing it to deflate downward. As a result, the end points at the right-hand side
of the armature making contact achieving a normallyclosed (NC) condition. If there is no
relay signal applied to the magnet, the armature is deenergized. It then tilts upward
anchored by the spring. It now makes contact to the normallyopen contact (NO) point.
Relays are used in heavy load applications such as motors. The benefit of using relays is
that the control signal is electrically isolated by the magnet, providing isolation protection
between loads and users. This is essentially a safety measure as many industrial
applications involve high-power input and output devices.
PLC Benefits
PLC functions include timing, counting, calculating, and digital and analog signal
processing. These basic functions form the foundations of PLC structure. The major
advantage of PLCs is that the majority of the functions are contained within the PLC
hardware. This largely reduces the size of the overall systems and the likelihood of
making any wiring mistakes. The designers of the PLC programs have full capability to
create ladder logic programs through software displayed on a computer monitor. Any
program modifications are easily made by software. This is much better than physical
wiring changes, and lowers labor and material costs. Many modern PLCs are equipped
with communication capabilities allowing PLCs to communicate with each other through
wired or wireless connections. With wireless capabilities, users can remotely log into the
system for troubleshooting purposes. Each PLC must include at least one CPU
(microprocessor). This gives PLCs the ability to process data and information in a short
period of time compared to bulky relays. Many PLCs work in conjunction with sensors in
manufacturing environments. Often times, manufacturing facilities have fast-moving
conveyer belt systems (see figure 8.4). The input device is the sensor, whereas the turn
motor acts as the output device in response to the input sensor.
PLC Components
Figure 8.5 shows a conceptual PLC block diagram. It includes six basic
components/modules: Input and output modules, power supply, CPU, memory (program,
data), and a programming device. The input and output modules can be combined into one
module (I/O module).
Figure 8.7: Motor starter, solenoid valves, and output device symbols
The power supply provides the electrical power to all modules converting from AC to DC.
The DC voltage supplies power to all internal PLC circuits. The PLC power supply
typically does not support external input or output devices, only internal ones. The AC
ratings are different from one country to another. Common ratings are from 120 V to 240
V AC. The way the CPU works is very similar to a conventional computing CPU in terms
of performing logic operations and interfacing with data and program memory as well as
fetching and executing commands from the PLC programs. The major difference of PLC
CPUs and computing ones are that PLC CPUs performance is generally lower than that
of computing CPUs in terms of clock speed.
such as Ethernet or RS-232. End users can then run, control, and execute the programs
using the programming device. During program execution, while the PLC connects to the
programming device, it reports the program status back to the programming device and
displays it on the computer screen for troubleshooting and debugging purposes. When the
PLC programs execute, they operate in repetitive loops. First, the CPU reads the status of
all input devices. Then it executes the PLC program. Finally, the PLC programs update
and control the output devices. This process continues until the program is paused or
stopped by the programmer or end user. The programming device serves as a platform for
PLC designers to enter ladder logic programs in program mode. In the field, hand-held
devices are used in place of programming devices providing portability benefits. A ladder
logic program could include many elements such as normally-open (NO) and normallyclosed (NC) contacts, output symbols, and logical functions. An NC contact has a forward
slash symbol in it. Figure 8.8 shows an example of a ladder logic program, which is
entered by the designer. The program is stored in the program memory of the PLC. In this
example, each horizontal branch is called a rung which comprises contact and output
symbols. S1 to S4 are on rung 1. S5 to S7 are located on rung 2. A contact can be either
normally-open or normally-closed contacts (further explanations will follow shortly). It is
possible to add a parallel branch on a rung. S1 and S4 form a branch instruction. The
circles on the right end of each rung are the output symbols representing the output
devices. These output symbols ultimately control the output device via the PLCs output
terminals. The CPU processes a ladder logic program stored in the memory, one rung at a
time, starting from the top of the program and reading the inputs of contacts from left to
the right.
program mode. The designers need to first understand the proper operations of the NO and
NC contacts as well as the output symbols. As mentioned previously, NO and NC contacts
correspond to input devices. And the NO contact needs to be correctly addressed to an
input terminal which connects externally to an input device. Lets assume the input device
is a push button. When the button is pushed, the input status of the NO is logically high
causing the contact output status to be in a logic high state as well. When the contact is not
energized, (i.e., the push button is not pushed), then the contact input status is low leading
to logic low output status (see figure 8.9).
I: 0/2
This address means that it is an input device denoted by the initial I letter. Followed by
:, the number 0 corresponds to the module number. Recall that a PLC could contain
multiple input or output modules; this zero represents the very first module. The right digit
2 corresponds to the terminal number which represents the third terminal of module 0
(see figure 8.11).
fan would turn on. Additionally, there is a manual overdrive button allowing warehouse
workers to turn on the A/C system and the fan regardless of temperature or humidity
levels. For safety reasons, an emergency stop button is in place to disable all operations.
Before starting to program ladders logic, designers need to first identify what the input and
output devices are. In this design, there are four input devices: a manual overdrive button,
an emergency stop button, temperature sensors, and humidity sensors. For outputs, there
are two output devices: an A/C system and a fan. See table 8-1 for field devices names,
types, and address assignments.
input contact status moving from the left to the right on each rung. This program only
contains one rung even though the branch instruction is formed among input contacts and
output symbols. In order to enable both parallel connected outputs, continuity needs to be
established, meaning logic outputs on each contact need to be high starting from the left of
the rung and continuing all the way to the right. Figure 8.18 demonstrates one way to
establish continuity, denoted by the dotted line. The output status of I: 0/1, I: 1/0, and I:
1/1 all need to be high in order to turn on O: 0/1 and O: 0/2. Although these contacts are
connected in series, each contact is independent and does not affect the contact next to it,
(e.g., a high output at I: 0/1 does not cause the I: 1/0 input to go high). The status of each
contact solely depends on the field device associated with the contact addressed to it. In
this scenario, when the emergency button (I: 0/1) is not pushed, if both temperature (I:
1/0) and humidity (I: 1/1) sensors are tripped, A/C (O: 0/1) and fan (O: 0/2) turn on.
There are maximum limits on contact numbers on a rung. If an application requires more
than the maximum contact numbers to be on at the same time to enable an output, an
internal output symbol can be used (see figure 8.21). Suppose five is the maximum
number of contacts allowed on a rung. This design requires all eight NO contacts to be
energized to turn on O: 0/2. On rung 1, five NO contacts are used to control the internal
output (B3: 1/1). The internal output address is then used to address an NO contact on
rung 2 (far left) along with the remaining three contacts. These four contacts now control
the output symbol (O: 0/2). When the first five contacts are closed, (i.e., the outputs of 1 to
5 are all high), the output statuses of these five contacts energize B3: 1/1, which is
addressed to the first input contact on rung 2. This makes the input status of this contact
high. If the remaining three contacts inputs (6, 7, and 8) are high as well, O: 0/2 will turn
on.
Figure 8.23:
Input, Output symbol by itself syntax
To control multiple outputs at once, a parallel output symbol can be used. Its invalid,
however, to have multiple outputs in series on a single rung (see figure 8.24).
turns on. In this case, the bottom branch contact has the same address as the output (O:
0/3). Enabling the output causes the branch contact output status to go high (dotted line).
Table 8-2: PLC conveyor application input and output devices and addresses
Figure 8.29 is the ladder logic program of the conveyor belt system. The internal output,
B3: 0/1 on rung 1, is controlled by the start/stop buttons and the limit switch. If the start
button is pressed while the stop button and limit switch are de-energized, then the internal
output, B3: 0/1, is on. On rung 2, the same B3: 0/1 address is mapped to an NC contact
(dotted line), which is now logic high, making the second rung input contacts output low.
This logic low output keeps the red light off. On rung 3, both the green light and motor are
on as a result of B3: 0/1 being on. As the box reaches the limit switch position, input of I:
0/3 is high causing its output to be low (rung 1). This cuts off continuity on rung 1 turning
B3: 0/1 off. On rung 2, the red light turns on due to the low input and high output of the
NC contact (B3: 0/1). On rung 3, the green light and motor turn off. To start the conveyor
again, the user needs to press the start button. The box needs to be taken out of the switch
position. This PLC program design is just one way to perform the design tasks. Remember
that two completely different PLC programs could perform the same functions. A right or
wrong design is not really the question. Rather, a design that has the shortest scan time,
has higher efficiency, and is easier to troubleshoot and maintain will be the best design.
Timers
Lets now go over timers in ladder logic programs. Time is a critical parameter in PLC
systems. The timer is a step counter and the step size is determined by time base, which is
easily changed in PLC software. On- and off-timers are available to perform timing
functions. The timer ladder logic symbol of an On-timer controlled by an NO contact is
shown in figure 8.30.
Table 8-3:
Timer bit names
On-Timer
Using figure 8.30 as a reference, we can construct a timing diagram to further understand
how a timer works (see figure 8.31). When the NO contacts output is logic high, the EN
bit follows while the timer starts to time (the TT bit goes high while the timer is timing).
At the end of 100 ms, the timer has reached the time delay value set by the preset value.
As a result, the done bit (DN) goes high, and TT now goes low because the timer is no
longer timing. If the NO contact output remains high, the DN bit stays high. If not, the DN
bit goes low, as does the EN bit. Essentially, EN follows the output status of the NO
contact.
On-Timer Application
Lets use an application example to further examine the on-timer (see figure 8.32). This
design equips with start and stop buttons and a motor. 10 s after the start button is pressed,
the motor turns on. B3: 0/1 on rung 1 forms a seal-in circuit. The stop button (normallyclosed) is used as an emergency stop button. B3: 0/1 on rung 2 controls T4: 1. The DN bit
controls the motor.
Off-Timer
The second timer type is the off-timer. According to figure 8.34, the theory of off-timer
operation is that the DN bit is energized as soon as the off-timer input is high, (i.e., the EN
bit also goes high). When the timer input is false, the off-timer starts to time (TT goes
high). After a period of time set by the preset value, the timing bit (TT) and DN bit go
low. Figure 8.34 shows the off-timer symbol. In other words, the off-timer takes time to
turn the output off.
Off-Timer Application
Lets now use a design example to better understand the off-timer. In this application,
when the switch is pressed, unlike a push button, the switch stays pushed (closed); both
lights turn on immediately. After the switch is pressed again, it opens (off). At that
moment, the off-timer starts to time. The first timer T4: 1 turns Light-1 off 10 s (1,000 X
10 ms = 10 s) after the switch is pressed the second time. Light-2 turns off after 20 s
(2,000 X 10 ms = 20 s). Figure 8.36 shows the PLC ladder logic diagram of this off-timer
application. Figure 8.37 shows the timing diagram of this application.
Counter
In addition to the timer, the counters instructions are available in PLCs. The counter in a
PLC can count items up or down. Its essential to use counters in many applications such
as counting the total number of parts produced in a factory using proximity sensors, or to
keep track of cars coming in and out of a parking lot. Proximity sensors are input devices
that produce a discrete signal when an object passes by the sensor. It can be used in
conjunction with counters. There are two types of PLC countersup and down-counters.
The ladder logic counter symbols are shown in figure 8.38.
Counter Application
Lets use a counter and timer to design a bottle-counting application, shown in figure 8.41.
This design involves using a conveyor belt system and a proximity sensor counting the
number of bottles passing through the sensor for a fixed period of time (one hour). Its an
important part of the manufacturing process to evaluate factory throughput.
the SBR. Figure 8.44 shows the concept of using the JSR, SRB, and RET instructions.
Suppose your PLC program requires task 1 to be performed multiple times. Multiple tasks
will need to be included in the program, taking up program memory space and reduce
scanning time. This is not an efficient way to design PLC programs. If the applications
require fast timing response, the extra scan time may ultimately fail system specifications.
Nested Subroutines
The jump to subroutine reduces program sizes and scan time, and it eases troubleshooting
efforts. Its possible to implement a subroutine within a subroutine. Figure 8.46
demonstrates an example called a nested subroutine.
Temporary End
Temporary end (TND) is yet another useful ladder logic debug feature. Temporary ends
serve as breakpoints throughout the program allowing designers to run the program to
pause and continue one section at a time. A TND can be controlled with or without input
contacts. Figure 8.47 shows a TND concept.
MOV Instruction
To manipulate and move data around, we use a MOV instruction, shown in figure 8.51.
Data 01010100 is first loaded into N0: 0 by the ladder logic software. When the switch is
closed, the MOV instruction copies data from N0: 0 to N0: 1 replacing 11110001 in N0: 1
with 01010100. Note that MOV instruction is a copy instruction. The original data in N0:
0 remains as 01010100.
runs, as soon as the weight is greater than 100 lbs (10 V at I: 2/1, 100 lbs / (10 lbs / V) =
10 V), the red light turns on.
LES, LEQ, and GEQ work similarly according to their function definitions. As with data
manipulation instructions, PLC applications can combine data compare instructions with
any other instructions. Figure 8.56 shows an example.
Math Instructions
Arithmetic functions can be performed using math instructions. PLC math instructions are
output instructions that include addition (ADD), subtraction (SUB), multiplication (MUL),
and division (DIV) instructions. Figure 8.57 shows a math instruction example.
Figure
8.60: Negate instruction example
After the switch is pressed, the contents of N2: 3 are inverted from 1 to 0 and the result
gets stored in N2: 4. For example, if N2: 3 data is 00000000, it will be inverted to
11111111. The result is stored in N2: 4. Figure 8.61 is an application combining math and
data compare and manipulation instructions. This is a car wash application. In this design,
there are two car wash types for customers to choose from: standard and supreme.
Standard service takes five minutes. Supreme service takes ten minutes. This application
automates the car wash process controlling the on-time for the water, foam-dispensing
pumps, and the wind-drying motor, depending on whether the standard or supreme button
is pressed by the operator. This PLC program keeps track of the total number of cars
washed. In addition, if the total number of washed cars reaches 490 (500 10), the
maintenance light turns on. The field device names, types, and addresses are shown in
table 8-4 below. In this example, all the water, foam-pumps, and blowers are presumably
on at the same time for simplicity reasons. In reality, there will be separate timers to
control the on-time for each of the three output devices individually.
Sequencer Instructions
Plenty of industrial and commercial applications execute instructions continuously in a
loop. Industrial washing machines, large-scale warehouse conveyor systems, merchandiseprocessing systems, and traffic light systems are few examples. Sequencer instructions
reduce the number of rungs needed and simplify sequential operations in PLC
Figure
8.62: SQO instruction
To use an SQO instruction, PLC programmers need to assign values to the items within
the SQO instruction. These items are file number, destination address, length, and position
fields. File number corresponds to the starting address of the sequencer file. This file
contains words that PLCs execute upon. For example, figure 8.63 shows an SQO file
(#B3: 1) comprising five words. The # sign designates its a file instead of a word. The
first word (word 0) will be transferred to the destination address (e.g., an output device) if
the SQO input is logic high (push button PB is pushed). The second word (word 1) is
transferred to the output device if PB is pushed again. The 6th time PB is pushed, SQO
loops back to word 0 and the sequence repeats again. The number of words and contents
of each word are user defined. How often the data transfer occurs depends on the ladder
logic program. The length item defines the total number of words (steps) that will be
transferred. If the length is two in a 5-word file, only the first two words will be
transferred even though there are five words in the sequencer file. Position determines the
starting word location, which typically starts at position one.
Lets apply an SQO instruction to a simplified traffic light application (see figure 8.64).
This application turns on and off red, yellow, and green lights in a sequence using an SQO
instruction controlled by push buttons 1, 2, and 3 (PB1, PB2, and PB3).
Trends
Summary
In this chapter, we covered PLC history, components, input, and output devices. Ladder
logic syntax and programming techniques were introduced. Several PLC instruction types
were discussed including timers, counters, math, data manipulation, comparisons, and
sequencer instructions. PLC memory structure, practical PLC program examples, and
Quiz
1) List three benefits of PLCs over traditional relay systems and five PLC components.
2) List three differences between computers and PLCs.
3) List five input and output device examples.
4) Design a PLC ladder logic program for a semiconductor fab conveyor system (see
figure 8.66). A silicon wafer box (lot) waits for 30 minutes at process point 1. The level
sensor detects whether the wafer lot has been filled up to 12 wafers. Once its filled, the lot
will be transported to the process checkpoint 2 where it stops and waits for 15 minutes for
further processing. At the end of end 15 minutes, the green light turns on.
Decimal Numbers
Decimal numbers are any numbers written with a decimal point ., such as 2.3, 5.78, or
0.005. The decimal point separates the ones place (left) from the tenths place (right) in
decimal numbers (see figure 9.1). If a DMMs resolution is 0.0001 V, it can display down
to one tenthousandth of a volt on the DMMs display.
Whole Numbers
Whole numbers are non-negative integers that are made up of digits to the left of the
decimal point. For example, the whole number of 1,288.00 is 1,288. To identify tens (10s),
hundreds (100s), and thousands (1,000s) easily, a comma is used at every third place,
starting at the decimal point and moving towards the left. For example, a resistor size of
17,452,223 is more easily recognized than 17452223 .
Figure
9.6: LED flashlight current limiting resistor size
Figure 9.7:
Fraction to non-fraction, submultiples
To convert the resistance from fraction to nonfraction, the steps are shown in figure 9.7. In
this fraction, we first convert milli to 10-3. The denominator contains a submultiple
number 10 mA (10 X 1 X 10-3 A). Since all numbers in the denominator are separated by
multiplication signs, it can be broken down into two fractions: 1 / 10 and 1 / (1 X 10-3). 1 /
10 = 0.1. For 1 / (1 X 10-3), convert negative 3 power to positive 3 power then remove the
fraction. The final result is 0.1 X 1 X 103, which is equal to 0.1 k. Using the large
multiple conversion rule, previously discussed, move the decimal point 3 times to the right
turns 0.1 k to 100 .
To convert a fraction with multiples in the denominator to a non-fraction, the conversion
process is reversed. For example, figure 9.8 calculates period from a 2 GHz clock.
Separate 1 / 2 from G (1 X 109). 1 / 2 = 0.5. The power (exponent) of positive 9 in the
denominator now becomes negative 9. We then remove the fraction. The result is 0.5 X
10-9 = 0.5 ns. If you want to write 0.5 ns to lower submultiples (e.g., pico), use the rule
described earlier. Move the decimal point 3 places to the right.
0.5 ns = 500 ps
Table 9-3:
Fraction to non-fraction conversions
Figure 9.9:
Multiplying multiples
Percentage to Decimals
In electronics, we often use percentages to calculate power efficiency, duty cycle, device
tolerance, accuracy, error, resolution, gain change, voltage variation, current change, and
power difference. Converting percentages to decimals quickly helps you analyze problems
effectively. A number with a percentage sign means the original number gets multiplied by
100. To convert a percentage to a decimal number, first identify the decimal point. Then
divide the number by 100 (move decimal point two places to the left). For example (see
figure 9.10), the duty cycle of an AC signal is 75%. To convert it to a decimal number,
first identify the decimal point location (to the right of 5). Then, move it 2 places to the
left and remove percentage sign. To convert the number back to a percentage, reverse the
process by moving the decimal point two places to the right and add percentage sign. The
example in figure 9.11 converts the number 2 to a percentage. After moving 2 decimal
places to the right, fill the empty spaces (dotted) with zeros, and add a percentage sign to
complete the conversion.
Figure 9.12:
Log with a base of 10
Extending from this concept, a log table is shown in table 9-4. Log 0 is invalid because 10
to the power of any value will be larger than zero. From this table, you can easily estimate
the range of log numbers. For example, if you try to estimate value of log 20, you can
easily tell its between 1 and 2.
With power efficiency calculations, output power is always less than input power (Pout <
Pin) due to electrical signal losses. Using an LED as an example, its power efficiency (less
than 15%) is much higher than that of an incandescent lamp (less than 2%). A typical LED
burns roughly 6 W to 8 W of power. Incandescent lamps power ratings differ greatly
depending on the type. The most common ones consume 60 W of power. We can use dB
to express the input and output power as a ratio instead of as absolute value. For example,
the output power measured is 10 times less than the input, i.e., Pout / Pin = 1 / 10 = 0.1.
Power in dB is calculated as:
dB = 10 log (0.1) = 10 dB
From this example, you can see that when the log number is less than 1, it equates to a
negative number. A similar log table like table 9-4 is developed for the log numbers that
are less than 1 (see table 9-5).
Summary
In this chapter, we first covered multiples, submultiples, decimal numbers, and
percentages. We then used practical examples using common electronic engineering tasks
to convert between higher and lower multiples to and from submultiples. We then applied
these multiples and submultiples conversion techniques to multiplication and division that
are frequently used in electronic engineering calculations. This chapter closed with using
logarithmic numbers to calculate voltage, current, and power ratios. Following these
simple rules allows you to come up with electronic engineering math solutions quickly
and accurately as well as demonstrate professional competencies.
Quiz
1) What is the submultiple name of 1 X 1012?
2) A DMM can display digits down to one thousandth of a volt. What is the smallest
change in decimal value this DMM can display?
3) Convert 2.5 uA to nA.
4) Convert 120 ns to frequency.
5) Using mental math, calculate XL = 2 X 2 MHz X 2 uH.
6) A common emitter amplifier delivers to a resistive load draws 2 mA at 12 V to ground
rails. The power measured at the load (Pout) is 10 mW. What is the power efficiency in
dB?
7) Convert 0.707 to a percentage.
8) An emitter followers voltage changes by 0.5 V while input changes by 1 V. What is the
voltage loss in dB?
9) 1 angstrom is equal to 10-10 meters, which is often used to describe the thickness of
CMOS transistor gate oxide. If the FETs gate oxide is 50 angstrom, what is the value in
nanometers (nm)?
10) If an amplifiers open-loop gain is 80 dB, what is the gain ratio of V / mV?
Index
20 dB per Decade, 65
3 dB, 68, 83
Q = C (V), 71
1
1 / SC, 57
1 / C, 57
120 V, 94
1N4001, 48
2
2 , 70
3
3-dimentional cross section model, 131
5
555-timer, 226
Hans Camenzind, 226
one-shot timer, 228
precision timing, 226
Pulse Width Modulation (PWM), 226
6
60 Hz, 53
7
7-segment display, 256
A
AA, 7
AAA, 7
AC analysis, 63 atoms
AC choke, 74
AC parameters, 49
AC short, 56
Acm (common mode gain), 150
active loads, 151
active low-pass filter, 174
ADC
gain error, 222
offset error, 222
Adm (differential mode gain), 150
aerospace, 106
Agilent, 27
alkaline household battery, 7
Alpha, 112
alternating current, 49
aluminum, 1
AM demodulation circuit, 240
AM detector, 240
AM transmitter, 240
amplifier, 106, 140
Amplitude modulation (AM), 238
Analog Devices, 3, 24 , 219
analog electronics, 105
analog IC vendors
Analog Devices, 106
Infineon Technologies, 106
Qualcomm, 106
STMicroelectronics, 106
Texas Instruments, 106
analog market, 106
analog signals, 105
Analog-to-Digital Converter, 25, 106
ADC, 219
AND gate, 205
angstrom, 131
angular velocity, 70
anode, 41
arc, 70
assembler, 262
Asynchronous Receiver Transceiver (USART), 247
atoms, 37
electrons, 37
neutrons, 37
audio amplifier, 157
B
band-pass filter, 233
band-stop filter, 233
bandwidth, 103
base, 108
Baud, 236
Bayonet-NeillConcelman (BNC), 178 Bessel chart, 239
Beta, 112
bill-of-materials, 68
Bipolar versus CMOS, 147
bit rate, 236
bit-oriented operations, 255
bode plot,, 63
body diode, 133
Boltzmanns constant, 113
BOMs, 68
Boolean algebra, 207
boron, 37
bounce, 86
break-before-make, 199
breakpoint, 264
Brown-Out-Reset (BOR), 261 buck regulator, 97 , 156
buffer, 119 , 171
built-in diode voltage, 40
byte-oriented instructions, 255
C
C = F , 237
Capacitive load (CLoad), 182 capacitor, 136
capacitor
capacitance, 55
capacitive reactance, 55 dielectric, 55
electric field, 55
comparators, 106
compiler, 262
computer-aided design (CAD), 135 copper, 1
core, 93
coulomb, 8
CPU, 110
Cu, 1
current, 1, 8 , 329
current divider rule, 15
current lead, 89
current mirror, 152, 165
current source, 8
electrolytic, 55
passive electronic device, 55
polyester, 55
tantalum, 55
Xc, 55
carbon resistors, 2
carrier concentration, 38
cascode, 167
cathode, 41 , 108
cell phone battery chargers, 93
cellular bands
Code Division Multiple Access (CDMA), 241 Global System for Mobile (GSM), 241 Long Term Evolution (LTE), 241
ceramic resonators, 257
charge pump, 103
charging, 60
circuit simulation software
Multisim, 176
class A amplifier, 129
class AB, 129
class B amplifier, 129
closed-loop, 153
closed-loop voltage gain, 161
CMOS, 130
CMOS cacosde, 170
collector, 108
collector current equation, 152
color bands, 3
combinational logic, 206
common base amplifier, 120 , 128
common collector amplifier, 118
common emitter amplifier, 115, 123 common gate amplifier, 139 , 145
common mode rejection ratio (CMRR), 150 common mode voltage, 149
common source amplifier, 139
communications, 231
full duplex, 231
half duplex, 231
Radio Frequency (RF), 231
simplex, 231
commutating diode, 88
D
Darlington pair, 168
data compare instructions, 308 data manipulation instructions, 304 data memory, 251
dB, 64
DC, 5
DC block, 56
E
Early effect, 115
electric power generation, 93 electrical
current, 51
electrical engineering, 3, 4 electrical isolation, 93
electrical outlet, 51
electromagnetic theory, 93 electron charge, 42
F
f 3dB., 68
fab, 130
fabrication, 130
FCY, 257
Federal Communications Commission
Frequency spectrum, 231
feedback, 99
file registers, 251
finFET, 131
flip-flop, 210
edge-triggered flipflop, 210
Fluke, 27
FM, 85
FM noise clipper, 85
Forward-biased, 40
FOSC, 257
Fraction-to-nonfraction conversions, 324 Freescale, 24
frequency, 50
frequency divider, 211
frequency domain, 63 , 64
frequency domains, 232
Frequency Modulation, 85
Frequency Modulation (FM), 241 Fritzing, 55
full-wave rectifier, 102
function generator, 27 , 179
G
General Motor, 273
General Purpose Registers (GPRs), 253 germanium, 8 , 37 , 110
Gm, 121
ground, 8
Gummel-Poon model, 125
H
half-wave rectifier, 95
Harvard architecture, 251
height, 105
high- and low-level languages, 263 high-pass filter, 80 , 101
hole, 37
humidity, 105
hybrid model, 122
hysteresis, 179
hysteresis zone, 179
I
I (t) = C (V), 57
IBM, 3, 110
IC design and simulation software
Cadence Design Systems, 178
Mentor Graphics, 178
Synopsis, 178
IC foundries
Global Foundries, 130
Samsung Semiconductor, 130
Taiwan Semiconductor Manufacturing Company
(TSMC), 130
United Microelectronics Corporations (UMC), 130 IC layout, 134
IC package manufacturers
Advanced Semiconductor Engineering, 25 Amkor, 25
Siliconware Precision Industries, 25
IC package types
dual inline package, 25
flip-chip, 25
wire-bond, 25
IC Package types
ball-grid-array, 25
IC Packages, 24
IC versus VCE Curve, 114
ICE, 71 , 90
ideal diode, 42
Ideal voltage source, 22
IE = IC + IB, 113
impedance, 54
induce, 93
inductive load, 87
inductor
copper, 73
ferrite, 73
Henry, 73
inductance, 73
inductive reactance (XL), 73
iron, 73
magnetic field, 73
pass device, 73
XL = 2 f L, 73
inductor schematic symbol, 73
Institute of Electrical and Electronics Engineers (IEEE), 231
instruction clock, 257
instrumentation amplifier (INA), 184
Integrated Development Environment (IDE), 262
Intel, 134
intensity, 105
Inter-Integrated Circuit (I2C), 247
internal oscillator, 258
internal regulators, 261
International Rectifier, 24
interrupt, 260
Interrupt Service Routine (ISR), 260
Intersil, 24
intrinsic resistance, 125
inverter, 196
NOT gate, 196
J
James Early, 115
JK flip-flop, 211
Jump to Label instructions, 300 Jump to Subroutine Instructions, 301
K
KCL, 11
Kelvin (K), 113
Kirchhoffs Current Law, 11 Kirchhoffs Voltage Law, 9 KVL, 9
negative feedback, 186
L
ladder logic, 273
laptop, 93
latch, 208
memory, 208
memory seats, 208
sequential logic, 208
Layout versus Schematic (LVS), 135 LDO, 97
leakage current, 42
leakage currents, 138
leakage resistor, 83
Least Significant Bit
LSB, 204
LED, 44
level shifter, 217
light, 105
light emitting diode, 44
linear regulator
low dropout regulator, 186 zener regulator, 97, 185
Linear Technology, 24
literal control, 257
load line, 114
log to number, 326
logarithm, 63
lots, 135
low drop-out regulator
error voltage, 186
low-pass filter, 68
M
mAh, 7
mathematics, 3, 4, 49 , 61
Maxim Integrated Circuits, 24
MCU instructions, 255
MCU parameters, 248
MCU peripherals
ADCs, 247
comparators, 247
DACs, 247
timers, 247
MCU vendors
Atmel, 247
Freescale Semiconductor, 247
Fujitsu, 247
Infineon Technologies, 247
Microchip Technology, 247
NXP, 247
Renesas Electronics, 247
Samsung, 247
STMicroelectronics, 247
Texas Instruments, 247
medical equipment, 106
mental math, 319
Mentor Graphics, 135
Metal Oxide Semiconductor Field Effect Transistor, 107
Microchip Technology, 3, 24 , 25 , 217 , 219 , 248 , 249 , 250
microcontroller Units
embedded systems, 247
Microcontroller Units (MCUs), 247
microelectronics, 3
microscope, 134
milliamphour, 7
Millions of instructions per second (MIPS), 258 mixed-signal
ADCs, 216
DACs, 216
modulation, 236
modulation index, 239
monostable, 228
MOSFET cross section, 136
MOSFET parasitic
drain-to-source (CDS), 142
drain-to-substrate (CDSub), 142
gate-to-drain capacitor (CGD), 142
gate-to-source capacitor (CGS), 142
source-to-substrate (CSSub), 142
MOSFETs, 130
Most Significant Bit (MSB), 204
motor control applications, 106
MOV instruction, 306
MOV instruction application, 307
MPLABX, 262
multimeter, 27
multiples, 319
multiples and submultiples conversions summary, 322
multiples number conversion, 320
multiplexer, 215
multiplication and division with multiples and submultiples, 325
multistage amplifiers, 155
NOR gate, 204
normally-closed (NC), 278 normally-open (NO), 278 NPN, 108
NPN schematic symbol, 109 Nyquist frequency, 221 gigahertz, 178
output code, 230
output impedance, 124 output symbol, 280 oxide, 131
N
NAND gate, 205
National
Semiconductor, 3, 176
National Instruments, 176
natural log, 113
negative temperature coefficient, 46 nested subroutines, 303
neutrons, 8
NFET, 130
NFET and PFET Inverter, 197
N-junctions, 131
NMOS, 130
NMOS Inverter, 197
non-ideal capacitor, 83
non-ideal diode, 42
non-ideal voltage source, 22
non-inverting amplifier, 160
O
off-time, 52
Ohms Law, 6
omega, 57
On Semiconductor, 24
One-Over Reciprocal, 323
on-time, 52
op-amp, 99
op-amp
LM741, 164
op-amp parameters
supply and input voltage, 162
supply current, 162
Common Mode Rejection Ratio (CMRR), 162
input impedance, 162
input offset current, 162
input offset voltage, 162
open-loop gain, bandwidth, 162
output source and sink current, 162
output voltage swing, 162
power consumption, 162
Power Supply Rejection Ratio (PSRR), 162 op-amp rules
input impedance, 155
input offset voltage, 155
output impedance, 155
open-collector, 193
open-drain, 193
operand, 255
operation code (opcode), 255
OR logic gate, 202
Oscillator Startup Timer (OST), 261
oscilloscope, 27 , 177
oscilloscopes
attenuation ratio, 178
gigabits per second, 178
PLC off-timer, 295
PLC off-timer application, 296
PLC on-timer, 293
PLC on-timer application, 294
PLC periodic clock signal generator, 318
PLC program control instructions, 300
PLC programming
ladder logic, 278
P
parallel capacitor rule, 63
parallel circuit, 11
parallel data transmission, 214
parallel inductor rule, 78
parallel LC, 92
parallel resistor rule, 12
parasitic, 83 , 84
passive electronic device, 1
Q
Q factor, 77 ringing, 86
ripple voltage, 95
RLoad, 129
room temperature, 123 rotation degree, 70
R
R C circuit, 104
r , 123
radian, 70
radio, 85
radio frequency, 106
Random Access Memory (RAM), 247 RC low-pass filter, 69
RC time constant, 62 , 96
reactance, 54
Read Only Memory (ROM), 247 reference current, 152
relay, 274
renewable energy, 106
resistance, 1
resistivity, 1
resistor, 1
resonant frequency, 90 , 91
reverse-biased, 40
RFID (radio frequency ID), 261 ring oscillator, 200
S
saturation, 115
saturation current, 113
sawtooth wave, 49
schematics, 8
Schottky diode, 192
scope probe, 178
seal-in circuit, 288
semiconductor, 4, 5, 38 , 106 , 218 , 317 , 318 semiconductor fab conveyor system, 318 semiconductor package, 24
Serial Peripheral Interface (SPI), 247
series capacitor rule, 63
series circuit, 9
series inductor rule, 79
series resistor rule, 13
settling time, 157
sheet rho, 4
shift register, 213
shoot-through current, 199
SiGe, 110
silicon, 37
silicon dioxide (SiO2), 131
silicon germanium, 110
sine wave, 49
single-ended amplifier, 115 , 129
sinusoidal, 49
sleep mode, 261
slew rate, 157
small-signal analysis, 124
small-signal model, 121 , 128 , 140
smartphone car chargers, 93
SOC, 106
solid-state, 38
sound, 105
source follower, 139 , 143
Special-Function Registers (SFRs), 253
spectrum analyzer, 234
speed, 105
square wave, 49
step response, 86
submultiples, 319
submultiples number conversion, 321 summing amplifier, 172
superposition, 35
Superposition theorems, 19
surface-mount
resistors, 4 , 46
switching regulators, 97
Synopsis, 135
system-on-a-chip, 106
PFET, 107
PNP, 107
T
tank circuit, 91 , 103
tapeout, 135
TCY, 257
Tektronix, 27
telecommunication applications, 106 temperature, 112
temperature coefficient, 4, 23 temporary end, 304
Texas Instruments, 24
common collector amplifier, 127 thermal voltage, 113
thermocouple, 191
threshold voltage, 132
time, 50
timer, 259
touch screen, 106
transconductance (Gm), 121
transfer function, 64
transformer, 93
transistor Beta, 116
transistor types, 107
BiCMOS, 107
CMOS, 107
transistors, 107
MOSFET, 107
NFET, 107
NPN, 107
trigonometry, 49 truth table, 196 Vpeak-to-peak, 52 Vrms, 54
VT, 113
U
unity gain amplifier, 171
Universal Serial Bus (USB), 247 USB, 236
V
V (t) = L (I), 75
variable-gain op-amp, 214
VBE, 113
VBE equation, 113
vector diagram, 80 , 104
Verilog, 135
Very High Level Descriptive Language (VHDL), 135 VFB, 99
virtual ground, 158
voltage, 5
voltage divider, 16, 64 , 99
voltage follower
buffer, 171
voltage gain, 126
voltage gain (hfe), 117
voltage leads, 77
voltage source, 7
voltage-doubler circuit, 103
Vpeak, 52
W
wafer, 130
watchdog timer (WDT), 261 waveform, 5
weight, 105
whole numbers, 320
Wilson current mirror, 166 wireless network, 106
wireless smoke detector, 248
X
XOR gate, 206
Z
zener diode, 47 zener regulator, 96 ZigBee, 261
per square, 4
, 57