Flyback Mathcad Example
Flyback Mathcad Example
D3
V input
*Needed if Vin > 40V
Q2
C i1
C i2
N sp3
R1
Co 3a
D z1
N sp2
Cs
Isen
Co 2a
N sp1 Co
1a
Vin
Co 1b
Rc
comp
Cc
C f1
fb
fa/sync/sd
LM 3488
R fa
dr
R f1
agnd
pgnd
R sense
R f2
Notes:
Write down the power supply requirements on :
Xxx :=
Get the results on:
Rsults xx :=
This Mathcad file helps the calculation of the external components of a typical
discontinuous mode switching power supply.
Input voltage:
-Minimum input voltage:
Vi min := 30 volt
Vi max := 50 volt
Output:
o2
o1
Co 2b
L1
D1
C1
o3
Co 3b
L2
D2
Nominal output voltage, maximum output ripple, minimum output current, maximum output
current
Io1min := 0.250 amp
Io1max := 5 amp
Vo1 := 5 volt
Vrp1 := 10mV
Vo2 := 12volt
Vrp2 := 20mV
Io2max := 1 amp
Vo3 := 12volt
(negative)
Vrp3 := 20mV
Io3max := 1 amp
Pomin = 7.7watt
Pomax :
Pom ax = 53.2watt
=
+
( Vo1
Vdfw Io1max +
( Vo2 +
Switching Frequency:
fsw := 150kHz
1
T: =
T=
6.667
sec
fsw
Transformer's Efficiency:
:= 0.95
Vfm
Vo1 + Vdfw
Nps1 =
4.286
-Maximum
F
= Switching voltage on the switching-mosfet:
spike : 0.4
Vdsmax :
( F= spike + 1) ( Vimax +
Vfm
Safe factor
(Klk =0.95 means that the leakage inductance is 5% of the primary inductance)
-The total energy stored in the transformer: Wfly
(Energy delivered
to the outputs plus the Energy lost due to the leakage inductance)
1
Wlptot = 1.053
Wl ptot : =
Klk
Wl ptot Pomax
Wfly : =
Wfly = 3.73333 10 4 joule
fsw
Ddt := 0.1
-Maximum drop voltage across the switching mosfet during the on time:
On resistance of the Mosfet:
Rdson := 0.06 ohm
Pomax
Vds on = 0.112volt
Vds on : =
Rdson
Vi min
Vfb :
Nps1
=
Vo1 + Vdfw
Tonmax : =
Tonmin : =
( Vimin
Vfb 1 Ddt T
Vfb 1 Ddt T
( Vimax
-Maximum
duty cycle
Tonmax
Dmax : =
T
Dmax = 0.412
-Minimum
cycle
Tonduty
min
Dmin : =
T
Dmin = 0.303
3) Primary current:
- Primary
peak
current:
2 Wfly
fsw
Ippk : =
Vimin Dmax
Ippk = 9.056amp
- Primary RMS current:
Ippk
Tonmax
Iprms :=
Iprms = 3.357amp
T
3
- Primary
current:
PoDC
max
Ipdc : =
Vimin
Ipdc = 1.867amp
- Primary AC current:
Ipac : =
Iprms Ipdc
Ipac = 2.79amp
4) Primary inductance:
Po T
2
Vomin Tonmax
Lp Ip
The energy stored is:E :=
=
and Ip :=
2
Lp
Edt : Vi
= min Tonmax
5
Edt = 8.245 10 voltsec
Primary inductance:
Lp : =
2 Wfly
2
Ippk
Lp = 9.105H
1
Nsp1
Vo1 + Vdfw
Vfb
Nsp1 = 0.233
Vo2 + Vdfw
Vfb
Nsp2 = 0.525
Vo3 + Vdfw
Vfb
Nsp3 = 0.525
1
= 4.286
Nsp2
= 1.905
1
Nsp2
= 1.905
-Master output:
- Secondary
current:
Io1peak
max 2
Is1pk : =
1 Dmax Ddt
Is1pk = 20.503amp
- Secondary
Is1pkRMS current:
Is1rms : =
1 Dmax Ddt
3
Is1rms = 8.267amp
- Secondary AC current:
Is1ac : =
Is1rms Io1max
- Secondary2 inductance :
Ls1 : = Nsp1 Lp
Is1ac = 6.584amp
Ls1 = 0.496H
Is2pk = 4.101amp
- Secondary
Is2pkRMS current:
Is2rms : =
1 Dmax Ddt
3
Is2rms = 1.653amp
- Secondary AC current:
Is2ac : =
Is2rms Io2max
Is2ac = 1.317amp
- Secondary2 inductance :
Ls2 : = Nsp2 Lp
Ls2 = 2.51H
Is3pk = 4.101amp
- Secondary
Is3pkRMS current:
Is3rms : =
1 Dmax Ddt
3
Is3rms = 1.653amp
- Secondary AC current:
Is3ac : =
Is3rms Io3max
- Secondary2 inductance:
Ls3 : = Nsp3 Lp
Is3ac = 1.317amp
Ls3 = 2.51H
Vi
= max Nsp2 + Vo2
Vdiode3max :
Vi
= max Nsp3 + Vo3
Vdiode2max = 38.25volt
Vdiode3max = 38.25volt
Ls2 = 2.51H
To meet the output ripple specifications without using an external LC filter, the output capacitors
have to meet two criteria:
- satisfy the standard capacitance definition: I=C*dV/dt where t is the Ton time, V is 25% of the
allowable output ripple.
- The Equivalent Series Resistance (ESR) of the capacitor has to provide less than 75% of the
maximum output ripple. (Vripple=Ipeak*ESR)
-Maximum
output
ripple:
Vrp1
=
10mV
Vrp2
=
20mV
Vrp3 =
20mV
-Minimum output
capacitance:
Tonmax
Co1 : = Is1pk
Vrp1 0.25
-Maximum
ESR
value:
Vrp1
0.75
ESR1 : =
Is1pk
-Minimum output
capacitance:
Ton
max
Co2 : = Io2max
Vrp2 0.25
Co2 = 549.685F
-Maximum
ESR
value:
0.75
Vrp2
ESR2 : =
Io2max
ESR2 = 0.015ohm
-Minimum output
capacitance:
Ton
max
Co3 : = Io3max
Vrp3 0.25
Co3 = 549.685F
-Maximum
ESR
value:
0.75
Vrp3
ESR3 : =
Io3max
ESR2 = 0.015ohm
LC filter attenuation:
Tonmax
Co1a : = Is1pk
Vrp1 0.25 Att
ESR1a : =
Db :
=10
:=12
Frequency
at needed att. : (switching frequency)
fx
:
=fsw
Required cutoff frequency:
fx
fc : =
fc = 84.185kHz
Db
:= .7
c = 5.289 105
2= fc
rad
sec
-Inductance
2 Ro1calculated:
L1 : =
c
L1 = 2.647H
-Capacitance
1 calculated:
Co1b : =
2
L1 c
Co1b = 1.35F
-Inductance used:
L1used := 10H
-Capacitance used:
Co1bused := 50F
i:
=
1 .5000
cu : =
1
2
L1used Co1bused
( i 500)
f i : = 100
250
wi : = f i 2
n : =
rad
sec
1
L1used Co1bused
si :
j= wi
nc : =
1
L1 Co1b
1 : =
L1used
2 Ro1
1c : =
1=
0.224
L1used Co1bused
L1
2 Ro1
As1 i : =
1c =
0.7
L1 Co1b
wi
1 + i 2 1
cu n
wi
As1c i : =
1
2
wi
1 + i 2 1c
c nc
wi
)
20
10
Magnitude, dB
10
20
30
40
10
-Capacitor Selection:
The performance of a filter critically depends on the capacitor used. Besides the basic voltage
and capacity requirements, select capacitors with low ESL, for high frequency attenuation, and
low ESR, for mid band attenuation and/or high ripple current capability.
-Choke Design:
Filter chokes should be designed to reduce parasitic capacity as much as possible:
-the input and output should be as far as possible.
-singular layer or Banked windings.
-use thicker than usual inter-layer insulation.
69
358
1247
(Banked windings)
8) Input capacitor:
The input capacitor has to meet the maximum ripple current rating Ip(rms) and the maximum
input voltage ripple ESR value.
9) Snubber Circuit:
The basic intent of a snubber is to absorb energy from the leakage inductance in the circuit.
The leakage inductance is part of the primary inductance that is not mutually coupled with the
secondary inductance. It is important to keep the leakage inductance as low as possible because
it reduces the efficiency of the transformer and it causes spikes on the drain of the switching
device.
A capacitor placed in parallel with other circuit elements will control the voltage across those
elements.
Usually :the0.03
2-5% of
the inductance
of the primary winding:
L
= leakage
Lp inductance isLleakage
= 0.273
H
leakage
Total energy:
1 1/2LI^2
2
Esnubber : = Lleakage Ippk
2
Esnubber fsw = 1.68watt
There are different ways to dissipate this energy and reduce the spikes on the drain of the
switching mosfet.
A typical snubber circuit is a resistance and a capacitor connected in series between the input
voltage and the drain of the mosfet.
(approximately half of this energy has to be dissipated on the snubber circuit)
A good starting pointEsnubber
for the snubber capacitance could be:
Csnubber : =
Csnubber = 2.557 10 3 F
2 Fspike ( Vimax + Vfm)2
The RC timeTon
has
to be larger than the on time switching period: 1/RC<Ton
min
Rsnubber = 197.233
Rsnubber : =
4Csnubber
2
Prsnubber = 0.959watt
For low output power applications, a clamp zener or a transient suppressor can be used as
shown on the flyback application of the LM3488 datasheet.
volt7.2V, and Vdr is equal to 7.2V when the input voltage is greater than 7.2V
Rdron :
7= ohm
other three important parameters of a Mosfet are Rds(on), gate threshold voltage, and gate
capacitance.
The switching Mosfet has three types of losses, conduction loss, switching loss, and gate charge
loss:
-Conduction losses are equal to: I^2*R losses, therefore the total resistance between the source
and drain during the on state, Rds(on) has to be as low as possible.
-Switching losses are equal to: Switching-time*Vds*I*frequecy. The switching time, rise time and
fall time is a function of the gate to drain Miller-charge of the Mosfet, Qgd, the internal resistance
of the driver and the Threshold Voltage, Vgs(th), the minimum gate voltage which enables the
current through drain source of the Mosfet.
-Gate charge losses are caused by charging up the gate capacitance and then dumping the
charge to ground every cycle. The gate charge losses are equal to: frequency Qg(tot) Vdr
Unfortunately, the lowest on resistance devices tend to have higher gate capacitance.
Because this loss is frequency dependent, in very high current supplies with very large FETs, with
large gate capacitance, a more optimal design may result from reducing the operating frequency.
Switching losses are also effected by gate capacitance. If the gate driver has to charge a larger
capacitance, then the time the Mosfet spends in the linear region increases and the losses
increase. The faster the rise time, the lower the switching loss. Unfortunately this causes high
frequency noise.
n : = 10 9
Mosfet: Fairchild FQB10N20L- D2PAK
Rdson := 0.3 ohm
(Total resistance between the source and drain during the on state)
Coss := 95pF
(Output capacitance)
Qgtot := 13 n coul
(Total gate charge)
Qgdmiller := 6.1 n coul
(Gate drain Miller charge)
Vgs th := 2 volt
(Threshold voltage)
-Conduction losses: 2Pcond
Pcond : = Rdson Iprms Dmax
Pcond =
1.394watt
-Switching losses: Psw(max)
Turn On time:
Rdron
tsw : = Qgdmiller
Vdr Vgs th
t sw = 8.212 10 9 sec
Pgate :
Igate
=
awg Vdr
Pgate =
0.014watt
-Total losses:
Ptot
= Ptot(max)
+ Psw m ax + Pgate
m ax : Pcond
Tamax := 50
Celsius
-Thermal
resistance
Tjmax
Tamax junction to ambient temperature:
1
ja : =
ja = 30.305
Ptot max
watt Celsius
If the thermal resistance calculated is lower than that one specified on the Mosfet's data sheet a
heat sink or higher copper area is needed.
For Example for a T0-263 (D2pak) package the Tja of the Mosfet versus copper plane area is:
flyback transformers with operating switching frequencies higher than 100Khz. (TDK PC40,
Philips 3C85)
The window shape of the core should be as wide as possible to minimize the number of layers
and therefore minimize the the ac winding losses and the leakage inductance.
E-type cores with an internal air-gap are the best choice for low cost and lower leakage
inductance.
- Winding techniques to minimize leakage inductance, ac losses and EMI noise:
To minimize the ac losses, leakage inductance and the EMI noise, particular attention has to be
paid to the design of the primary and secondary windings of the transformer.
The primary winding should be designed for less than three layers, thus minimizing the winding
capacitance and the leakage inductance of the transformer. In high switching frequency
applications an additional insulating layer between windings is usually used.
If the transformer has multiple secondary windings, the highest power secondary should be
closest to the primary of the transformer.
For high power applications, a split primary construction is typically used to reduce the leakage
inductance.
To avoid high ac winding losses due to the skin effect (at high frequency currents tend to flow
close to the surface of the conductor), Litz wire or Foil windings are typically used.
Litz wire for power applications is usually made with a few small diameter wires twisted together
in a strand, and few of these strands twisted into bigger strands.
Shielding tape or an additional winding between primary and secondaries is typically used to
reduce the capacitive coupling of common mode noise between primary and secondary. The end
of this additional winding has to be connected to ground or to the high input voltage of the
transformer.
To assist in the design of the transformer any application note from the transformer core
manufacturers can be used, or the "Transformer and Inductor Design Hadbook" written by
Colonel Wm. T. McLyman" or the "Magnetics Designer Software" from Intusoft may be used.
The required parameters for the flyback inductor-transformer design are:
-Core type and material: (TDK E core ferrite with internal air-gap)
-Switching frequency:
fsw = 150kHz
-Edt: volt-seconds
Edt = 8.245 10 5 sec volt
Ipdc = 1.867amp
Ipac = 2.79amp
Is1pk = 20.503amp
Io1max = 5 amp
Is1ac = 6.584amp
Is2pk = 4.101amp
Io2max = 1 amp
Is2ac = 1.317amp
Is3pk = 4.101amp
Io3max = 1 amp
Is3ac = 1.317amp
Ls1 = 0.496H
Ls2 = 2.51H
Ls3 = 2.51H