Mismatch-Shaping Serial Digital-To-Analog Converter: Jesper Steensgaard Un-Ku Moon and Gabor C. Temes
Mismatch-Shaping Serial Digital-To-Analog Converter: Jesper Steensgaard Un-Ku Moon and Gabor C. Temes
Jesper Steensgaard
x n k
ABSTRACT
A simple but accurate pseudo-passive mismatch-shaping D/A converter is described. A digital state machine is used to control
the switching sequence of a symmetric two-capacitor network that
performs the D/A conversion. The error caused by capacitor mismatch is uncorrelated with the input signal and has only little power
in the signal band. The system has been simulated assuming a
0.1% capacitor mismatch, and the achieved SNDR performance
was 100 dB for an oversampling ratio of 7.
+
V
ref
(n 1) (n 2)
(n 3)
(n N )
reset
reset
( )
y n
MSB
( 1) v(n 2) v(n 3)
v n
reset
read
Clock Cycle
( ; 1)
( )
y n
y n
v (n k )
C1
x( n
1 + C2
k )V
ref
C2
v (n
1 + C2
; 1)
(1)
11 ; C12
11 + C12
(2)
=
=
1+
2
x(n k )V
ref
x(n k )V
ref +
+ v (n
2
x(n
k )V
v (n k
; 1)
ref ; v (n
; 1)]
; 1)
(3)
LSB
)
0
1. INTRODUCTION
read
x n k
x n k
N)
ref
N
X
k
=1
x(n k )2
; ;1 = Vref x(n)
N
(4)
The second term represents the error caused by capacitor mismatch. For all practical purposes, it is sufficient to consider only
the first-order errors1 , in which case v (n k 1) can be approxP ;1
j ;k
imated by Vref kj =1
x(n j )2
. This leads to the following
evaluation of the error signal
e(n)
=
=
y (n)
ref
ideal (n)
N
X
k
"
x(n k )
=1
;1
X
=1
;
j )2
x(n
#
k
; ;1(5)
N
Notice that the main sum in eqn. (5) is a function of x(n) only, i.e.,
contains the harmonics of x(n). The total harmonic distortion (THD) can, in principle, be calculated analytically except for
the unknown parameter , to which the THD is proportional. Because an analytical expression will provide hardly any valuable insight, the THD performance was evaluated on the basis of simulations. It was found that, for a full-scale sinusoid input, the THD is
approximately ( 5 + 20 log10 ) dB. Unfortunately, even when
using the best known layout techniques, cannot be made much
smaller than 0.1%, corresponding to only about 11-bit linearity.
e(n)
jj
8
; 8
x n k
3. MISMATCH-SHAPING DAC
The DACs signal-band performance can be improved dramatically by using mismatch shaping. To obtain this behavior, the error
signal e(n) must be made uncorrelated with x(n) (i.e., e(n) must
be a pseudo-noise signal), and its spectral power density must be
suppressed in the signal band.
In most mismatch-shaping DACs the error signal is controlled
by interchanging nominally identical components. For the twocapacitor DAC, the only degree of freedom is the choice of which
capacitor (C1 or C2 ) is charged in clock phases 1 . A new choice
can be made in every clock cycle. In the following, t(n k) = 1
will represent the condition that C1 is charged in the k-th clock
cycle of the n-th sample, whereas t(n k) = 1 will represent
that C2 is charged instead.
By revisiting eqns. (15), it is found that the error signal can
be calculated from
X
N
e(n)
ref
V
V
x(n k )
t(n k )b(n k )2
; ;1
N
k=1
ref b(n)
(6)
where
b(n k )
;1
X
k
=1
x(n j )2
(7)
b(n) =
N
X
k
=1
t(n k )b(n k )2
)
(
x n k
2
1
read
read
Ca
Cb
( )
y n
read
a
b
y
; ;1
N
(8)
and hence that the error signals spectral composition can be controlled without knowing the actual capacitor mismatch . In other
words, the task is to choose t(n k) such that the spectral composition of b
(n) is of the desired form. A very simple error-canceling
DAC will be discussed first.
1 In other words, the terms that contain a coefficient
may be neglected.
, where
p >
1,
The operation of the two-capacitor DAC can be made mismatchshaping by choosing t(n k) appropriately in each clock cycle. An
advantage of this approach, compared to the error-canceling approach, is that the two averaging capacitors Ca and Cb can be
omitted and that only N clock cycles are required for the conversion of an N -bit word x(n). The objective is to choose t(n k)
such that b
(n) from eqn. (8) has the desired spectral composition.
Eqn. (7) shows that the coefficients b(n k) are functions of
x(n) only, and that b(n k )
1. Eqn. (8) shows that the set of
values x(n)] that b
(n) can attain using all possible combinations
j
j
x(n) = 0000
x(n) = 1111
x(n) = 0001
x(n) = 1110
x(n) = 0010
x(n) = 1101
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
b(n)
1
0
1
1
0
12
x(n) = 0100
x(n) = 1011
1
0
12
x(n) = 0101
x(n) = 1010
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
2f
;g
x(n) = 0000
x(n) = 1111
1
0
12
x(n) = 0110
x(n) = 1001
x(n) = 0011
x(n) = 1100
1
0
12
1
0
12
x(n) = 0111
x(n) = 1000
1
0
12
b(n)
1
1
1
x(n) = 0001
x(n) = 1110
x(n) = 0100
x(n) = 1011
1
1
1
1
1
LSBs
( )
x n
Bitwise Ex-NOR
;4
=1
x(n) = 0101
x(n) = 1010
x(n) = 0011
x(n) = 1100
1
1
x(n) = 0110
x(n) = 1001
1
1
Figure 3: b
(n) as a function of the 4 MSBs of x(n) and t(n)
(n)
1
1
1
x(n) = 0111
x(n) = 1000
12
t(n k )
Sign of
x(n) = 0010
x(n) = 1101
12
1
0
1
1
(n)
1
1
Figure 5: Control characteristic of b
(n) as a function of (n).
Fig. 5 shows the sign selectors control characteristic, i.e., the
(n), when the sign selector is implerelation between (n) and b
mented as shown in Fig. 4. Clearly, the controllability of b
(n) and
the control characteristics linearity depends on the digital input
word x(n); this reflects the composition of x(n)]. The controllability of b
(n) is, however, much better than that of a traditional
(n) can attain only two
single-bit
modulator (Fig 6) where b
values x(n) 1 and x(n) + 1, neither of which necessarily will
be close to (n).
x(n)
;4
b(n)
H (z )
(n)
MSBs
LSBs
(n)
MSBs
ROM
(Hard-Wired)
LSBs
( )
t n
MSBs
Discard
k)
such that b
(n) will attain
P/S
2f ;
Parallel-to-serial conversion
x(n)
Error
Estimator
Eqns. (7,8)
b(n)
()
H z
(n)
Sign
Selector
Fig. 4
Twoy(n)
Capacitor
t(n)
DAC
P/S
Vref
5. REFERENCES
0
50
50
100
100
10
10
(a) dB vs.
10
f =fs
10
10
(b) dB vs.
10
f =fs
4. CONCLUSIONS
The discussed pseudo-passive two-capacitor DAC structure is suitable for portable applications because it uses only little dc power.
The serial operation limits the bandwidth, but it is wide enough for
audio application, for example. Two techniques were proposed to
avoid the harmonic distortion caused by capacitor mismatch. The
error-canceling DAC, shown in Fig. 2, is simple to implement and
will yield a very good performance. The bandwidth-to-power ratio, however, is cut in half because each digital word is converted
twice.
3 Higher-order loop filters can designed and successfully used, but it is
advisable to stabilize the modulator by hard-limiting the state variables
representing higher-order summations of b
(n), or by incorporating reset
operations when the system becomes unstable.