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Arithmetic Instructions Mnemonics Description Bytes Instruction Cycles

The document describes the instruction set of the 8051 microcontroller. It has 111 instructions that are grouped into 5 categories - arithmetic, logical, data transfer, boolean variable, and program branching instructions. The document provides examples of instructions for each category and describes the registers, addressing modes, and operation codes used.

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66 views3 pages

Arithmetic Instructions Mnemonics Description Bytes Instruction Cycles

The document describes the instruction set of the 8051 microcontroller. It has 111 instructions that are grouped into 5 categories - arithmetic, logical, data transfer, boolean variable, and program branching instructions. The document provides examples of instructions for each category and describes the registers, addressing modes, and operation codes used.

Uploaded by

chiradonideepak
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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8051 has about 111 instructions.

These can be grouped into the following categories


1.
2.
3.
4.
5.

Arithmetic Instructions
Logical Instructions
Data Transfer instructions
Boolean Variable Instructions
Program Branching Instructions

The following nomenclatures for register, data, address and variables are used while write instructions.
A: Accumulator
B: "B" register
C: Carry bit
Rn: Register R0 - R7 of the currently selected register bank
Direct: 8-bit internal direct address for data. The data could be in lower 128bytes of RAM (00 - 7FH) or it could be in
the special function register (80 - FFH).
@Ri: 8-bit external or internal RAM address available in register R0 or R1. This is used for indirect addressing mode.
#data8: Immediate 8-bit data available in the instruction.
#data16: Immediate 16-bit data available in the instruction.
Addr11: 11-bit destination address for short absolute jump. Used by instructions AJMP & ACALL. Jump range is 2
kbyte (one page).
Addr16: 16-bit destination address for long call or long jump.
Rel: 2's complement 8-bit offset (one - byte) used for short jump (SJMP) and all conditional jumps.
bit: Directly addressed bit in internal RAM or SFR
Arithmetic Instructions
Mnemonics
ADD A, Rn
ADD A, direct
ADD A, @Ri
ADD A, #data
ADDC A, Rn
ADDC A, direct
ADDC A, @Ri
ADDC A, #data
DA A
DIV AB

DEC A
DEC Rn
DEC direct
DEC @Ri
INC A
INC Rn
INC direct
INC @Ri
INC DPTR
MUL AB

Description
A
A + Rn
A
A + (direct)
A
A + @Ri
A
A + data
A
A + Rn + C
A
A + (direct) + C
A
A + @Ri + C
A
A + data + C
Decimal adjust accumulator
Divide A by B
A
quotient
B
remainder
A
A -1
Rn
Rn - 1
(direct)
(direct) - 1
@Ri
@Ri - 1
A
A+1
Rn
Rn + 1
(direct)
(direct) + 1
@Ri
@Ri +1
DPTR
DPTR +1
Multiply A by B
A
low byte (A*B)
B
high byte (A* B)

Bytes
1
2
1
2
1
2
1
2
1

Instruction Cycles
1
1
1
1
1
1
1
1
1

1
1
2
1
1
1
2
1
1

1
1
1
1
1
1
1
1
2

SUBB A, Rn
SUBB A, direct
SUBB A, @Ri
SUBB A, #data

A
A
A
A

A - Rn - C
A - (direct) - C
A - @Ri - C
A - data - C

1
2
1
2

1
1
1
1

Logical Instructions
Mnemonics
ANL A, Rn
ANL A, direct
ANL A, @Ri
ANL A, #data
ANL direct, A
ANL direct, #data
CLR A
CPL A
ORL A, Rn
ORL A, direct
ORL A, @Ri
ORL A, #data
ORL direct, A
ORL direct, #data
RL A
RLC A
RR A
RRC A
SWAP A
XRL A, Rn
XRL A, direct
XRL A, @Ri
XRL A, #data
XRL direct, A
XRL direct, #data

Description
A
A AND Rn
A
A AND (direct)
A
A AND @Ri
A
A AND data
(direct)
(direct) AND A
(direct)
(direct) AND data
A
00H
A
A
A
A OR Rn
A
A OR (direct)
A
A OR @Ri
A
A OR data
(direct)
(direct) OR A
(direct)
(direct) OR data
Rotate accumulator left
Rotate accumulator left through carry
Rotate accumulator right
Rotate accumulator right through carry
Swap nibbles within Acumulator
A
A EXOR Rn
A
A EXOR (direct)
A
A EXOR @Ri
A
A EXOR data
(direct)
(direct) EXOR A
(direct)
(direct) EXOR data

Bytes
1
2
1
2
2
3
1
1
1
1
2
1
2
3
1
1
1
1
1
1
1
2
1
2
3

Instruction Cycles
1
1
1
1
1
2
1
1
1
1
1
1
1
2
1
1
1
1
1
1
1
1
1
1
2

Data Transfer Instructions


Mnemonics

Description

MOV A, Rn
A
Rn
MOV A, direct
A
(direct)
MOV A, @Ri
A
@Ri
MOV A, #data
A
data
MOV Rn, A
Rn
A
MOV Rn, direct
Rn
(direct)
MOV Rn, #data
Rn
data
MOV direct, A
(direct)
A
MOV direct, Rn
(direct)
Rn
MOV direct1, direct2 (direct1)
(direct2)
MOV direct, @Ri
(direct)
@Ri
MOV direct, #data
(direct)
#data
MOV @Ri, A
@Ri
A
MOV @Ri, direct
@Ri
(direct)
MOV @Ri, #data
@Ri
data
MOV DPTR, #data16 DPTR
data16
MOVC A,
A
Code byte pointed by A + DPTR
@A+DPTR
MOVC A, @A+PC A
Code byte pointed by A + PC
MOVC A, @Ri
A
Code byte pointed by Ri 8-bit address)
MOVX A, @DPTR A
External data pointed by DPTR
MOVX @Ri, A
@Ri
A (External data - 8bit address)
MOVX @DPTR, A @DPTR
A(External data - 16bit address)
PUSH direct
(SP)
(direct)

Bytes
1
2
1
2
1
2
2
2
2
3
2
3
1
2
2
3
1

Instruction
Cycles
1
1
1
1
1
2
1
1
2
2
2
2
1
2
1
2
2

1
1
1
1
1
2

2
2
2
2
2
2

POP direct
XCH Rn
XCH direct
XCH @Ri
XCHD A, @Ri

(direct)
(SP)
Exchange A with Rn
Exchange A with direct byte
Exchange A with indirect RAM
Exchange least significant nibble of A with that of
indirect RAM

2
1
2
1
1

2
1
1
1
1

Boolean Variable Instructions


Mnemonics
CLR C
CLR bit
SET C
SET bit

Description
C-bit
0
bit
0
C
1
bit
1

Bytes
1
2
1
2

Instruction Cycles
1
1
1
1

CPL C

CPL bit

bit

ANL C, /bit

C.

ANL C, bit

C. bit

ORL C, /bit

C+

ORL C, bit

C + bit

MOV C, bit

bit

MOV bit, C

bit

Program Branching Instructions


Mnemonics
ACALL addr11
AJMP addr11
CJNE A, direct, rel
CJNE A, #data, rel
CJNE Rn, #data, rel
CJNE @Ri, #data, rel
DJNZ Rn, rel
DJNZ direct, rel
JC rel
JNC rel
JB bit, rel
JNB bit, rel
JBC bit, rel
JMP @A+DPTR
JZ rel
JNZ rel
LCALL addr16
LJMP addr 16
NOP
RET
RETI
SJMP rel
JMP @A+DPTR
JZ rel
JNZ rel
NOP

Description

Bytes Instruction
Cycles
PC + 2
(SP) ; addr 11
PC
2
2
Addr11
PC
2
2
Compare with A, jump (PC + rel) if not equal 3
2
Compare with A, jump (PC + rel) if not equal 3
2
Compare with Rn, jump (PC + rel) if not equal 3
2
Compare with @Ri A, jump (PC + rel) if not
3
2
equal
Decrement Rn, jump if not zero
2
2
Decrement (direct), jump if not zero
3
2
Jump (PC + rel) if C bit = 1
2
2
Jump (PC + rel) if C bit = 0
2
2
Jump (PC + rel) if bit = 1
3
2
Jump (PC + rel) if bit = 0
3
2
Jump (PC + rel) if bit = 1
3
2
A+DPTR
PC
1
2
If A=0, jump to PC + rel
2
2
If A 0 , jump to PC + rel
2
2
PC + 3
(SP), addr16
PC
3
2
Addr16
PC
3
2
No operation
1
1
(SP)
PC
1
2
(SP)
PC, Enable Interrupt
1
2
PC + 2 + rel
PC
2
2
A+DPTR
PC
1
2
If A = 0. jump PC+ rel
2
2
If A 0, jump PC + rel
2
2
No operation
1
1

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