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Complete IC and System Solutions For Advanced DVB-C Platforms

datasheet de un microchip

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131 views4 pages

Complete IC and System Solutions For Advanced DVB-C Platforms

datasheet de un microchip

Uploaded by

Jorge Armando Lai
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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NXP single-chip STBs

CX2448x (DVB-C)

Complete IC and system solutions


for advanced DVB-C platforms
Equipped with a high-performance CPU and a host of premium features, these ICs give STB
manufacturers the lowest system BoM. A tuner, SDRAM, and Flash memory are all thats required
to complete a cutting-edge system.
Features
} MPEG-2/DVB-C decoder with integrated QAM demodulator
} High-performance 32-bit ARM9 CPU: 330 MIPS, 16-KB I & D
caches
} Advanced security hardware features for NDS, Nagravision,
Irdeto, Conax and Latens
} High-performance 2D graphics rendering acceleration
} Multiplane video/graphics compositing and display engine
} High-performance 16-bit unified memory controller
architecture
} Integrated PCI 2.1 bus bridge controller
} DDR memory interface
} High-speed USB 2.0 interface

This family, which includes powerful MPEG-2 decoder ICs for


DVB-C set-top boxes (STBs), is specially designed to give STB
manufacturers and broadcast service providers the highest levels
of performance in a format that saves space, cuts design time,
and lowers overall cost.
All the ICs in the family use the same basic architecture, built
around a 32-bit ARM926 CPU, running at up to 300 MHz
and capable of delivering 330 MIPS. It also includes a QAM
demodulator, a programmable transport stream processor, an
MPEG-2 audio/video decoder, an advanced 2D graphics hardware
accelerator, an OSD display controller, an audio DAC, a TV encoder,
a DDR memory interface, and a high-speed USB 2.0 interface.
The very high level of integration significantly reduces the
external component count. The only extra hardware needed to
complete a high-end STB is a tuner (or cable half-NIM), DDRSDRAM, and Flash memory.

The integrated QAM demodulator complies with SCTE-40


specifications and supports 16/32/64/128/256 QAM modes and
Annex A/Annex B cable systems. It can be interfaced to an NXP
TDA18252 tuner and most cable half-NIMs on the market.
The Transport Stream Processor can process MPEG-2 or
DVB compliant transport streams at a peak data rate of
90 Mbps, supporting filtering up to 40 PIDs. A hardware
coprocessor handles high data throughput functions such as
DVB descrambling, CRC, and assistance for section filtering.
The architecture also uses a TV encoder to support NTSC, PAL
and SECAM standards. There are six 10-bit video DACs, for
simultaneous output of CVBS, S-Video, and YPbPr.
To enable a rich navigation and user interfaces, the ICs integrate
an advanced 2D graphics hardware accelerator and five graphic
display panels. They let the designer combine MPEG video,
external video, graphics OSD, teletext, and cursor data to
implement advanced display functions.
The very high performance of the CPU enables interactive STB
features like advanced EPGs, online games, shopping, and
interactive polling. The ICs can be can be configured to use
sophisticated middleware that runs downloadable applications

using a high-speed return channel. The return channel can


connect, via the PCI interface, to an Ethernet MAC/PHY controller
IC or via the I/O bus to an NXP DOCSIS 2.0 IC.
Advanced security for cable operators
Several features give broadcasters a new level of protection against
piracy. An advanced one-time-programmable (OTP) memory
technology lets broadcasters personalize individual STBs with
unique serial numbers and encryption keys, so transactions between
the STB smart card and the broadcaster service decoder are more
secure. The ICs also use embedded cryptographic technology for
secure authentication of any STB system software loaded into the
Flash memory. The family supports major CA vendor requirements,
including NDS, Nagravision, Conax, Latens and Irdeto.
Full-featured development platform
These devices are part of fully engineered, interactive TV STB
development systems. The hardware platform comes equipped
with fully integrated Nucleus+ or Linux OS and driver software
components. A mature and robust hardware abstraction layer
is assured by re-use of core driver libraries developed on early
generation ICs. The development platform set-top box hardware
is designed with two- and four-layer PCB configurations, plus a
variety of return channel configurations.

CX2448x block diagram

FLASH

I/O
BUS

DDR SDRAM

USB 2.0
PHY
IR
USB 2.0
HOST

MEMORY
CONTROLLER
16-bit DDR

MP@ML
VIDEO
DECODER

AUDIO
DECODER
MPEG/DOLBY

PCM
OUTPUT

ARM926
330 MIPS CPU
16 KB I/D CACHE

STEREO DACs
SECURE
BOOT
ROM

OTP

DEMUX

CRYPTO
ENGINE

TS SWITCH
UART

I2 C

EEPROM

SMART
CARD

TV DISPLAY
REFRESH AND
COMPOSITING

QAM DEMOD

TUNER

HSDP I/O

NTSC/PAL/
SECAM
TV ENCODER

6 VIDEO DACs

EJTAG
PROTECT

GXA
2D
GRAPHICS

brb299

Ethernet-Return STB system diagram for CX2448x

7816
DDR-DRAM

card
reader
IR detect

FLASH

S/PDIF
S-video

EEPROM

CX2448x
CVBS

TDA18252

L/R

IF

TUNER

USB 2.0
PCI

ETHERNET
MAC/PHY

Technical specifications
MPEG-2 MP@ML video decoder supporting NTSC and PAL CCIR601 image resolution
MPEG-1/MPEG-2 and Dolby Digital (AC-3) audio decoder
Dedicated 32-bit RISC Core for MPEG-2/DVB-C transport stream demultiplexing
Integrated QAM demodulator supporting 16/32/64/128/256 QAM modes
NTSC/PAL/SECAM TV encoder supporting simultaneous CVBS, YC & RGB/YPrPb analog video output signals
Integrated Audio DAC
3DES/AES ciphering engine & integrated OTP memory for unique, IC security personalization
On-chip boot ROM for secure STB software authentication
Integrated DVB common descrambler & DES ECB descrambler
NDS Videoguard conditional access hardware support
300 MHz 330 MIPS 32-bit ARM926 CPU with 16KB I & D caches and MMU
Advanced 2D graphics rendering engine for alphablt, bitblt, textblt, line draw and color expansion acceleration
Unified memory architecture supporting 16-bit DDR
MPEG picture and still plane upscaling and downscaling
Multiplane video/graphics image compositing with color key or 256-level alpha blending
Video-picture-in-graphics with flexible picture size and aspect ratio
Flicker filtering, aspect ratio conversion and hardware cursor
4/8/16/32-bit ARGB/A YCrCb graphics
DDR Memory Interface for reduced system cost
High speed USB 2.0 interface
Multiplane video/graphics image compositing with color key or 256-level alpha blending

Selection guide
Part no.

Package

Demod

Video DAC

Platform

DRAM

USB 2.0

PCI

CX24482

BGA

Yes

DVB-C

DDR

No

Yes

CX24484

BGA

Yes

DVB-C

DDR

No

Yes

CX24485

BGA

Yes

DVB-C

DDR

Yes

Yes

CX24483

QFP

Yes

DVB-C

DDR

No

No

RJ-45
brb300

www.nxp.com

2009 NXP B.V.


All rights reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

Date of release: February 2009

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and

Document order number: 9397 750 16662

reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use.

Printed in the Netherlands

Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.

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