"Development of A CPLD Based Novel Open Loop Stepper Motor Controller For High Performance Using VHDL" PDF
"Development of A CPLD Based Novel Open Loop Stepper Motor Controller For High Performance Using VHDL" PDF
Disha Institute of Management and Technology, Electronics & Telecommunication Engg., Raipur (C.G.), INDIA
** Priyadarshini College of Engg. & Architecture, Nagpur (M.S.), INDIA
E-mail: [email protected]
CPLD
LATCH
DIRECTION
CONTROL
SWITCH
I. INTRODUCTION
The stepper motor consists of permanent magnet rotor
and wound stator. The coils of wound stator are called
control windings. The rotation of stepper motor is
controlled by switching ON/OFF the current through
control windings. Normally the control windings are
excited through driver transistors. The stepper motor
controller generates a sequences of digital data called
switching sequence at a particular clock rate which can be
used to switch the transistors that are used to drive the
motor. The controller can be made to generate the
switching sequences at variables rate to drive the motor at
variable speed. The direction of rotation of motor can be
reversed by generating the switching sequences in reverse
order. In this work, the control of the rotation and speed
of the stepper motor is done by using CPLD (Complex
programmable logic device) instead of DSP &
Microprocessor[1]. The characteristic of non volatility
makes the CPLD the device of choice in modern digital
designs to perform the function before handing over
control to other devices not having this capability [6].
BUFFER
307
STEPPER
MOTOR
DRIVER
CIRCUIT
STEPPER
MOTOR
CLOCK
GENERATOR
INES 2010 14th International Conference on Intelligent Engineering Systems May 57, 2010 Las Palmas of Gran Canaria, Spain
308
Z. Ali , R. V. Kshirsagar Development of a CPLD-based Novel Open Loop Stepper Motor Controller for High Performance Using VHDL
Position
Time
309
INES 2010 14th International Conference on Intelligent Engineering Systems May 57, 2010 Las Palmas of Gran Canaria, Spain
TABLE II.
OUTPUT SEQUENCE FOR DRIVER CIRCUIT
output
Step
0
Step
1
Step
2
Step
3
Step
4
Step
5
Start
Step
6
Step
7
A_n
B_N
Clock event
Clock=1
B
1
Step 0
If
Reset=1
State_motor<Next_State_motor=0
CW_CCW
=1
If
Full_Half=
1
State_motor<= next_state_motor+2
Both is true for clockwise rotation.similarly for counter
clockwise rotation for Half step mode it is decremented
by 1
State_motor<= next_state_motor-1
If Full
_Half=1
Whereas for full step mode the rotation takes place for
90 in four step only from step 0 to step 6
4
6).
1/0
1000
0/6
0/0
0010
1/7
1/1
1001
0010
1000
0110
0/1
0/5
1/6
1/2
0110
1010
0/7
1001
0001
0100
0/2
1/5
0/4
0100
1/3
0101
0001
0/3
1/4
State_motor<=next_
motor+2
State_motor<=ne
xt_motor-2
State_motor<=n
ext_motor-1
(0
State_motor<=next_
motor+1
0101
310
Z. Ali , R. V. Kshirsagar Development of a CPLD-based Novel Open Loop Stepper Motor Controller for High Performance Using VHDL
12v
Reset
Start
33
35
2
8
0
3
12v
16
D
15
CW/CCWw
37
10k
17
5
+5v
18
10k
This is a schematic representation of the preoptimized design shown at the Register Transfer
Level (RTL).
ULN
1
10k
+5v
10
1
+5v
39
+5
v
Full/Half
10k
311
INES 2010 14th International Conference on Intelligent Engineering Systems May 57, 2010 Las Palmas of Gran Canaria, Spain
2.
6.
7.
8.
9.
VI. REFERENCES
1.
5.
2.
3.
4.
312