Especificação Módulo Tiristor P135

P100 Series
Vishay High Power Products
Passivated Assembled
Circuit Elements, 25 A
FEATURES
Glass passivated junctions for greater reliability
PACE-PAK (D-19)
Electrically isolated base plate

Available up to 1200 VRRM/VDRM
High dynamic characteristics
Wide choice of circuit configurations
Simplified mechanical design and assembly
UL E78996 approved
RoHS compliant
RoHS
COMPLIANT
DESCRIPTION
PRODUCT SUMMARY
ID
25 A
The P100 series of integrated power circuits consists of

power thyristors and power diodes configured in a single
package. With its isolating base plate, mechanical designs
are greatly simplified giving advantages of cost reduction
and reduced size.
Applications include power supplies, control circuits and
battery chargers.
MAJOR RATINGS AND CHARACTERISTICS

PARAMETER
CHARACTERISTICS
ID
IFSM
I2 t
VALUES
UNITS
85 C
25
50 Hz
357
60 Hz
375
50 Hz
637
60 Hz
580
I2t
6365
VRRM
Range
A2 s
A2s
400 to 1200
2500
- 40 to 125
VRRM/VDRM, MAXIMUM
REPETITIVE PEAK REVERSE AND
PEAK OFF-STATE VOLTAGE
V
VRSM, MAXIMUM
NON-REPETITIVE PEAK
REVERSE VOLTAGE
V
IRRM MAXIMUM
AT TJ MAXIMUM
mA
P101, P121, P131
400
500
P102, P122, P132
600
700
P103, P123, P133
800
900
P104, P124, P134
1000
1100
P105, P125, P135
1200
1300
VISOL
TJ
ELECTRICAL SPECIFICATIONS
VOLTAGE RATINGS
TYPE
NUMBER
Document Number: 93754

Revision: 03-Jun-08
For technical questions, contact: [email protected]
10
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1
P100 Series
ON-STATE CONDUCTION
PARAMETER
Maximum DC output current
at case temperature
SYMBOL
ID
TEST CONDITIONS
ITSM,
IFSM
t = 8.3 ms
t = 10 ms
I2t
t = 8.3 ms
t = 10 ms
t = 8.3 ms
Maximum I2t for fusing

Maximum value of
threshold voltage
I2t
VT(TO)
25
85
No voltage
reapplied
357
100 % VRRM
reapplied
300
375
A
t = 10 ms
t = 8.3 ms
Maximum I2t for fusing
UNITS
Full bridge
t = 10 ms
Maximum peak, one-cycle

non-repetitive on-state or
forward current
VALUES
No voltage
reapplied
Sinusoidal half wave,

initial TJ = TJ maximum
100 % VRRM
reapplied
315
637
580
A2 s
450
410
t = 0.1 to 10 ms, no voltage reapplied

I2t for time tx = I2t tx
6365
A2s
TJ = 125 C
0.82
12
Maximum level value of on-state

slope resistance
rt1
Maximum on-state voltage drop
VTM
TJ = 25 C, ITM = x IT(AV)
1.35
Maximum forward voltage drop
VFM
TJ = 25 C, ITM = x IT(AV)
1.35
Maximum non-repetitive rate of

rise of turned-on current
dI/dt
TJ = 125 C from 0.67 VDRM

ITM = x IT(AV), Ig = 500 mA, tr < 0.5 s, tp > 6 s
200
A/s
TJ = 125 C, average power = VT(TO) x IT(AV) + rt + (IT(RMS))2
Maximum holding current
IH
TJ = 25 C anode supply = 6 V, resistive load, gate open
130
Maximum latching current
IL
TJ = 25 C anode supply = 6 V, resistive load
250
mA
BLOCKING
PARAMETER
SYMBOL
TEST CONDITIONS
VALUES
UNITS
Maximum critical rate of rise of

off-state voltage
dV/dt
TJ = 125 C, exponential to 0.67 VDRM gate open
200
V/s
Maximum peak reverse

and off-state leakage current
at VRRM, VDRM
IRRM,
IDRM
TJ = 125 C, gate open circuit
10
mA
Maximum peak reverse

leakage current
IRRM
TJ = 25 C
100
RMS isolation voltage
VISOL
50 Hz, circuit to base, all terminals shorted,

TJ = 25 C, t = 1 s
2500
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2

Revision: 03-Jun-08
P100 Series
TRIGGERING
PARAMETER
SYMBOL
TEST CONDITIONS
VALUES
UNITS
PGM
PG(AV)
IGM
Maximum peak negative gate voltage
-VGM
10
Maximum gate voltage

required to trigger
VGT
Maximum peak gate power

Maximum average gate power
Maximum peak gate current
TJ = - 40 C
TJ = 25 C
TJ = 125 C
Anode supply =
6 V resistive load
TJ = - 40 C
Maximum gate current
required to trigger
IGT
Maximum gate voltage

that will not trigger
VGD
Maximum gate current

that will not trigger
IGD
1
90
TJ = 25 C
60
TJ = 125 C
35
mA
0.2
mA
VALUES
UNITS
- 40 to 125
TJ = 125 C, rated VDRM applied
THERMAL AND MECHANICAL SPECIFICATIONS

PARAMETER
Maximum junction operating
and storage temperature range
SYMBOL
TEST CONDITIONS
TJ, TStg
Maximum thermal resistance,

junction to case per junction
RthJC
DC operation
2.24
Maximum thermal resistance,

case to heatsink
RthCS
Mounting surface, smooth and greased
0.10
K/W
Mounting torque, base to heatsink (1)
Nm
58
2.0
oz.
Approximate weight
Note
(1) A mounting compund is recommended and the torque should be checked after a period of 3 hours to allow for the spread of the compound

Revision: 03-Jun-08
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3
P100 Series
CIRCUIT TYPE AND CODING
(1)
CIRCUIT 0
CIRCUIT 2
CIRCUIT 3
AC1 G1
AC1 G1
AC2 G2
AC2 G2
AC2 G2
G1 G4
AC1 G3 +
G2
G3
Terminal positions
G1
Schematic diagram
G1
AC1
AC2
AC1
AC2
AC1
AC2
G2
(-)
G4
(+)
Single phase
hybrid bridge
common cathode
Basic series
G1
(-)
(+)
Single phase
hybrid bridge
doubler
(-)
(+)
Single phase
all SCR
bridge
P10.
P12.
P13.
With voltage suppression
P10.K
P12.K
P13.K
With freewheeling diode
P10.W
P10.KW
With both voltage suppression

and freewheeling diode
G2
Note
(1) To complete code refer to Voltage Ratings table, i.e.: For 600 V P10.W complete code is P102W
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Revision: 03-Jun-08
P100 Series
50
th
SA
-D
ta
R
180
(Sine)
5 K/
20
7 K/
P100 Series
T = 125C
J
10
el
3K
/W
30
W
K/
K/
W
1.5
40
Maximum Total Power Loss (W)
60
1 0 K/
0
0
10
15
Total Output Current (A)
20
25
0
25
50
75
100
125
Maximum Allowable Ambient Temperature (C)
Fig. 1 - Current Ratings Nomogram (1 Module Per Heatsink)
130
Maximum Allowable Case Temperature (C)
Maximum Average On-state Power Loss (W)
15
180
120
90
60
30
10
RMS Limit
Conduction angle
P100 Series
TJ = 125C
Per Junction
0
10
120
180
(Sine)
180
(Rect)
110
100
90
P100 Series
Per Module
80
70
0
15
10
15
20
25
30
Average On-state Current (A)
Total Output Current (A)
Fig. 2 - On-State Power Loss Characteristics
Fig. 4 - Current Ratings Characteristics
20
1000
DC
180
120
90
60
30
15
Instantaneous On-state Current (A)
Maximum Average On-state Power Loss (W)
Fully Turned.on
10
RMS Limit
Conduction Period
P100 Series
T J = 125C
Per Junction
0
0
10
15
20
Average On-state Current (A)
Fig. 3 - On-State Power Loss Characteristics

Revision: 03-Jun-08
T J = 25 C
T J = 125 C
100
10
P100 Series
Per Junction
1
0
Instantaneous On-state Voltage (V)
Fig. 5 - On-State Voltage Drop Characteristics
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5
P100 Series
400
At Any Rated Load Condition And With

Rated VRRM Applied Following Surge.
Initial T J = 125C
@ 60 Hz 0.0083 s
@ 50 Hz 0.0100 s
300
Peak Half Sine Wave On-state Current (A)
Peak Half Sine Wave On-state Current (A)
350
250
200
P100 Series
Per Junction
350
300
250
200
150
10
P100 Series
Per Junction
100
0.01
150
1
Maximum Non Repetitive Surge Current

Versus Pulse Train Duration. Control
Of Conduction May Not Be Maintained.
Initial TJ = 125C
No Voltage Reapplied
Rated V RRM Reapplied
100
0.1
Number Of Equal Amplitude Half Cycle Current Pulses (N)
Pulse Train Duration (s)
Fig. 6 - Maximum Non-Repetitive Surge Current
Fig. 7 - Maximum Non-Repetitive Surge Current
(K/W)
10
Transient Thermal Impedance Z
thJC
Steady State Value:

R thJC = 2.24K/W
(DC Operation)
1
P100 Series
Per Junction
0.1
0.01
0.0001
0.001
0.01
0.1
10
Square Wave Pulse Duration (s)
Fig. 8 - Thermal Impedance ZthJC Characteristics
Rectangular gate pulse

a)Recommended load line for
rated di/dt : 10V, 20 ohms, tr <= 1s
b)Recommended load line for
rated di/dt : 10 V, 65 ohms, tr <= 1s
(1) PGM = 100 W, tp = 500 s

(2) PGM = 50 W, tp = 1 ms
(3) PGM = 20 W, tp = 25 ms
(4) PGM = 10 W, tp = 5 ms
10
(b)
VGD
(a)
TJ = -40 C
TJ = 125 C
TJ = 25 C
Instantaneous Gate Voltage (V)
100
IGD
0.1
0.001
(4)
P100 Series
0.01
0.1
(3)
(2)
(1)
Frequency Limited
By PG(AV)
10
100
Instantaneous Gate Current (A)
Fig. 9 - Gate Characteristics
LINKS TO RELATED DOCUMENTS

Dimensions
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http://www.vishay.com/doc?95335

Revision: 03-Jun-08

Especificação Módulo Tiristor P135

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P100 Series

Vishay High Power Products

Electrically isolated base plate

The P100 series of integrated power circuits consists of

MAJOR RATINGS AND CHARACTERISTICS

P101, P121, P131

P102, P122, P132

P103, P123, P133

P104, P124, P134

P105, P125, P135

Document Number: 93754

For technical questions, contact: [email protected]

Maximum I2t for fusing

Maximum I2t for fusing

Maximum peak, one-cycle

Sinusoidal half wave,

t = 0.1 to 10 ms, no voltage reapplied

Maximum level value of on-state

Maximum on-state voltage drop

Maximum forward voltage drop

Maximum non-repetitive rate of

TJ = 125 C from 0.67 VDRM

TJ = 125 C, average power = VT(TO) x IT(AV) + rt + (IT(RMS))2

Maximum holding current

TJ = 25 C anode supply = 6 V, resistive load, gate open

Maximum latching current

TJ = 25 C anode supply = 6 V, resistive load

Maximum critical rate of rise of

TJ = 125 C, exponential to 0.67 VDRM gate open

Maximum peak reverse

TJ = 125 C, gate open circuit

Maximum peak reverse

RMS isolation voltage

50 Hz, circuit to base, all terminals shorted,

For technical questions, contact: [email protected]

Document Number: 93754

Vishay High Power Products

Maximum peak negative gate voltage

Maximum gate voltage

Maximum peak gate power

Maximum gate voltage

Maximum gate current

TJ = 125 C, rated VDRM applied

THERMAL AND MECHANICAL SPECIFICATIONS

Maximum thermal resistance,

Maximum thermal resistance,

Mounting surface, smooth and greased

Mounting torque, base to heatsink (1)

Document Number: 93754

For technical questions, contact: [email protected]

CIRCUIT TYPE AND CODING

With voltage suppression

With freewheeling diode

With both voltage suppression

For technical questions, contact: [email protected]

Document Number: 93754

Vishay High Power Products

Maximum Total Power Loss (W)

Total Output Current (A)