S7-200 Quick Reference Information

To help you find information more easily, this section summarizes the following information:


Special Memory Bits

Descriptions of Interrupt Events

Summary of S7-200 CPU Memory Ranges and Features

High-Speed Counters HSC0, HSC1, HSC2, HSC3, HSC4, HSC5

S7-200 Instructions

Table G-1

Special Memory Bits

Special Memory Bits

SM0.0

Always On

SM1.0

Result of operation = 0

SM0.1

First Scan

SM1.1

Overflow or illegal value

SM0.2

Retentive data lost

SM1.2

Negative result

SM0.3

Power up

SM1.3

Division by 0

SM0.4

30 s off / 30 s on

SM1.4

Table full

SM0.5

0.5 s off / 0.5 s on

SM1.5

Table empty

SM0.6

Off 1 scan / on 1 scan

SM1.6

BCD to binary conversion error

SM0.7

Switch in RUN position

SM1.7

ASCII to hex conversion error

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S7-200 Programmable Controller System Manual

Table G-2

Interrupt Events in Priority Order

Event Number

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432

Interrupt Description

Priority Group

Priority in Group

Port 0: Receive character

0
0

Port 0: Transmit complete

23

Port 0: Receive message complete

24

Port 1: Receive message complete

25

Port 1: Receive character

26

Port 1: Transmit complete

19

PTO 0 complete interrupt

20

PTO 1 complete interrupt

I0.0, Rising edge

I0.1, Rising edge

I0.2, Rising edge

I0.3, Rising edge

I0.0, Falling edge

I0.1, Falling edge

I0.2, Falling edge

I0.3, Falling edge

12

HSC0 CV=PV (current value = preset value)

10

27

HSC0 direction changed

28

HSC0 external reset

13

HSC1 CV=PV (current value = preset value)

13

14

HSC1 direction input changed

14

15

HSC1 external reset

15

16

HSC2 CV=PV

16

17

HSC2 direction changed

17

18

HSC2 external reset

18

32

HSC3 CV=PV (current value = preset value)

19

29

HSC4 CV=PV (current value = preset value)

20

30

HSC4 direction changed

21

31

HSC4 external reset

22

33

HSC5 CV=PV (current value = preset value)

23

10

Timed interrupt 0

11

Timed interrupt 1

21

Timer T32 CT=PT interrupt

22

Timer T96 CT=PT interrupt

Communications
(highest)

Discrete (middle)

Timed (lowest)

0
1

11
12

1
2
3

AChapter Title Appendix G

Table G-3

Summary of S7-200 CPU Memory Ranges and Features

Description

CPU 221

CPU 222

CPU 224

CPU 226

CPU 226XM

User program size

2 Kwords

2 Kwords

4 Kwords

4 Kwords

8 Kwords

User data size

1 Kwords

1 Kwords

2.5 Kwords

2.5 Kwords

5 Kwords

Process-image input register

I0.0 to I15.7

I0.0 to I15.7

I0.0 to I15.7

I0.0 to I15.7

I0.0 to I15.7

Process-image output register

Q0.0 to Q15.7

Q0.0 to Q15.7

Q0.0 to Q15.7

Q0.0 to Q15.7

Q0.0 to Q15.7

Analog inputs (read only)

----

AIW0 to AIW30

AIW0 to AIW62

AIW0 to AIW62

AIW0 to AIW62

Analog outputs (write only)

----

AQW0 to AQW30

AQW0 to AQW62

AQW0 to AQW62

AQW0 to AQW62

Variable memory (V)

VB0 to VB2047

VB0 to VB2047

VB0 to VB5119

VB0 to VB5119

VB0 to VB10239

Local memory (L)1

LB0 to LB63

LB0 to LB63

LB0 to LB63

LB0 to LB63

LB0 to LB63

Bit memory (M)

M0.0 to M31.7

M0.0 to M31.7

M0.0 to M31.7

M0.0 to M31.7

M0.0 to M31.7

Special Memory (SM)

SM0.0 to SM179.7

SM0.0 to SM299.7

SM0.0 to SM549.7

SM0.0 to SM549.7

SM0.0 to SM549.7

Read only

SM0.0 to SM29.7

SM0.0 to SM29.7

SM0.0 to SM29.7

SM0.0 to SM29.7

SM0.0 to SM29.7

256 (T0 to T255)

256 (T0 to T255)

256 (T0 to T255)

256 (T0 to T255)

256 (T0 to T255)

1 ms

T0, T64

T0, T64

T0, T64

T0, T64

T0, T64

10 ms

T1 to T4, and
T65 to T68

T1 to T4, and
T65 to T68

T1 to T4, and
T65 to T68

T1 to T4, and
T65 to T68

T1 to T4, and
T65 to T68

100 ms

T5 to T31, and
T69 to T95

T5 to T31, and
T69 to T95

T5 to T31, and
T69 to T95

T5 to T31, and
T69 to T95

T5 to T31, and
T69 to T95

Timers
Retentive on-delay

On/Off delay

1 ms

T32, T96

T32, T96

T32, T96

T32, T96

T32, T96

10 ms

T33 to T36, and

T97 to T100

T33 to T36, and

T97 to T100

T33 to T36, and

T97 to T100

T33 to T36, and

T97 to T100

T33 to T36, and

T97 to T100

100 ms

T37 to T63, and

T101 to T255

T37 to T63, and

T101 to T255

T37 to T63, and

T101 to T255

T37 to T63, and

T101 to T255

T37 to T63, and

T101 to T255

Counters

C0 to C255

C0 to C255

C0 to C255

C0 to C255

C0 to C255

High-speed counter

HC0, HC3, HC4,

and HC5

HC0, HC3, HC4,

and HC5

HC0 to HC5

HC0 to HC5

HC0 to HC5

Sequential control relays (S)

S0.0 to S31.7

S0.0 to S31.7

S0.0 to S31.7

S0.0 to S31.7

S0.0 to S31.7

Accumulator registers

AC0 to AC3

AC0 to AC3

AC0 to AC3

AC0 to AC3

AC0 to AC3

Jumps/Labels

0 to 255

0 to 255

0 to 255

0 to 255

0 to 255

Call/Subroutine

0 to 63

0 to 63

0 to 63

0 to 63

0 to 127

Interrupt routines

0 to 127

0 to 127

0 to 127

0 to 127

0 to 127

Positive/negative transitions

256

256

256

256

256

PID loops

0 to 7

0 to 7

0 to 7

0 to 7

0 to 7

Ports

Port 0

Port 0

Port 0

Port 0, Port 1

Port 0, Port 1

LB60 to LB63 are reserved by STEP 7--Micro/WIN, version 3.0 or later.

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S7-200 Programmable Controller System Manual

Table G-4

High-Speed Counters HSC0, HSC3, HSC4, and HSC5

HSC0

Mode

I0.0

Clk

Clk

I0.1

I0.2

HSC3

HSC4

I0.1

I0.3

Clk

Clk

Reset

HSC5
I0.4

I0.5

I0.4
Clk

Clk

Reset

2
3

Clk

Direction

Clk

Direction

Clk Up

Clk Down

Clk Up

Clk Down

Phase A

Phase B

10

Phase A

Phase B

Reset

Clk

Direction

Clk

Direction

Clk Up

Clk Down

Clk Up

Clk Down

Phase A

Phase B

Phase A

Phase B

Reset

5
Reset

Reset

8
Reset

Reset

11

Table G-5

HSC1

Mode

G
434

High-Speed Counters HSC1 and HSC2

I0.6

HSC2
I0.7

I1.0

Clk

Clk

Reset

Clk

Reset

Clk

Direction

Clk

Direction

Reset

Clk

Direction

Reset

Clk Up

Clk Down

Clk Up

Clk Down

Reset

Clk Up

Clk Down

Reset

Phase A

Phase B

10

Phase A

Phase B

Reset

11

Phase A

Phase B

Reset

I1.1

I1.2

I1.3

I1.4

I1.5

Clk
Start

Start

Start

Start

Clk

Reset

Clk

Reset

Clk

Direction

Clk

Direction

Reset

Clk

Direction

Reset

Clk Up

Clk Down

Clk Up

Clk Down

Reset

Clk Up

Clk Down

Reset

Phase A

Phase B

Phase A

Phase B

Reset

Phase A

Phase B

Reset

Start

Start

Start

Start

S7-200 Quick Reference Information Appendix G

Boolean Instructions

Math, Increment, and Decrement instructions

LD

Bit

Load

+I

IN1, OUT

LDI

Bit

Load Immediate

+D

IN1, OUT

LDN

Bit

Load Not

+R

IN1, OUT

LDNI

Bit

Load Not Immediate

--I

IN1, OUT

Bit

AND

--D

IN1, OUT

Subtract Integer, Double Integer, or

Real

AI

Bit

AND Immediate

--R

IN1, OUT

OUT--IN1=OUT

AN

Bit

AND Not

MUL

IN1, OUT

Multiply Integer (16*16-->32)

ANI

Bit

AND Not Immediate

*I

IN1, OUT

Bit

OR

*D

IN1, OUT

Multiply Integer, Double Integer, or

Real

OI

Bit

OR Immediate

*R

IN1, IN2

IN1 * OUT = OUT

ON

Bit

OR Not

DIV

IN1, OUT

Divide Integer (16/16-->32)

ONI

Bit

OR Not Immediate

/I

IN1, OUT

LDBx

IN1, IN2

Load result of Byte Compare

IN1 (x:<, <=,=, >=, >, <>I) IN2

/D,

IN1, OUT

ABx

IN1, IN2

AND result of Byte Compare

IN1 (x:<, <=,=, >=, >, <>) IN2

/R

IN1, OUT

SQRT

IN, OUT

Square Root

OR result of Byte Compare

IN1 (x:<, <=,=, >=, >, <>) IN2

LN

IN, OUT

Natural Logarithm

EXP

IN, OUT

Natural Exponential

Load result of Word Compare

IN1 (x:<, <=,=, >=, >, <>) IN2

SIN

IN, OUT

Sine

COS

IN, OUT

Cosine

TAN

IN, OUT

Tangent

OUT

OBx
LDWx

IN1, IN2
IN1, IN2

Add Integer, Double Integer or Real

IN1+OUT=OUT

Divide Integer, Double Integer, or Real

OUT / IN1 = OUT

AWx

IN1, IN2

AND result of Word Compare

IN1 (x:<, <=,=, >=, >, <>)I N2

OWx

IN1, IN2

OR result of Word Compare

IN1 (x:<, <=,=, >=, >, <>) IN2

INCB
INCW

OUT

LDDx

IN1, IN2

Load result of DWord Compare

IN1 (x:<, <=,=, >=, >, <>) IN2

INCD

OUT

ADx

IN1, IN2

AND result of DWord Compare

IN1 (x:<, <=,=, >=, >, <>)IN2

DECB

OUT

DECW OUT

ODx

IN1, IN2

OR result of DWord Compare

IN1 (x:<, <=,=, >=, >, <>) IN2

DECD

OUT

PID

TBL, LOOP

LDRx

IN1, IN2

Load result of Real Compare

IN1 (x:<, <=,=, >=, >, <>) IN2

Timer and Counter Instructions

ARx

IN1, IN2

AND result of Real Compare

IN1 (x:<, <=,=, >=, >, <>) IN2

TON

Txxx, PT

On-Delay Timer

TOF

Txxx, PT

Off-Delay Timer

ORx

IN1, IN2

OR result of Real Compare

IN1 (x:<, <=,=, >=, >, <>) IN2

TONR

Txxx, PT

Retentive On-Delay Timer

CTU

Cxxx, PV

Count Up

NOT

Stack Negation

CTD

Cxxx, PV

Count Down

EU

Detection of Rising Edge

CTUD

Cxxx, PV

Count Up/Down

ED

Detection of Falling Edge

Real Time Clock Instructions

Increment Byte, Word or DWord

Decrement Byte, Word, or DWord

PID Loop

Bit

Assign Value

TODR

Read Time of Day clock

=I

Bit

Assign Value Immediate

TODW T

Write Time of Day clock

Bit, N

Set bit Range

Program Control Instructions

Bit, N

Reset bit Range

END

Conditional End of Program

SI

Bit, N

Set bit Range Immediate

STOP

Transition to STOP Mode

RI

Bit, N

Reset bit Range Immediate

WDR

LDSx

IN1, IN2

Load result of String Compare

IN1 (x: =, <>) IN2

JMP

Jump to defined Label

LBL

Define a Label to Jump to

CALL

N [N1,...]

Call a Subroutine [N1, ... up to 16

optional parameters]

WatchDog Reset (300 ms)

ASx

IN1, IN2

AND result of String Compare

IN1 (x: =, <>) IN2

OSx

IN1, IN2

OR result of String Compare

IN1 (x: =, <>) IN2

CRET

ALD

And Load

FOR

OLD

Or Load

NEXT

LPS

Logic Push (stack control)

LSCR

LRD

Logic Read (stack control)

SCRT

LPP

Logic Pop (stack control)

CSCRE

Load Stack (stack control)

SCRE

LDS
AENO

Conditional Return from SBR

INDX,INIT,FINAL

For/Next Loop

Load, Transition, Conditional End, and

End Sequence Control Relay

And ENO

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S7-200 Programmable Controller System Manual

Move, Shift, and Rotate Instructions

Table, Find, and Conversion Instructions

MOVB IN, OUT

ATT

DATA, TBL

LIFO

TBL, DATA

FIFO

TBL, DATA

FND=

TBL, PTN, INDX

MOVW IN, OUT

MOVD IN, OUT

Move Byte, Word, DWord, Real

MOVR IN, OUT

Add data to table

Get data from table

BIR

IN, OUT

Move Byte Immediate Read

FND<> TBL, PTN, INDX

BIW

IN, OUT

Move Byte Immediate Write

FND<

TBL, PTN, INDX

BMB

IN, OUT, N

FND>

TBL, PTN, INDX

BMW

IN, OUT, N

FILL

IN, OUT, N

Fill memory space with pattern

BMD

IN, OUT, N

BCDI

OUT

Convert BCD to Integer

SWAP

IN

Swap Bytes

IBCD

OUT

Convert Integer to BCD

SHRB

DATA, S_BIT, N

Shift Register Bit

BTI

IN, OUT

Convert Byte to Integer

SRB

OUT, N

ITB

IN, OUT

Convert Integer to Byte

SRW

OUT, N

ITD

IN, OUT

Convert Integer to Double Integer

SRD

OUT, N

DTI

IN, OUT

Convert Double Integer to Integer

SLB

OUT, N

DTR

IN, OUT

Convert DWord to Real

SLW

OUT, N

SLD

Block Move Byte, Word, DWord

Shift Right Byte, Word, DWord

Shift Left Byte, Word, DWord

Find data value in table that matches

comparison

TRUNC IN, OUT

Convert Real to Double Integer

OUT, N

ROUND IN, OUT

Convert Real to Double Integer

RRB

OUT, N

ATH

IN, OUT, LEN

Convert ASCII to Hex

RRW

OUT, N

HTA

IN, OUT, LEN

Convert Hex to ASCII

RRD

OUT, N

ITA

IN, OUT, FMT

Convert Integer to ASCII

RLB

OUT, N

DTA

IN, OUT, FM

Convert Double Integer to ASCII

RLW

OUT, N

RTA

IN, OUT, FM

Convert Real to ASCII

RLD

OUT, N

DECO

IN, OUT

Decode

Logical Instructions

ENCO

IN, OUT

Encode

ANDB

SEG

IN, OUT

Generate 7--segment pattern

ITS

IN, FMT, OUT

Convert Integer to String

DTS

IN, FMT, OUT

Convert Double Integer to String

RTS

IN, FMT, OUT

Convert Real to String

STI

STR, INDX, OUT

Convert Substring to Integer

STD

STR, INDX, OUT

Convert Substring to Double Integer

STR

STR, INDX, OUT

Convert Substring to Real

IN1, OUT

ANDW IN1, OUT

ANDD

IN1, OUT

ORB

IN1, OUT

ORW

IN1, OUT

ORD

IN1, OUT

XORB

IN1, OUT

XORW IN1, OUT

Rotate Right Byte, Word, DWord

Rotate Left Byte, Word, DWord

Logical AND of Byte, Word, and

DWord

Logical OR of Byte, Word, and DWord

Logical XOR of Byte, Word, and

DWord

XORD

IN1, OUT

INVB

OUT

Invert Byte, Word and DWord

INVW

OUT

(1s complement)

INVD

OUT

String Instructions

Interrupt Instructions
CRETI

Conditional Return from Interrupt

ENI

Enable Interrupts

DISI

Disable Interrupts

ATCH

INT, EVNT

Attach Interrupt routine to event

DTCH

EVNT

Detach event

Communications Instructions

SLEN

IN, OUT

String Length

SCAT

IN, OUT

Concatenate String

XMT

TBL, PORT

Freeport transmission

SCPY

IN, OUT

Copy String

RCV

TBL, PORT

Freeport receive message

SSCPY IN, INDX, N, OUT

Copy Substring from String

NETR

TBL, PORT

Network Read

CFND

IN1, IN2, OUT

Find First Character within String

NETW TBL, PORT

Network Write

SFND

IN1, IN2, OUT

Find String within String

GPA

ADDR, PORT

Get Port Address

SPA

ADDR, PORT

Set Port Address

High-Speed Instructions

G
436

HDEF

HSC, MODE

Define High-Speed Counter mode

HSC

Activate High-Speed Counter

PLS

Pulse Output