AMITY INSTITUTE OF INFORMATION

TECHNOLOGY

8085 Programming File

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Enrollment no.

INDEX
S.NO
.
1.
2.
3.
4.
5.

Title

6.
7.

Instruction modes of 8085

Theory of 8085
Features
Architecture
40 Pin diagram of 8085
Instructions symbols according to categories

Write a program to Add and subtract two registers contents

8.
To develop an Assembly Code to perform the swapping of data of two
memory locations
9.

To develop an Assembly Code to perform Right rotation and left rotation of

the Register D

10.

11.
12.
13.
14.

15.
16.
17.
18.
19.

To develop a program to load the two largest 4 digit hexadecimal

numbers. Add the numbers, and display the sum. Assume register of
your choice
To develop an Assembly Code to multiply two Hexadecimal numbers
Write an Assembly Code to count number of ls in the contents of D
register and store the count in the B register
To develop a program in assembly language program to find the
square of numbers
To develop an 8085 assembly language program to find the smallest
value between two numbers .Store the value in memory location
2012H
Write a program to find the sum of two BCD numbers stored in
memory
Write a program to find maximum and minimum of numbers in an
array
Write a program to arrange numbers in ascending order
Write a program to arrange numbers in descending order
Write a program to add a number in an Array

Page
No.

Remar
k

Theory of 8085
Registers
The 8085 programming model includes six registers, one accumulator, and one flag register. In
addition, it has two 16-bit registers: the stack pointer and the program counter. They are described
briefly as follows. The 8085 has six general-purpose registers to store 8-bit data; these are identified
as B,C,D,E,H, and L. They can be combined as register pairs - BC, DE, and HL - to perform some
16-bit operations. We cant combine registers in the form of CD, EH. The programmer can use these
registers to store or copy data into the registers by using data copy instructions.

Accumulator
The accumulator is an 8-bit register that is a part of arithmetic/logic unit (ALU). This register is
used to store 8-bit data and to perform arithmetic and logical operations. The result of an operation
is stored in the accumulator. The accumulator is also identified as register A.

Flags
The ALU includes five flip-flops, which are set or reset after an operation according to data
conditions of the result in the accumulator and other registers. They are called Zero(Z), Carry (CY),
Sign (S), Parity (P), and Auxiliary Carry (AC) flags; they are listed in the Table and their bit
positions in the flag register are shown in the Figure below. The most commonly used flags are
Zero, Carry, and Sign. The microprocessor uses these flags to test data conditions.
For example, after an addition of two numbers, if the sum in the accumulator is larger than eight
bits, the flip-flop uses a flag to indicate a carry -- called the Carry flag (CY) -- which is set to one.
When an arithmetic operation results in zero, the flip-flop called the Zero(Z) flag is set to one.
There is an 8-bit register, called the flag register, adjacent to the accumulator. However, it is not
used as a register; five bit positions out of eight are used to store the outputs of the five flip-flops.
The flags are stored in the 8-bit register so that the programmer can examine these flags (data
conditions) by accessing the register through an instruction. These flags have critical importance in
the decision-making process of the microprocessor. The conditions (set or reset) of the flags are
tested through the software instructions. For example, the instruction JC (Jump on Carry) is
implemented to change the sequence of a program when CY flag is set. The thorough understanding
of flag is essential in writing assembly language programs.
D7
S

D6
Z

D5

D4
AC

D3

D2
P

D1

D0
CY

Program Counter (PC)

This 16-bit register deals with sequencing the execution of instructions. This register is a memory
pointer. Memory locations have 16-bit addresses, and that is why this is a 16-bit register. The
microprocessor uses this register to sequence the execution of the instructions. The function of the
program counter is to point to the memory address from which the next byte is to be fetched. When
a byte (machine code) is being fetched, the program counter is incremented by one to point to the
next memory location

Stack Pointer (SP)

The stack pointer is also a 16-bit register used as a memory pointer. It points to a memory location
in R/W memory, called the stack. The beginning of the stack is defined by loading 16-bit address in
the stack pointer.

Instruction Register/Decoder
It is a temporary store for the current instruction of a program. Latest instruction are sent here from
memory prior to execution. Decoder then takes the instruction and decodes or interprets the
instruction. Decoded instruction then is passed to the next stage.

Memory Address Register

It holds address, received from PC, of next program instruction. It feeds the address bus with
addresses of location of the program under execution.

Features

It is an 8 bit microprocessor (each character is represented by 8 bits or a byte).

It is manufactured with N-MOS (n-type Metal Oxide Semiconductor) technology

implemented with 6200 transistors.

It has 16-bit address lines - A0-A15 (to point the memory locations) and hence can point up
to 2^16 = 65535 bytes (64KB) memory locations.

The first 8 lines of address bus and 8 lines of data bus are multiplexed AD0-AD7. Data bus
is a group of 8 lines D0-D7.

It provides 5 levels interrupts and supports external interrupt request.

A 16 bit program counters (PC).

A 16 bit stack pointer (SP).

It provides 1 accumulator, 2 flag register, and six 8-bit general purpose register arranged in
pairs: BC, DE, HL and 2special purpose registers.

It consists of 74 instruction sets.

It performs arithmetic and logical operations.

It provides status for advanced control signals, On chip clock generator.

It requires a signal +5V power supply and operates at 3.2 MHZ single phase clock with
maximum clock frequency 6 MHz and minimum clock frequency 500 kHz.

Serial input/output port.

1.3 micro sec instruction cycles.

It is enclosed with 40 pins DIP (Dual in line package).

It can be used to implement (interface) 3 chip micro-computers (8085, 8155, 8255 and 8355:
Peripheral IC's).

Architecture
This is the functional block diagram of the 8085 Microprocessor.

Accumulator
It is an 8-bit register which is used to perform arithmetical and logical operation. It stores the
output of any operation. It also works as registers for i/o accesses.

Temporary Register
It is an 8-bit register which is used to hold the data on which the accumulator is computing
operation. It is also called as operand register because it provides operands to ALU.

Registers
These are general purposes registers. Microprocessor consists 6 general purpose registers of 8bit each named as B, C, D, E, H and L. Generally theses registers are not used for storing the
data permanently. It carries the 8-bits data. These are used only during the execution of the
instructions.
These registers can also be used to carry the 16 bits data by making the pair of 2 registers. The

valid register pairs available are BC, DE, and HL. We cannot use other pairs except BC, DE and
HL. These registers are programmed by user.

ALU
ALU performs the arithmetic operations and logical operation.

Flag Registers
It consists of 5 flip flops which changes its status according to the result stored in an
accumulator. It is also known as status registers. It is connected to the ALU.
There are five flip-flops in the flag register are as follows:
Sign(S)
Zero (z)
Auxiliary carry (AC)
Parity (P)
Carry(C)
The bit position of the flip flop in flag register is:
D7

D6

D5

D4
AC

D3

D2

D1

D0
CY

All of the three flip flops set and reset according to the stored result in the accumulator.

1. SignIf D7 of the result is 1 then sign flag is set otherwise reset. As we know that a number on the D7
always decides the sign of the number. if D7 is 1: the number is negative. if D7 is 0: the number
is positive.

2. Zeros (Z)If the result stored in an accumulator is zero then this flip flop is set otherwise it is reset.

3. Auxiliary carry (AC)If any carry goes from D3 to D4 in the output then it is set otherwise it is reset.

4. Parity (P)-

If the no of 1's is even in the output stored in the accumulator then it is set otherwise it is reset
for the odd.

5. Carry(C)If the result stored in an accumulator generates a carry in its final output then it is set otherwise
it is reset.

Instruction registers (IR)

It is an 8-bit register. When an instruction is fetched from memory then it is stored in this
register.

Instruction Decoder
Instruction decoder identifies the instructions. It takes the informations from instruction register
and decodes the instruction to be performed.

Program Counter
It is a 16 bit register used as memory pointer. It stores the memory address of the
next instruction to be executed. So we can say that this register is used to sequencing the
program. Generally the memory has 16 bit addresses so that it has 16 bit memory. The program
counter is set to 0000H.

Stack Pointer
It is also a 16 bit register used as memory pointer. It points to the memory location called stack.
Generally stack is a reserved portion of memory where information can be stores or taken back
together.

Timing and Control Unit

It provides timing and control signal to the microprocessor to perform the various operations. It
has three control signals. It controls all external and internal circuits. It operates with reference
to clock signal. It synchronizes all the data transfers.
There are three control signals:
1. ALE-Arithmetic Latch Enable, It provides control signal to synchronize the components
of microprocessor.
2. RD- This is active low used for reading operation.
3. WR-This is active low used for writing operation.
There are three status signal used in microprocessor S0, S1 and IO/M. It changes its status
according the provided input to these pins.

Serial Input Output Control-

There are two pins in this unit. This unit is used for serial data communication.

Interrupt Unit
There are 6 interrupt pins in this unit. Generally an external hardware is connected to these pins.
These pins provide interrupt signal sent by external hardware to microprocessor and
microprocessor sends acknowledgement for receiving the interrupt signal. Generally INTA is
used for acknowledgement.

Register Section
Many registers has been used in microprocessor. PIPO shift register It consists of PIPO (Parallel
Input Parallel Output) register.

40 Pin Diagram Of 8085

Properties
Single + 5V Supply
4 Vectored Interrupts (One is Non Maskable)
Serial In/Serial Out Port
Decimal, Binary, and Double Precision Arithmetic
Direct Addressing Capability to 64K bytes of memory
The Intel 8085A is a new generation, complete 8 bit parallel central processing unit
(CPU). The 8085A uses a multiplexed data bus. The address is split between the 8bit
address bus and the 8bit data bus. Figures are at the end of the document.

Pin Description
The following describes the function of each pin:

A6 - A1s (Output 3 State)

Address Bus; The most significant 8 bits of the memory address or the 8 bits of the I/0
address,3 stated during Hold and Halt modes.

AD0 - 7 (Input/Output 3state)

Multiplexed Address/Data Bus; Lower 8 bits of the memory address (or I/0 address)
appear on the bus during the first clock cycle of a machine state. It then becomes the
data bus during the second and third clock cycles. 3 stated during Hold and Halt
modes.

ALE (Output)
Address Latch Enable: It occurs during the first clock cycle of a machine state and
enables the address to get latched into the on chip latch of peripherals. The falling

edge of ALE is set to guarantee setup and hold times for the address information.
ALE can also be used to strobe the status information. ALE is never 3stated.

SO, S1 (Output)
Data Bus Status. Encoded status of the bus cycle:
S1 S0
O O HALT
0 1 WRITE
1 0 READ
1 1 FETCH
S1 can be used as an advanced R/W status.

RD (Output 3state)
READ; indicates the selected memory or 1/0 device is to be read and that the Data
Bus is available for the data transfer.

WR (Output 3state)
WRITE; indicates the data on the Data Bus is to be written into the selected memory
or 1/0 location. Data is set up at the trailing edge of WR. 3stated during Hold and Halt
modes.

READY (Input)
If Ready is high during a read or write cycle, it indicates that the memory or
peripheral is ready to send or receive data. If Ready is low, the CPU will wait for
Ready to go high before completing the read or write cycle.
HOLD (Input)
HOLD; indicates that another Master is requesting the use of the Address and Data
Buses. The CPU, upon receiving the Hold request. will relinquish the use of buses as
soon as the completion of the current machine cycle. Internal processing can continue. The
processor can regain the buses only after the Hold is removed. When the Hold is
acknowledged, the Address, Data, RD, WR, and IO/M lines are 3stated.

HLDA (Output)
HOLD ACKNOWLEDGE; indicates that the CPU has received the Hold request and
that it will relinquish the buses in the next clock cycle. HLDA goes low after the Hold
request is removed. The CPU takes the buses one half clock cycle after HLDA goes
low.

INTR (Input)
INTERRUPT REQUEST; is used as a general purpose interrupt. It is sampled only
during the next to the last clock cycle of the instruction. If it is active, the Program
Counter (PC) will be inhibited from incrementing and an INTA will be issued. During
this cycle a RESTART or CALL instruction can be inserted to jump to the interrupt
service routine. The INTR is enabled and disabled by software. It is disabled by Reset
and immediately after an interrupt is accepted.

INTA (Output)
INTERRUPT ACKNOWLEDGE; is used instead of (and has the same timing as) RD
during the Instruction cycle after an INTR is accepted. It can be used to activate the
8259 Interrupt chip or some other interrupt port.
RST 5.5

RST 6.5 - (Inputs)

RST 7.5
RESTART INTERRUPTS; These three inputs have the same timing as I NTR except
they cause an internal RESTART to be automatically inserted.
RST 7.5 ~~ Highest Priority
RST 6.5
RST 5.5 o Lowest Priority
The priority of these interrupts is ordered as shown above. These interrupts have a
higher priority than the INTR.

TRAP (Input)
Trap interrupt is a nonmaskable restart interrupt. It is recognized at the same time as
INTR. It is unaffected by any mask or Interrupt Enable. It has the highest priority of
any interrupt.

RESET IN (Input)
Reset sets the Program Counter to zero and resets the Interrupt Enable and HLDA
flipflops. None of the other flags or registers (except the instruction register) are
affected The CPU is held in the reset condition as long as Reset is applied.

RESET OUT (Output)

Indicates CPlJ is being reset. Can be used as a system RESET. The signal is
synchronized to the processor clock.

X1, X2 (Input)
Crystal or R/C network connections to set the internal clock generator X1 can also be
an external clock input instead of a crystal. The input frequency is divided by 2 to
give the internal operating frequency.

CLK (Output)
Clock Output for use as a system clock when a crystal or R/ C network is used as an
input to the CPU. The period of CLK is twice the X1, X2 input period.

IO/M (Output)
IO/M indicates whether the Read/Write is to memory or l/O Tristated during Hold and
Halt modes.

SID (Input)
Serial input data line The data on this line is loaded into accumulator bit 7 whenever a
RIM instruction is executed.

SOD (output)
Serial output data line. The output SOD is set or reset as specified by the SIM
instruction.

Vcc +5 volt supply.

Vss Ground Reference.

Instructions symbols according to categories.

DATA TRANSFER INSTRUCTIONS

Opcode

Operand

Copy from source to destination

MOV
Rd, Rs
M, Rs
Rd, M
Move immediate 8-bit
MVI
Rd, data
M, data
Load accumulator
LDA
16-bit address

Load accumulator indirect

LDAX
B/D Reg. pair

Load register pair immediate

LXI
Reg. pair, 16-bit data

Load H and L registers directly

LHLD 16-bit address

Store accumulator direct

STA
16-bit address

Store accumulator indirect

STAX
Reg. pair

Description
This instruction copies the contents of the source
register into the destination register; the contents of
the source register are not altered.
Example: MOV B, C or MOV B, M
The 8-bit data is stored in the destination register or
memory.
Example: MVI B, 57H or MVI M, 57H
The contents of a memory location, specified by a
16-bit address in the operand, are copied to the accumulator.
Example: LDA 2034H
The contents of the designated register pair point to a memory
location. This instruction copies the contents of that memory
location into the accumulator.
Example: LDAX B
The instruction loads 16-bit data in the register pair
designated in the operand.
Example: LXI H, 2034H or LXI H, XYZ

The instruction copies the contents of the memory location

pointed out by the 16-bit address into register L and copies the
contents of the next memory location into register H. The
contents of source memory locations are not altered.
Example: LHLD 2040H

The contents of the accumulator are copied into the memory

location specified by the operand.
Example: STA 4350H
The contents of the accumulator are copied into the memory
location specified by the contents of the operand (register
pair).
Example: STAX B
Store H and L registers direct

SHLD 16-bit address

The contents of register L are stored into the memory location
specified by the 16-bit address in the operand and the contents of
H register are stored into the next memory location by
incrementing the operand.
Example: SHLD 2470H

Exchange H and L with D and

XCHG none

The contents of register H are exchanged with the contents of

register D, and the contents of register L are exchanged with
the contents of register E.
Example: XCHG

ARITHMETIC INSTRUCTIONS
Opcode

Operand

Description

Add register or memory to accumulator

ADD
R
The contents of the operand (register or memory) are
M
added to the contents of the accumulator and the
result is stored in the accumulator.
All flags are modified to reflect the result of the
Example: ADD B or ADD M
Add immediate to accumulator
ADI
8-bit data

The 8-bit data (operand) is added to the contents of the

accumulator and the result is stored in the accumulator.
Example: ADI 45H

Add register pair to H and L registers

DAD Reg. pair
The 16-bit contents of the specified register pair are added to
the contents of the HL register and the sum is stored in the HL
register.
Example: DAD H
Subtract register or memory from accumulator
SUB
R
The contents of the operand (register or memory ) are
M
subtracted from the contents of the accumulator, and the result
is stored in the accumulator. If the operand is a memory
location, its location is specified by the contents of the HL
registers. All flags are modified to reflect the result of the
subtraction.
Example: SUB B or SUB M
Subtract immediate from accumulator
SUI
8-bit data
The 8-bit data (operand) is subtracted from the contents of the
accumulator and the result is stored in the accumulator.
Example: SUI 45H
Increment register or memory by 1

INR

R
M

Increment register pair by 1

INX R

Decrement register or memory by 1

DCR
R
M

The contents of the designated register or memory) are

incremented by 1 and the result is stored in the same place.
Example: INR B or INR M
The contents of the designated register pair are incremented
by 1 and the result is stored in the same place.
Example: INX H

The contents of the designated

Decrement register pair by 1
DCX R

register or memory are decremented by 1 and the result is

stored in the same place.
Example: DCR B or DCR M

The contents of the designated register pair are decremented

by 1 and the result is stored in the same place.
Example: DCX H

BRANCHING INSTRUCTIONS
Opcode

Operand

Description

Jump conditionally
Operand: 16-bit address
The program sequence is transferred to the memory location
specified by the 16-bit address given in the operand based on the
specified flag of the PSW as described below.

Example: JZ 2034H or JZ XYZ

Opcode
JC
JNC
JP
JM
JZ
JNZ
JPE
JPO

Description
Jump on Carry
Jump on no Carry
Jump on positive
Jump on minus
Jump on zero
Jump on no zero
Jump on parity even
Jump on parity odd

Flag Status
CY = 1
CY = 0
S=0
S=1
Z=1
Z=0
P=1
P=0

LOGICAL INSTRUCTIONS
Opcode

Operand

Description

Compare register or memory with accumulator

CMP

R
M

The contents of the operand (register or memory) are

compared with the contents of the accumulator. Both
contents are preserved . The result of the comparison is
shown by setting the flags of the PSW as follows:
if (A) < (reg/mem): carry flag is set
if (A) = (reg/mem): zero flag is set
if (A) > (reg/mem): carry and zero flags are reset
Example: CMP B or CMP M

Logical AND register or memory with accumulator

ANA

R
M

The contents of the accumulator are logically ANDed with

the contents of the operand (register or memory), and the

result is placed in the accumulator. If the operand is a

memory location, its address is specified by the contents of
HL registers. S, Z, P are modified to reflect the result of the
operation. CY is reset. AC is set.
Example: ANA B or ANA M
Logical AND immediate with accumulator

ANI 8-bit data

The contents of the accumulator are logically ANDed with the

8-bit data (operand) and the result is placed in the
accumulator. S, Z, P are modified to reflect the result of the
operation. CY is reset. AC is set.
Example: ANI 8

Exclusive OR register or memory with accumulator

XRA

R
M

The contents of the accumulator are Exclusive ORed with

the contents of the operand (register or memory), and the

result is placed in the accumulator. If the operand is a
memory location, its address is specified by the contents of
HL registers. S, Z, P are modified to reflect the result of
the operation. CY and AC are reset.
Example: XRA B or XRA M

Exclusive OR immediate with accumulator

XRI

8-bit data

The contents of the accumulator are Exclusive ORed with the

8-bit data (operand) and the result is placed in the
accumulator. S, Z, P are modified to reflect the result of the
operation. CY and AC are reset.
Example: XRI 86H

Logical OR register or memory with accumulator

ORA

R
M

The contents of the accumulator are logically ORed with

the contents of the operand (register or memory), and the

result is placed in the accumulator. If the operand is a

memory location, its address is specified by the contents of
HL registers. S, Z, P are modified to reflect the result of
the operation. CY and AC are reset.
Example: ORA B or ORA M
Logical OR immediate with accumulator
ORI

8-bit data

Rotate accumulator left

RLC

The contents of the accumulator are logically ORed with the

8-bit data (operand) and the result is placed in the
accumulator. S, Z, P are modified to reflect the result of the
operation. CY and AC are reset.
Example: ORI 86H

Each binary bit of the accumulator is rotated left by one

position.
S, Z, P, AC are not affected.

Example: RLC
Rotate accumulator right
RRC

Each binary bit of the accumulator is rotated right by

one position
S, Z, P, AC are not affected.
Example: RRC

Rotate accumulator left through carry

RAL

Each binary bit of the accumulator is rotated left by one

position through the Carry flag. Bit D7 is placed in the Carry
flag, and the carry flag is placed in the least significant
position D0. CY is modified according to bit D7. S, Z, P, AC
are not affected.
Example: RAL

Rotate accumulator right through carry

RAR

Complement accumulator
CMA

Each binary bit of the accumulator is rotated right by one

position through the Carry flag. Bit D0 is placed in the Carry
flag and the carry flag is placed in the most significant
position D7. CY is modified according to bit D0. S, Z, P, AC
are not affected.
Example: RAR

The contents of the accumulator are complemented. No flags

are affected.
Example: CMA

MACHINE INSTRUCTION
Opcode

Operand

HLT

Description
It shows the ending of the programs
Example: HLT

PUSH

RP

Push the content of the register pair to the stack

Example: PUSH B or PUSH A

POP

RP

Pop the content of the register pair

Example: POP H or POP A

NOP

No Operation

Instruction modes of 8085.

1. Immediate Addressing Mode

2. Register Addressing Mode

3. Direct Addressing Mode
4. Indirect Addressing Mode
5. Implied/implicit Addressing Mode

Immediate Addressing Mode:

An immediate is transferred directly to the register.
Eg: -MVI A, 30H (30H is copied into the register A)
MVI B, 40H(40H is copied into the register B).

Register Addressing Mode

Data is copied from one register to another register.
Eg: -MOV B, A (the content of A is copied into the register B)
MOV A, C (the content of C is copied into the register A).

Direct Addressing Mode

Data is directly copied from the given address to the register.
Eg: -LDA 3000H (The content at the location 3000H is copied to the register A).

Indirect Addressing Mode

The data is transferred from the address pointed by the

data in a register to other register.

Eg: - MOV A, M (data is transferred from the memory location pointed by the register to the
accumulator).

Implied Addressing Mode

This mode doesn't require any operand. The data is specified by opcode itself.
Eg: -RAL, CMP

1. Write a program to Add and subtract two registers contents.

a) Addition
MVI B,10H

(Move data immediately to register)

MVI C,05H
MOV A,C
ADD B
HLT

(Move data from register C to Accumulator)

(ADD register B with the accumulator)
(End of program)

Output:

b) Subtraction
MVI B,25H
MVI C,10H
MOV A,B
SUB C
HLT
Output:

(Move data immediately to register)

(Move data from register B to accumulator)
(Subtract register C from accumulator)

2. To develop an Assembly Code to perform the swapping of data of two memory locations.
LDA 2000H
MOV B, A
LDA 2002H
STA 2000H
MOV A, B
STA 2002H
HLT

( Load data from address to accumulator)

(Data of the accumulator is copied to the address location)
(Move data from register to accumulator)
(Data of accumulator is copied to 2002 memory location)
(End of program)

Output:
Before Swapping

After Swapping

3. To develop an Assembly Code to perform Right rotation and left rotation of the Register
D.

Right Rotation
MVI C, 05H
MOV A, C
RAR
MOV C, A
HLT

(Data transferred immediately to register)

(Accumulator rotate right through carry)
(Move data from accumulator to register)

Output:

Left Shift:
MVI C, 03H
MOV A, C
RAL
MOV C, A
HLT

Output:

(Move data from register to accumulator)

(Accumulator rotate left through carry)
(End of program)

4. To develop a program to load the two largest 4 digit hexadecimal numbers. Add the
numbers, and display the sum. Assume register of your choice.

LHLD 2010H
XCHG
LHLD 2012H
MOV A,E
ADD L
MOV L,A
MOV A,D
ADC H
MOV H,A
SHLD 2018H

(Transfers the data from 2010 memory location to register L and from
next memory location to register H)
(Exchange data from HL register pair to DE register pair)
(Move data from register E to accumulator)
(Add register L with accumulator)
(Then move the data back into register L)
(Register H is added to the accumulator with carry and stored back in
accumulator)

HLT

(Contents of L is transferred to 2018 memory location and from H,

data is transferred into next memory location)
(End of program)

ORG 2010H
DB FFH, FFH, FFH, FEH

(Two largest 4 digit hexadecimal)

Output:

5. To develop an Assembly Code to multiply two Hexadecimal numbers.

MVI B, 05H
MVI D, 04H
S: ADD B
DCR D
JNZ S
HLT

(Move data immediately to register)

(Add register with accumulator)
(Decrement register D)
(Jump if not zero to S loop)

Output

6. Write an Assembly Code to count number of ls in the contents of D register and store
the count in the B register.

MVI C,8H
MVI B,0H
MVI D,7H
MOV A,D
SHIFT: RAR
JNC ZERO
INR B
ZERO: DCR C
JNZ SHIFT
HLT

Output:

(Move data immediately to register)

(Move data from register to accumulator)
(Rotate accumulator to right through carry)
(Jump to ZERO if not carry)
(Increment register B)
(Decrement register C)
(Jump to SHIFT if not zero)

7. To develop a program in assembly language program to find the square of numbers.

MVI B, 03H
MOV D,B
S: ADD B
DCR D
JNZ S
HLT

(Move data immediately to register)

(Move data from B to D register)
(Add register B to accumulator)
(Decrement register D once)
(Go back to S loop if not zero)
(End of program)

Output:

8. To develop an 8085 assembly language program to find the smallest value between two
numbers .Store the value in memory location 2012H .

MVI B,20H
MVI C,16H
MOV A,B
CMP C
JNC PRINT
JNZ EQUAL
JC PRINTS
PRINT: MOV A,C
STA 2012H
HLT
PRINTS: MOV A,B
STA 2012H
HLT
EQUAL: MVI A,0H
STA 2012H
HLT

Output:

(Move data immediately to register B)

(Move data from register B to accumulator)
(Compare register C with accumulator)
(If C is small, jump to PRINT)
(If equal, jump to EQUAL)
(If C is greater, jump to PRINTS)
(Save the data from accumulator to the address)

9. Write a program to find the sum of two BCD numbers stored in memory.
MVI B,63H
MVI A,88H
MVI C,00H
ADD B
DAA
JNC BACK
INR C
STA 2005H
BACK: STA 2006H
MOV A,C
STA 2007H
HLT

(Move data immediately to register)

(Add register with accumulator)
(Accumulator is changed from binary to two 4-bit BCD digits)
(If not carry, jump to BACK)
(Increment register C)
(Data from accumulator is copied into address location)
(Move data from register to accumulator)
(End of program)

Output:

10. Write a program to find maximum and minimum of numbers in an array.

Minimum Number
MVI C,05H
DCR C
LXI HL,2018H
MOV A,M
BACK: INX HL
CMP M
JC AHEAD
MOV A,M
AHEAD: DCR C
JNZ BACK
INX HL
MOV M,A
HLT
ORG 2018H
DB 12H,10H,67H,80H,90H

(Decrement register C)
(Load data immediately to the address from register pair)
(Comparing Accumulator with data in Memory)
(Jump to AHEAD if carry)
(If not carry move data from memory to accumulator)
(If not zero, jump to back)
(If zero, Increment register pair HL)
(Move data from accumulator to memory)
(Entries in the array)

Output:

Largest Number:
MVI C,05H
DCR C
LXI HL,2018H
MOV A,M
BACK: INX HL
CMP M
JNC AHEAD
MOV A,M
AHEAD: DCR C
JNZ BACK
INX HL
MOV M,A
HLT
ORG 2018H
DB 22H,10H,57H,8H,19H

Output:

(Register C decremented once)

(Load data immediately to the address)
(Transfer data from memory to accumulator)
(Increment Register Pair HL)
(Compare Accumulator with data in memory)
(If not carry, jump to AHEAD)
(If carry, Move data from Memory to accumulator)
(Decrement register C again)
(If not zero, jump to BACK)
(If zero, Increment register pair HL)
(Move data from accumulator to memory)

11. Write a program to arrange numbers in ascending order.

MVI B, 09
START: LXI HL, 2000H
MVI C, 09H
BACK: MOV A, M
INX HL
CMP M
JC SKIP
JZ SKIP
MOV D, M
MOV M, A
DCX HL
MOV M, D
INX HL
SKIP: DCR C
JNZ BACK
DCR B
JNZ START
HLT

Output:

(Transfer data immediately to register B)

(Load the data in the register pair from the address)
(Increment the register pair)
(Compare memory data with accumulator)
(If carry, jump to Skip)
(If equal, jump to skip)
(If not carry / equal then move data from memory to D)
(Move data from accumulator to memory)

(Decrement register C)
(If C is not zero jump to BACK loop)
(Else, decrement B)
(If B not zero, jump to START loop)
(End of program)

12. Write a program to arrange numbers in descending order.

MVI B, 09H
START: LXI HL, 2000H
MVI C, 09H
BACK: MOV A,M
INX HL
CMP M
JNC SKIP
JZ SKIP
MOV D,M
MOV M,A
DCX HL
MOV M,D
INX HL
SKIP: DCR C
JNZ BACK
DCR B
JNZ START
HLT

(Move data immediately to register B)

(Load data from address to the register pair)
(Move date from memory to accumulator)
(Increment register pair)
(Compare data in memory with accumulator)
(If smaller, jump to SKIP)
(If equal, jump to SKIP)
(Else move data from memory to register D)
(And again move data from accumulator to memory)
(Decrement register pair)

(If not zero, jump to BACK)

(Else decrement B)
(If not zero, jump to START)
(End of program)

Output:

13. Write a program to add a number in an Array.

MVI C,05H
DCR C
LXI HL,2018H
MOV A,M
BACK: INX HL
ADD M
DCR C
JNZ BACK
HLT

(Move data immediately to register C)

(Decrement register C)
(Load data from HL to the address in the operand)
(Increment register pair HL)
(Add data in memory to accumulator)
(If register C is not zero jump back to BACK)

ORG 2018H
DB 01H,02H,03H,04H,05H

Output:

(Data in the array)