The State-of-the-Art Test

Compression and Test

Response Compaction
Techniques
2008.11.15
2008
Hong-Sik Kim

Contents
Introduction
Test Stimulus Compression
Test Response Compaction
Industrial Practice
Conclusion

Computer Systems & Reliable SoC Lab.

Test Data Increase

Increase in the number of test patterns

Increasing number of embedded IP cores

Increasing number of target fault models for DSM
t h l i
technologies

Transition fault testing requires 3~5 times more test

patterns than stuck at fault testing

Newer chips with more pins and

functionality but older ATE equipment

Less test channels

Not enough ATE memory

Low-cost ATE : reduced pin count test

Keep do
down
n test cost
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Test Data Volume vs Technology

Introduction

Test Dataa Size

Gate Size
Source : Blyler, Wireless System Design, 2001
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Test Quality Improvement for

Nano Technology
Multiple detect

Shown to improve test quality in

200K production run experiment

DFM-oriented test

Extractions from physical

p y
database (such as Calibre)
For example, deterministic bridge
fault model

Timing aware test

Use SDF to test longest paths

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Introduction

Test Data Volume vs Technology

Introduction

Test Dataa Size

Technology
Source : www.elecdesign.com
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Why Test Compression?

Test
Quality
Requirement

180nm

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130nm

90nm

Introduction

Full Scan VS Compressed Scan

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Introduction

Test Data Compression

Advantage

Complete set of ATPG test

patterns can be applied
Compatible with the
convectional
ti
l design
d i
rules
l and
d
test generation flow for scan
testing

Benefits
fi

Reduce amount of test data

Life cycle
y
of older tester with
limited memory is extended

Test time reduces for a given

test data bandwidth

With test compression, larger

number of scan chains can be
used

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Introduction

Test Data Compression

Test (Stimulus) Compression

Code based compression

Code-based
Linear-decompression based scheme
Broadcast scan

Test Response Compaction

Space compaction
Time compaction
Mixed one

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Introduction

 Introduction

Test Stimulus Compression

Test Response Compaction
Industrial Practice
Conclusion

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Categories of TC

Test Stimulus
Compression

Code-based Schemes

Traditional coding algorithm

Entropy coding

Linear-Decompression-based Schemes

Combinational

XOR networks

Sequential (Static/Dynamic)

LFSR reseeding

Broadcast-Scan-Based
Broadcast Scan Based Schemes

Traditional

Scan forest/Illinois scan

R
Reconfigurable
fi
bl

Static/Dynamic

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Code-Based TC

Test Stimulus
Compression

Dictionary coding

fixed to fixed

Huffman coding

fi d tto variable
fixed
i bl

Run-length coding

variable to fixed

Golomb coding

variable to variable

Arithmetic coding

fixed
ed to
o variable
a ab e

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Code-Based TC

Test Stimulus
Compression

Run-length coding based test compression

A.Jas et al, Test Vector Decompression via Cyclic Scan

Chains and its application to Testing Core-Based
Designs,
g , ITC,, 1998

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Code-Based TC

Test Stimulus
Compression

Golomb coding based test compression

A.Chandra et al, System-on-a-Chip Test-Data

Compression and Decompression Architecture Based on
Golomb Codes,
, IEEE Trans. on CAD,, 2001

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Code-Based TC

Test Stimulus
Compression

Dictionary coding

S.M.Reddy et al, On Test Data Volume Reduction for

Multiple Scan Chain Designs, VTS 2002

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Code-Based TC

Test Stimulus
Compression

Selective HC based test compression

A.Jas et al, An Efficient Test Vector Compression

Scheme Using Selective Huffman Coding, IEEE Trans.
on CAD,, 2003

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Linear Decompression Based

Scheme

Test Stimulus
Compression

Compress test data by using linear equation

and
d solver
l
Classification
Cl
ifi
i

Combinational linear de-compressor

Sequential linear de-compressor
de compressor

Fixed length
Variable length

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Linear Decompression Based

Scheme

Test Stimulus
Compression

Compress test data by using linear equation

and
d solver
l

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Linear Decompression Based

Scheme

Test Stimulus
Compression

Compress test data by using linear equation

and
d solver
l

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Linear Decompression Based

Scheme

Test Stimulus
Compression

Compress test data by using linear equation

and
d solver
l

0
1
1
1
1

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X1 X2 X3 X4 X5 X6 X7 X8 X9 X10
0
0
1
0
1
0
1
0
1
0 1 1 1 0 0 0 x x 1

Linear Decompression Based

Scheme

Test Stimulus
Compression

Combinational Linear Decompression

I.Bayraktaroglu
y
g et al,, Concurrent Application
pp
of Compaction
p
and
Compression for Test Time and Data Volume Reduction in Scan
Design, IEEE Trans on Computers, 2003

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Linear Decompression Based

Scheme

Test Stimulus
Compression

LFSR Reseeding Scheme

B.Koenemann,
B
Koenemann LFSR-coded
LFSR coded Test Patterns for Scan
Designs, ETC, 1991
Test Cubes

+
a2

a1

a0

1
0
1

1
x
x

1
x
0

0
x
x

x
0
1

c5

c4

c3

c2

c1

x C2
0 C1
x C0
c0

a0+a1 a0+a1 a0+a2 a2

a1
a0
+a2
a1=1
a0=0
a0+a2=0
a1=1
a0+a1 =1
a2=0
Seed for C0 A system of linear equations
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Linear Decompression Based

Scheme

Test Stimulus
Compression

Ring Generator

G. Mrugalski et al,
G
al Ring
Ring Generators-New
Generators New Devices for
Embedded Test Applications, IEEE Trans. on CAD, 2004

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Linear Decompression Based

Scheme

Test Stimulus
Compression

Variable rank LFSR with BF

Hong-Sik
g
Kim et al,, Increasing
g Encoding
g Efficiency
y of LFSR
Reseeding-based Test Compression, IEEE Trans. on CAD, 2006

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Broadcasting

Test Stimulus
Compression

Concept

Input the same test data to multiple scan chains

Various
V i
TC S
Schemes
h
b
based
d Broadcast
B
d

ILLINOIS scan
Scan forest
Multicast based TC

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Broadcasting

Test Stimulus
Compression

Concept

Input the same test data to multiple scan chains

Force ATPG tool to generate

patterns for broadcast scan

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Broadcasting

Test Stimulus
Compression

ISA (Illinois scan architecture)

I.Hamzaoglu et al, Reducing Test Application Time for

Full Scan Embedded Cores, FTCS, 1999

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Broadcasting

Test Stimulus
Compression

Scan forest

D.Xiang
D
Xiang et al,
al Reconfigured
Reconfigured Scan Forest for Test Application
Cost, Test Data Volume and Test Power Reduction, IEEE
Trans. on Computers, 2007

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Scan forest is
constructed based on
structural analysis
Reduced number of scan
l fd
leaf
decreases the
th
number of XOR gate in
response compactor
Reduce both test data
volume and power
consumption

Broadcasting

Test Stimulus
Compression

Multicast based TC

D.Xiang
D
Xiang et al,
al Reconfigured
Reconfigured Scan Forest for Test Application
Cost, Test Data Volume and Test Power Reduction, IEEE
Trans. on Computers, 2007

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Contents
Introduction
Test Stimulus Compression

Test Response Compaction

Industrial Practice
Conclusion

Computer Systems & Reliable SoC Lab.

31

Categories of TC

Test Response
Compression

Space compaction

Reducing the number of output bit size

Time compaction

Reducing the number of output response patterns

Mixed space and time compaction

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Categories of TC

Test Response
Compression

Space compaction

Reducing the number of output bit size

Time compaction

Reducing the number of output response patterns

Mixed space and time compaction

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Response Compaction Issues

Test Response
Compression

Aliasing problem
X propagation

Manay sources of unknown Xs in output response data

Unmodeled ATPG logics : RAM

RAMs
s, mixed signal logic,
logic black boxes
etc
Uninitialized memory elements (non scaned FFs)
Floating
g tri-states
Multi-cycle paths
Etc

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X propagation Problem

Test Response
Compression

Conventional Scan

Easy
y to handle X values in test response
p
by
y masking
g them on
tester

Logic BIST and test response compaction

Xs corrupt final signature

Prevents observation of other scan cells
Output compression ratios and ATPG results are degreated by
the capture of unknown value

1 1 0 0 1 X 10
0 1 1 0 X 1 0 0
0 1 1 1 0 0 0 X
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M
I
S
R

Handling Xs

Test Response
Compression

X-Bounding (X-blocking)

Insert DFT to p
prevent Xs from p
propagating
p g
g to output
p

X-tolerant compactor

Make compactor resilient to one or several Xs

X s propagated to
the compactor

X-Masking
X Masking

Mask Xs at the input to compactor

Mask data required

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X-Tolerant TRC

Test Response
Compression

X-Compact

S.Mitra et al, X-Compact: An Efficient Response Compaction

Technique IEEE Trans.
Technique,
Trans on CAD,
CAD 2004

Combinational
C
bi ti
l compactor
t
Tolerates one X per scan slice
Detects 1,
1 2,
2 or any odd errors
Corrupted outputs will be masked on tester

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X-Tolerant TRC

Test Response
Compression

X-Canceling

N.A.Touba,X-canceling MISR New Approach for X-Tolerant

Output Compaction,
Compaction ITC,
ITC 2007

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X-Masking TRC

Test Response
Compression

X-Masking

X s can be masked off right before the

Xs
response compactor
Mask data is required to indicate when the
masking should take place
Mask data can be compressed

LFSR reseeding, run-length coding

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X-Masking TRC

Test Response
Compression

Masking compression based on HC

G.Zeng
g et al,, X-tolerant test data compression
p
for SOC
with Enhanced Diagnosis Capability, IEICE IS, 2005

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X-Masking TRC

Test Response
Compression

X-Block

S.Wang
g et al,, X-Block: An Efficient LFSR Reseedingg
based Method to Block Unknowns for Temporal
Compactors, IEEE Trans on Computers, 2008

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Contents
Introduction
Test Stimulus Compression
Test Response Compaction

Industrial Practice
Conclusion

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Mentor Graphics

Industrial
Practice

Embedded Deterministic Test (EDT)

TestKompress
First commercially available on-chip test compression
product

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SynTest

Industrial
Practice

Virtual scan

TestKompress
First commercial product based on the broadcast scan scheme
using combinational logic for pattern decompression

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Synopsys

Industrial
Practice

Adaptive scan

DFTMAX

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Summary of Commercial
Solutions

Industrial
Practice

Industrial Practice

Stimulus
Compression

Response
Compression

EDT (Mentor)

Ring generator

XOR tree

Virtual Scan
(Syntest)

Combinational logic
network (broadcast)

XOR tree

DFTMAX (Synopsys)

Combinational MUX
network (broadcast)

XOR tree

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Conclusion
Test Compression

Effective method to reduce test data volume and test

application time
Good solution for test cost reduction
Easy to implement and capable of producing highquality
lit ttests
t
Part of design flow

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