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Combinatio Nal Logic: Design & Analysis of VLSI System

Combinational logic is digital logic where the output is solely dependent on the present inputs. It has no memory and includes circuits like adders, decoders, and multiplexers. Combinational logic is used to perform Boolean operations on inputs and stored data in computer circuits. Gate design for logic functions is non-trivial as the desired logic expression may not map to a standard gate or the gate could consume excessive power or area. Combinational logic circuits are tested by applying input patterns and comparing outputs to expected outputs. Sequential logic is more difficult to test as the output depends on both inputs and internal state, requiring conversion to combinational networks for testing. A reversible full adder circuit requires at least two garbage outputs.

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0% found this document useful (0 votes)
100 views9 pages

Combinatio Nal Logic: Design & Analysis of VLSI System

Combinational logic is digital logic where the output is solely dependent on the present inputs. It has no memory and includes circuits like adders, decoders, and multiplexers. Combinational logic is used to perform Boolean operations on inputs and stored data in computer circuits. Gate design for logic functions is non-trivial as the desired logic expression may not map to a standard gate or the gate could consume excessive power or area. Combinational logic circuits are tested by applying input patterns and comparing outputs to expected outputs. Sequential logic is more difficult to test as the output depends on both inputs and internal state, requiring conversion to combinational networks for testing. A reversible full adder circuit requires at least two garbage outputs.

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najmun_csedu
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© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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You are on page 1/ 9

COMBINATIO

NAL LOGIC

1/29/2010 Design & Analysis of VLSI System


Combinational Logic

Combinational Logic
COMCINATIONAL LOGIC

Definition of Combinational Logic


In digital circuit theory, combinational logic (sometimes incorrectly referred to as combinatorial
logic) is a type of digital logic which is implemented by Boolean circuits, where the output is a
pure function of the present input only. This is in contrast to sequential logic, in which the
output depends not only on the present input but also on the history of the input. In other
words, sequential logic has memory while combinational logic does not.

Combinational logic is used in computer circuits to do Boolean algebra on input signals and on
stored data. Practical computer circuits normally contain a mixture of combinational and
sequential logic. For example, the part of an Arithmetic Logic Unit, or ALU, that does
mathematical calculations is constructed using combinational logic. Half adder, Full adder, half
subtractor, Full subtractor, Multiplexers, Demultiplexers, Encoders and Decoders are also
made by using combinational logic.

Gate Design
Question1: Why designing gate for logic function is non- trivial?
Answer: designing gate for logic function is non- trivial
Because,
✔ We may not have logic gate in the library for all logic expressions.
✔ A logic expression may map into a gate that consume enough power, area and delay.
Completeness
A set of function (f1, f2, f3……fn ) is complete if every Boolean function can be generated by a
combination of the functions.
NAND & NOR is complete set.
{AND, OR} is not complete.
Transmission gates are not complete.

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Combinational Logic

Static Complementary Gate


✔ Have complementary pull-up & pull down network.
✔ Do not rely on storage charge
✔ Simple, effective & Reliable.

Static complementary Gate Structure

Fig-1:pull-up & pull-down Network

NAND Gate

Fig-2: NAND gate pull-up & pull-down


structure

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Combinational Logic

NOR Gate

Fig-3: NOR gate pull-up & pull-down


structure

AOI Gates

Exercise:
1. X= AB+BC+DE

2. X= (A+B).CD. (E+F)
Solve: I have to draw it using tool and then paste here.

Difference between BJT & MOS

BJT MOS

High Static power dissipation Low Static power dissipation

Low packing density High packing dissipation

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Combinational Logic

Complex structure Simple structure


Faster Slower
Require large Area Require small Area
Implementation of dynamic logic is not Implementation of dynamic logic is permitted
permitted
According to Power speed product, According to power speed product ,MOS is
BJT is not preferable preferable

TESTING

Page 5
Combinational Logic

1/29/201
0 Testing

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Combinational Logic

Functionality Testing
✔ It verifies the function of each component of a circuit.
✔ It is performed when a module is designed.
✔ These tests are usually used early in the design cycle to verify the functionality of circuit.
✔ These tests assert that all the gate in the circuit acting correctly to achieve desire goal.
Manufacturing test

✔ It verifies that every gate & register in the chip functioning correctly.
✔ These tests are used after the chip is manufactured to verify that the silicon is intact.
Different types of manufacturing defeats are:
✔ Layer to layer short
✔ Thin oxide shorts to substrate or wall
✔ Discontinuous wires
Testing with chip

Combinational Logic

Combinational logic is relatively easy to test by applying sets of input signals to the circuit and
comparing the outputs with calculated outputs.

Sequential Logic

Sequential logic is more difficult to test because the output depends on both the present inputs and
the internal state of the network. So, to test the sequential network, it must be converted into
combinational networks.

PLA Testing

Question Solving

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Combinational Logic

1. Define Logic Synthesis

Answer:
Logic Synthesis
In electronics, logic synthesis is a process by which an abstract form of desired circuit behavior
(typically register transfer level (RTL)) is turned into a design implementation in terms of logic
gates.
Common examples of this process include synthesis of HDLs, including VHDL and Verilog.
Some tools can generate bit streams for programmable logic devices such as PALs
(Programmable Array Logic) or FPGAs (field-programmable gate array), while others target the
creation of ASICs (Application-specific integrated circuit).
Logic synthesis is one aspect of electronic design automation.
Essential prime implicant
A product term is essential prime implecant of F if there is a min term that is only covered by
that prime implecant.
The minimal sum-of-products form of F must include all the essential prime applicants of F.

Theorem: If a minterm mj of F and all its adjacent minterms are covered by


a single term pi, then pi is an essential prime implicant of F.
Question3
What is the limitation of reversible logic? Prove that at least two garb age output will generate
to realize a reversible full adder circuit?
Answer:

Theorem: A reversible full-adder circuit can be realized with at least two garbage
outputs.
Prove:

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Combinational Logic

Input Section Output Section

A B Cin Sum(S) Cout


0 0 1 1 0
0 1 0 1 0
1 0 0 1 0

Input Section Output Section

A B Cin Sum(S) Cout G1


0 0 1 1 0 0
0 1 0 1 0 0
1 0 0 1 0 1

Input Section Output Section

A B Cin Sum(S) Cout G1 G2


0 0 1 1 0 0 0
0 1 0 1 0 0 1

From the truth table above we can say that ,a reversible full adder circuit need at least two
garbage output.(proved)

Page 9

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