Combinatio Nal Logic: Design & Analysis of VLSI System
Combinatio Nal Logic: Design & Analysis of VLSI System
NAL LOGIC
Combinational Logic
COMCINATIONAL LOGIC
Combinational logic is used in computer circuits to do Boolean algebra on input signals and on
stored data. Practical computer circuits normally contain a mixture of combinational and
sequential logic. For example, the part of an Arithmetic Logic Unit, or ALU, that does
mathematical calculations is constructed using combinational logic. Half adder, Full adder, half
subtractor, Full subtractor, Multiplexers, Demultiplexers, Encoders and Decoders are also
made by using combinational logic.
Gate Design
Question1: Why designing gate for logic function is non- trivial?
Answer: designing gate for logic function is non- trivial
Because,
✔ We may not have logic gate in the library for all logic expressions.
✔ A logic expression may map into a gate that consume enough power, area and delay.
Completeness
A set of function (f1, f2, f3……fn ) is complete if every Boolean function can be generated by a
combination of the functions.
NAND & NOR is complete set.
{AND, OR} is not complete.
Transmission gates are not complete.
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NAND Gate
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NOR Gate
AOI Gates
Exercise:
1. X= AB+BC+DE
2. X= (A+B).CD. (E+F)
Solve: I have to draw it using tool and then paste here.
BJT MOS
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TESTING
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0 Testing
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Functionality Testing
✔ It verifies the function of each component of a circuit.
✔ It is performed when a module is designed.
✔ These tests are usually used early in the design cycle to verify the functionality of circuit.
✔ These tests assert that all the gate in the circuit acting correctly to achieve desire goal.
Manufacturing test
✔ It verifies that every gate & register in the chip functioning correctly.
✔ These tests are used after the chip is manufactured to verify that the silicon is intact.
Different types of manufacturing defeats are:
✔ Layer to layer short
✔ Thin oxide shorts to substrate or wall
✔ Discontinuous wires
Testing with chip
Combinational Logic
Combinational logic is relatively easy to test by applying sets of input signals to the circuit and
comparing the outputs with calculated outputs.
Sequential Logic
Sequential logic is more difficult to test because the output depends on both the present inputs and
the internal state of the network. So, to test the sequential network, it must be converted into
combinational networks.
PLA Testing
Question Solving
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Answer:
Logic Synthesis
In electronics, logic synthesis is a process by which an abstract form of desired circuit behavior
(typically register transfer level (RTL)) is turned into a design implementation in terms of logic
gates.
Common examples of this process include synthesis of HDLs, including VHDL and Verilog.
Some tools can generate bit streams for programmable logic devices such as PALs
(Programmable Array Logic) or FPGAs (field-programmable gate array), while others target the
creation of ASICs (Application-specific integrated circuit).
Logic synthesis is one aspect of electronic design automation.
Essential prime implicant
A product term is essential prime implecant of F if there is a min term that is only covered by
that prime implecant.
The minimal sum-of-products form of F must include all the essential prime applicants of F.
Theorem: A reversible full-adder circuit can be realized with at least two garbage
outputs.
Prove:
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From the truth table above we can say that ,a reversible full adder circuit need at least two
garbage output.(proved)
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