M ATACDC 1.

0
Users Manual
Jef Beerten
University of Leuven (KU Leuven)
Dept. Electrical Engineering (ESAT), Division ELECTA

July 4, 2012

Copyright 2012 Jef Beerten

All Rights Reserved.
www.esat.kuleuven.be/electa/teaching/matacdc/

Contents
Contents
1 Introduction
1.1 License . . . . . . . . . . . . . . . . .
1.2 Citing M ATACDC . . . . . . . . . . .
2 Getting started
2.1 Installation . . . . . . . . . . . . . . .
2.2 Running a simulation . . . . . . . . .
2.3 Changing the input data . . . . . . .
2.4 Using the results . . . . . . . . . . . .
2.5 Power flow options . . . . . . . . . .
3 System Input Data Format
3.1 AC/DC System . . . . . . . . . . . . .
3.2 AC/DC System Data Representation
3.3 Bus renumbering . . . . . . . . . . .
4 Modeling
4.1 Converters . . . . . . . . . . . . . . .
4.2 DC System modelling . . . . . . . . .
5 Sequential AC/DC Power Flow
5.1 AC System Power Flow . . . . . . . .
5.2 DC grid power flow . . . . . . . . . .
5.3 DC slack and droop buses iteration .
6 Examples
6.1 Stagg 5-node test system . . . . . . .
6.2 RTS1996 test system . . . . . . . . . .
Bibliography

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1 Introduction
M ATACDC is a free M ATLAB based open source program for AC/DC power flow analysis. The
program uses a sequential AC/DC power flow algorithm and can be used to simulate interconnected
AC systems and Multi-terminal Voltage Source Converter High Voltage Direct Current (VSC HVDC)
systems. With respect to the AC system power flow, the program completely relies on M ATPOWER,
a power flow and optimal power flow program in M ATLAB [1]. The AC/DC power flow problem is
solved sequentially, meaning that the program solves the AC/DC power flow by iterating between the
AC systems and the DC systems. Doing so, the DC system quantities remain unaltered during the AC
system power flow, and vice versa. The package has been fully integrated with the existing AC power
flow routines developed in M ATPOWER, while keeping the M ATPOWER original source code unaltered.
M ATACDC shares the same philosophy as M ATPOWER and M AT DYN [2, 3]: "It is intended as a
simulation tool for researchers and educators that is easy to use and modify." [4]. The source code
of M ATACDC is available [5]. The code is well documented, structured and easy to understand and
modify.

1.1 License
M ATACDC is free and open source software.
M ATACDC may be modified for personal use provided this license remains in force.
M ATACDC comes with no warranty whatsoever; not even the implied warranty of merchantability or fitness for a particular purpose.
Any publications derived from the use of M ATACDC must acknowledge M ATACDC.
M ATACDC may not be redistributed without prior written permission.
Modified versions of M ATACDC, or works derived from M ATACDC, may not be distributed
without prior written permission.

1.2 Citing M ATACDC

It is requested that publications using M ATACDC explicitly acknowledge this by including a reference
to the M ATACDC-website. www.esat.kuleuven.be/electa/teaching/matacdc/

2 Getting started
This chapter briefly describes how to install MatACDC, how to run a simulation, change the input
data and access the results. This chapter is merely intended for a first understanding of how to start
working with the software. The different functions and components are explained in more detail in
the subsequent chapters and can be accessed in M ATLAB using the help command line.

2.1 Installation
In order to run the M ATACDC files, it is required to have the following programs installed on your
computer:
M ATLAB must be installed
The open source power program M ATPOWER must be installed and added to the M ATLAB path.
M ATPOWER is available at http://www.pserc.cornell.edu/matpower/. Please consult the
M ATPOWER manual for more info on how to install the latest stable version of the program.
M ATACDC has been tested with the latest stable version M ATPOWER 4.1.
M ATACDC must be installed1 , and preferably added to the M ATLAB path. It is also advised to
add the sub-directories .../Cases/PowerflowAC and .../Cases/PowerflowDC to the path.
To check whether all program components are installed correctly, you can run the test_acdcpf.m
file.

2.2 Running a simulation

The M ATACDC power flow routine is started by the command runacdcpf:

>> runacdcpf(...);
The runacdcpf command needs two types of input data: The M ATPOWER AC power flow data and
the M ATACDC DC system data.

>> runacdcpf(case5_stagg,case5_stagg_MTDCslack);

2.3 Changing the input data

Similar to using the loadcase command with a M ATPOWER case file, the dc power flow data can be
loaded into a struct with the loadcasedc command.

>> mpcdc = loadcasedc(casefiledc);

It is also possible to load the individual data matrices by using
1 M ATACDC is available at www.esat.kuleuven.be/electa/teaching/matacdc/

>> [basemvaac, basemvadc, pol, busdc, convdc, branchdc] = loadcasedc(casefiledc);

By loading the input files first, it is possible to change the data:

>>
>>
>>
>>

define_constantsdc;
mpcdc = loadcasedc(case5_stagg_MTDCslack);
mpcdc.convdc(3,CONVTYPE_AC) = PVC;
runacdcpf(case5_stagg,mpcdc);

Similar to the define_constants script in M ATPOWER, define_constantsdc loads the names of

the column indices of the data matrices busdc, convdc and branchdc. In the example above, the
third converter in the case5_stagg_MTDCslack file is changed to AC voltage control before starting
the AC/DC power flow simulation.

2.4 Using the results

The results can be easily accessed after the AC/DC power flow:

>> [resultsac, resultsdc] = runacdcpf(casefileac,casefiledc);

The data struct resultsac contains all AC power flow results, and uses the standard M ATPOWER
data struct format, limited to the fields baseMVA, bus, gen and branch. The data struct resultsdc
contains all DC power flow data.
Similarly to changing the input files in the example in the previous section, one can access the
individual data elements using the named column indices:

>> define_constantsdc;
>> [mpc, mpcdc] = runacdcpf(case5_stagg,case5_stagg_MTDCslack);
>> Vdc = mpcdc.busdc(:,VDC);
In this example, the voltages at the different DC buses are stored in the vector Vdc.

2.5 Power flow options

When using the command lines from the previous sections, M ATACDC uses the default program
options. It is also possible to run a power flow with altered program settings.

>> [resultsac, resultsdc] = runacdcpf(casefileac,casefiledc,optionsdc);

The command macdcoption is used to define the default program options. The indices of the
resulting option vector are defined in the file and can be easily accessed using the help command.

>> opt = macdcoption;

>> opt(10) = 1;
% enforce converter current and voltage limits
>> runacdcpf(case5_stagg,case5_stagg_MTDCslack,opt);
5

In this example, the converter limits are enforced during the power flow. As a result, the reactive
power limit in converter 1 is hit and the converter control is changed from AC voltage control to
constant Q injection.

3 System Input Data Format

This chapter introduces the hybrid AC/DC system from a conceptual point of view and discusses the
DC system input format. The AC system data input format is the standard M ATPOWER format. The
DC system data is divided into three matrices: busdc, convdc and branchdc. This chapter discusses
the DC system in terms of these three matrices and in terms of the AC/DC system interconnections.
For more details on the modeling of the system itself, the reader is referred to chapter 4.

3.1 AC/DC System

In general, a hybrid AC/DC system can have a structure similar to the one depicted in Fig. 2. For
convenience, the AC and DC bus numbers forming the interconnections to respectively the DC and
the AC network have been sequentially numbered, starting from 1. Neither the AC nor DC systems
1
AC 1

1
2

DC 1

AC 2

4 3

1 AC 3

1 DC 2

1 AC 4

Figure 1: Interconnected AC/DC System

has to be limited to these interconnected buses. In this example, AC systems 3 and 4 only share one
converter with respectively DC grids 1 and 2. These systems can represent relatively small systems
e.g. island systems or (offshore) wind farms connected to the offshore systems, but they can also
represent larger AC systems that only have 1 interconnection with the other AC systems in the grid.

3.2 AC/DC System Data Representation

M ATACDC uses three distinctive data matrices to store the information on the DC system and the
interconnection with the AC system. The choice of these three data matrices is in analogy with the
subdivision in the bus, gen and branch matrices in AC power flow. Fig. 2 represents this subdivision.
The three data matrices are:
busdc matrix: Contains all DC bus data (e.g. bus numbers, active power withdrawals, voltages,
...)
convdc matrix: Contains all converter station data (e.g. loss data, impedance values, status,
control modes, ...)
branchdc matrix: Contains all DC branch data (e.g. line resistance, bus numbers, ...)
7

AC

DC

convdc busdc branchdc

Figure 2: AC/DC System Implementation: Conceptual representation

This flexible definition of the DC system allows a generalized implementation of DC systems with
multiple connections to different AC power systems as well as DC buses without connections to the
AC system.

3.2.1 DC bus matrix

The different indices of the DC bus matrix busdc are given in Tab. 1.
Table 1: busdc data format
Index
1
2

NAME

Description

BUSDC_I
BUSAC_I

DC bus number
Corresponding AC bus number
Note: Index BUSAC_I = 0 indicates no AC bus connection

3
4
5
6
7
8
9

GRIDDC
PDC
VDC
BASE_KVDC
VDCMAX
VDCMIN
CDC

DC grid to which the DC bus is connected

P d c , power withdrawn from the DC grid (MW)
Ud c , DC voltage (p.u.)
base DC voltage (kV)
maximum DC voltage (p.u.)
minimum DC voltage (p.u.)
C d c , DC bus capacitor size (p.u.) (not used in power flow)

Each DC bus can either have a corresponding AC bus or can not be connected to the AC system, as
shown in Fig. 3. This example shows a topology similar to the one from Fig. 2, but with an arbitrary
AC bus numbering and a consecutive DC bus numbering in the two DC systems. The system also
includes a DC bus without a connection to the AC grid (DC bus 7).

12

15

17

20

24

Figure 3: DC system bus numbering: example

The representation of the AC bus numbers, DC bus numbers and the DC grid index in the busdc
matrix for this example is given by
%%
busdc_i busac_i griddc . . .
busdc = [
1
2
1
...;
2
5
1
...;
3
9
1
...;
4
15
1
...;
5
17
1
...;
6
20
1
...;
7
0
1
...;
8
12
2
...;
9
24
2
. . . ;] ;
The BUSAC_I = 0 indicates that their is no corresponding AC bus in any of the AC systems.
The AC buses can be interconnected by the same AC grid, or can alternatively be part of multiple nonsynchronized zones. This can be accomplished by selecting different ZONE values in the M ATPOWER
bus matrix.

3.2.2 DC converter matrix

The different indices of the DC converter matrix convdc are given in Tab. 2. This convdc matrix
contains all converter station data, such as losses, impedance values, status, control modes. More
details on the different control options, the input- and the output data and the modelling can be
found in chapter 4.

Table 2: convdc data format

Index NAME
Description
Converter buses, control parameters and AC system data
1 CONV_BUS
converter bus number (DC bus numbering)
2 CONVTYPE_DC DC bus type (1 = constant power, 2 = DC slack, 3 = DC droop)
3 CONVTYPE_AC AC bus type (1 = PQ, 2 = PV)
4 PCONV
P s , active power injected in the AC grid (MW)
9

Table 2: convdc data format (continued)

Index NAME
5 QCONV
6 VCONV
Impedance values
7 RTF
8 XTF
9 BF
10 RCONV
11 XCONV

Description
Q s , reactive power injected in the AC grid (MVAr)
U r e f , target voltage of converter connected AC bus (p.u.)
R t f , transformer resistance (p.u.)
X t f , transformer reactance (p.u.)
B f , filter susceptance (p.u.)
R c , phase reactor resistance (p.u.)
X c , phase reactor reactance (p.u.)

12 BASEKVC
converter AC base voltage (kV)
13 VCMAX
Uc,max , maximum converter voltage magnitude (p.u.)
14 VCMIN
Uc,mi n , minimum converter voltage magnitude (p.u.)
15 ICMAX
I max , maximum converter current (p.u.)
16 CONVSTATUS
converter status (1 = on, 0 = off)
Converter loss data
17 LOSSA
a, constant loss coefficient (MW)
18 LOSSB
b, linear loss coefficient (kV)
19 LOSSCR
c r ec , rectifier quadratic loss coefficient ()
20 LOSSCI
c i nv , inverter quadratic loss coefficient ()
DC voltage droop constants (optional)
21 DROOP
k, DC voltage droop (MW/p.u)
22 PDCSET
P d c,set , voltage droop power set-point (MW)
23 VDCSET
Ud c,set , voltage droop voltage set-point (p.u.)
24 DVDCSET
Ud c,set voltage droop deadband (p.u.) (optional)
Columns typically added after the power flow
25 VMC
Uc , converter voltage magnitude (p.u.)
26 VAC
c , converter voltage angle (degrees)
27 PCCONV
P c , active power generated by the converter (MW)
28 QCCONV
Q c , reactive power generated by the converter (MVAr)
29 PCLOSS
P l oss , active converter power losses (MW)
30 VMF
U f , filter voltage magnitude (p.u.)
31 VAF
f , filter voltage angle (degrees)
32 PFIL
P s f or P c f , active power at filter bus (MW)
33 QCONVF
Q s f , reactive power through transformer at filter bus (MVAr)
34 QCCONVF
Q c f , reactive power through reactor at filter bus (MVAr)

The CONV_BUS numbering corresponds to the BUSDC_I numbers defined in the busdc matrix.
The effect of a converter outage on the power flows in the AC/DC system can easily be adressed by
changing the CONVSTATUS flag from 1 to 0. Internally, M ATACDC handles DC buses without an AC
connection differently from buses with a connection. For more information, please consult section
3.3.
10

Additionally, a number of named indices are defined for CONVTYPE_DC and CONVTYPE_AC, depending
on the type of control. These are summarized in Tab. 3.
Table 3: convdc named constants
Index

NAME

Description

CONVTYPE_DC constants
3 DCDROOP
DC voltage droop
2 DCSLACK
DC slack bus
1 DCNOSLACK constant active power bus
CONVTYPE_AC constants
2 PVC
constant voltage converter control
1 PQC
constant reactive power converter control

3.2.3 DC branch matrix

The different indices of the DC branch matrix branchdc are given in Tab. 4. Similar to a converter, a
branch outage can be studied by having BRDC_STATUS equal to 0. In the DC system power flow, the
only line parameters taken into account are R d ci j , the resistances of the lines.
Table 4: busdc data format
Index
1
2
3
4
5
6
7
8
9

NAME

Description

F_BUSDC
T_BUSDC
BRDC_R
BRDC_L
BRDC_C
RATEDC_A
RATEDC_B
RATEDC_C
BRDC_STATUS

i , from bus number

j , to bus number
R d ci j , resistance (p.u.)
L d ci j , inductance (p.u./s) (not used in power flow)
C d ci j , total line charging capacity (p.u.*s) (not used in power flow)
rateA, MVA rating A (long term rating, not used)
rateB, MVA rating B (short term rating, not used)
rateC, MVA rating C (emergency rating, not used)
initial branch status, (1 - in service, 0 - out of service)

Columns typically added after the power flow

10

PFDC

P d ci j , real power injected at "from" bus end (MW)

11

PTDC

P d c j i , real power injected at "to" bus end (MW)

3.3 Bus renumbering

To allow a maximum flexibility towards the end user, the program allows having an arbitrary DC
bus number associated with any AC bus number. Internally, the bus indices are redefined so that
AC and DC buses that are interconnected have the same bus numbers as the double numbering
11

hampers a straight-forward implementation of the power flow algorithm. The M ATACDC functions
ext2intdc and ext2intac are used to redefine the bus numbers. Similarly, the functions int2extac
and int2extdc are used to convert the internal bus data to the external bus numbers.
Before renumbering the buses, converters facing an outage are treated similar to existing DC
buses without a connection to the AC system by using the function convout. The function sets
BUSAC_I = 0 in busdc for the converters that have CONVSTATUS = 0 flag, and also splits the converter matrix into operational and non-operational converters. Similarly, the functions brchdcout
and brchout remove the non-operational DC and AC branches from the analysis.

AC

DC
1

AC 1
i
i +1
..
.
m

..
.

2
..
.

=
..
.

j +1
..
.

p
..
.
v

DC 1

..
.

AC i

AC y

..
.

=
..
.

q
..
.

DC x

Figure 4: External AC/DC System interconnections.

Fig. 4 shows the generalized case the interconnection of y AC grids with a total of v buses and x DC
grids with a total of w buses. Without lack of generality, we assume the last AC bus v to be connected
to the x-th DC grid. With v > w, there are v w AC buses without a connection to a DC grid. The
DC buses have been numbered in a logical order for convenience, although the algorithm does not
impose any restrictions to the numbering of the DC buses as such. Each DC grid can have an arbitrary
number of converter-connected DC buses, as well as DC buses without an AC interconnection (e.g.
DC bus 2 in grid 1) and DC buses facing a converter outage (e.g. DC bus j in grid 1). Similarly, each AC
bus can either have a connection to the DC system, or can be an AC bus without an interconnection.
The M ATACDC bus numbering, allowing for different indices for AC and DC buses result in a maximum flexibility for the user to enter the different grid layouts in the power flow algorithm. After a per
unit conversion of the AC and DC grid quantities, and the removal of converters and branches facing
an outage, the overall sorting performed by the functions ext2intdc and ext2intac leads to the
result in Fig. 5.
The DC buses are generally not consecutively numbered, contrary to what was shown in 4 for
12

AC

DC
1
..
.
k
i
..
.
n

=
..
.

1
..
.

j
..
.
n

=
..
.

..
.
q
..
.
w
..
.
v

DC 1

..
.

=
..
.

q
..
.
w

DC x

Figure 5: Internal AC/DC System interconnections after bus renumbering.

convenience. After renumbering the DC buses and sorting them per DC grid, the algorithm groups
converter-connected DC buses and renames their AC buses correspondingly, e.g. buses 1 to k for the
first DC grid in Fig. 5. This is done by the function ext2intdc.
Thereafter, arbitrary AC buses without DC connections are assigned to the DC buses without an AC
connection, e.g. buses k + 1 to n in Fig. 5. This is done by the function ext2intac. All converter
outages are considered equally to DC buses without a converter. The renumbering allows an easy
and straightforward access to both AC grid and DC grid variables during the power flow without
compromising the flexibility of the user interface.
As indicated in Fig. 5, M ATACDC does not take the AC zones into account when resorting the
AC/DC system, as M ATPOWER internally sorts the buses for each AC zone when an AC power flow is
performed.

13

4 Modeling
This chapter introduces the modeling of the AC/DC system, from the software users perspective.
while linking the models to the implementation in M ATACDC and to the DC system data matrices
defined in chapter 3. For more details on the modeling itself, the reader is referred to [6], [7].

4.1 Converters
A general representation of a VSC HVDC converter station, showing the different components is
depicted in Fig. 6. As seen from the AC point of common coupling (PCC), the different components
Pd c
Phase
reactor S c

Ss

Filter
Converter

Figure 6: VSC HVDC converter station.

are [6]:
the converter transformer
the AC filters
the phase reactor
the converter

4.1.1 AC side model

In the most general format, the AC side of the converter is represented as depicted in Fig.7. The

Ss

Ss f
Ztf

Sc f
Uf

Us
Qf

Sc
Zc

Bf

Uc

Figure 7: Equivalent single phase power flow model of a converter station connected to the AC grid.
model consists of a controllable voltage source U c =Uc c behind the phase reactor, represented as
a complex impedance Z c = R c + X c . The low pass filter from Fig. 6 is represented as a susceptance
14

B f at system frequencies. A transformer connects the filter bus to the AC grid and is represented by
its complex impedance Z t f = R t f + X t f . The equations for active and reactive power at the grid side
in terms of the complex voltages are
P s =U s2G t f +U s U f [G t f cos(s f )+B t f sin(s f )],
Qs =

U s2 B t f

+U s U f [G t f sin(s f )B t f cos(s f )],

(1)
(2)

with U s = U s s and U f = U f f respectively the complex grid side and filter bus voltage. The
equations at the converter side are
P c = Uc2G c U f Uc [G c cos( f c )B c sin( f c )],

(3)

Q c = Uc2 B c

(4)

+U f Uc [G c sin( f c )+B c cos( f c )],

The reactive power at the filter is given by

Q f = U f2 B f ,

(5)

while the expressions for the filter side complex power flowing through the transformer are written as
P s f = U f2G t f U f U s [G t f cos(s f )B t f sin(s f )],

(6)

Q s f =U f2 B t f

(7)

+U f U s [G t f sin(s f )+B t f cos(s f )],

and those flowing through the phase reactor side are

P c f =U f2G c +U f Uc [G c cos( f c )+B c sin( f c )],
Qc f =

U f2 B c +U f Uc [G c sin( f

c )B c cos( f c )].

(8)
(9)

In this case, the user has to specify values for R t f , X t f , B f , R c and X c . In M ATACDC, both the
transformer impedance Z t f and the filter susceptance B f can be omitted, leading to the different
situations depicted in Fig. 8. Similarly, it is equally possible to only omit R t f and/or R c .
Depending on the parameters specified by the user, the M ATACDC implementation corresponds
to one of the situations depicted in Figs. 7 8. These implementations can be considered in the
following situations:
No filter (B f = 0):
Omitting filters
Filterless design: Multilevel (modular) converter topologies. Contrary to earlier 2- or 3level converter topologies using Pulse Width Modulation (PWM), the latest converter
configurations synthesize the AC voltage waveform using a multilevel converter and do
not require low-pass AC filters.
No transformer (Z t f = 0):
Transformerless design
No filter, no transformer (B f = 0 & Z t f = 0):
15

Ss

Ss f
Ztf

Sc f

Sc
Zc

Uf

Us

Uc

(a) no filter

Ss

Sc

Ss

Zc

Zc

Sc

Us

Us
Bf

Uc

Uc

(b) no transformer

(c) no filter, no transformer

Figure 8: Single phase model of a converter station, (a) omitting the filter, (b) omitting the transformer
and (c) omitting both filter and transformer.

Transformerless and filterless design

Simplified model of converter: voltage source behind a complex impedance (or pure
inductive impedance when omitting R c ).
The different converter parameters R t f , X t f , B f , R c and X c are respectively defined as the named
indices RTF, XTF, BF, RCONV and XCONV in the convdc input matrix (see chapter 3). Depending on the
input data defined, M ATACDC automatically selects one of the corresponding representations from
Fig. 8.

4.1.2 Converter losses

Converter losses can be taken into account using a generalized loss formula quadratically depending
on the converter current I c [8]:
P l oss = a + b I c + c I c2 .
(10)
The loss coefficients are defined as the named indices LOSSA, LOSSB, and LOSSCR and LOSSI in the
convdc matrix. A distinction can be made for the quadratic term in rectifier and inverter mode.

4.1.3 Converter control

Each converter can exhibit a number of different control functions. Due to the decoupled current
control, the active and reactive power can be controlled independently. The different actual control
options correspond to the steady-state representations used in M ATACDC. The software includes
3 different converter representations with respect to the active power and 2 different converter
representations with respect to the reactive power.
16

Fig. 9 shows the P U steady-state characteristics for the three control options.
Ud c

Ud c

ud c

Udc

Ud c,0

Ud c,0

kd c

P
P0

(a) P constant

(b) Ud c constant

(c) P Ud c droop

Figure 9: Converter steady-state operation characteristics.

The active power operating mode can be changed using convdc index CONVTYPE_DC and the named
constants from Tab. 3. The corresponding steady state representations are defined in M ATACDC as
follows:
1. P constant: The converter has a constant active power injection P s into the AC grid.

convdc(..., CONVTYPE_DC) = DCNOSLACK;

%% set to active power control

convdc(..., PCONV) = ...;

%% active power set-point P s

2. Ud c constant: The converter controls the DC bus voltage Ud c at the converter terminal to a
constant value, irrespective of the active power signal.

convdc(..., CONVTYPE_DC) = DCSLACK;

%% set to dc voltage control

busdc( ..., VDC) = ...;

%% dc voltage set-point Udc

3. P Ud c droop: The active power injection into the DC grid P d c depends on the actual value of
the DC bus voltage Ud c . The droop control has set-points for voltage and power, respectively
Ud c,0 and P d c,0 , has a variable voltage droop k d c and can include a symmetric voltage deadband
Ud c,0 as depicted in Fig. 9c.

convdc(..., CONVTYPE_DC) = DCDROOP;

convdc(..., DROOP

) = ...;

%% set to dc voltage droop control

%% voltage droop kd c

convdc(..., PDCSET ) = ...;

%% voltage droop power set-point P d c,0

convdc(..., VDCSET ) = ...;

%% voltage droop voltage set-point Ud c,0

convdc(..., DVDCSET) = ...;

%% voltage droop deadband Ud c,0

The reactive power operating mode can be changed using convdc index CONVTYPE_AC and the named
constants from Tab. 3. The converter can be represented in M ATACDC as:
17

1. Q constant: The converter has a constant reactive power injection Q s into the AC grid.

convdc(...,CONVTYPE_AC) = PQC;

%% set to reactive power control

convdc(..., QCONV) = ...;

%% reactive power set point Q s

2. U constant: The converter adapts the reactive power injection to obtain a constant AC bus
voltage magnitude U s .

convdc(...,CONVTYPE_AC)=PVC;

%% set to ac voltage control

%% AC voltage set point U s

convdc(..., VCONV) = ...;

4.1.3.1 Case study: One DC voltage controller

In existing point-to-point VSC HVDC systems, it is common practice to have only one converter at
the time controlling the DC voltage. The other converter is defined as constant power controller. In
the case5_stagg_HVDCptp file, a two-terminal DC system is defined with

%%
busdc_i
convdc = [ 1
2

type_dc type_ac
1
1
2
2

P_g
-60
0

Q_g
-40
0

Vtar
1
1

...
...;
...; ];

In this case, the first converter is under active power control and will be represented in the power
flow algorithm as a constant P converter. The second converter, on the other hand, is the DC slack
converter (constant Ud c control) and changes the active power to keep its DC bus voltage constant.
Similarly, the reactive power for converter 2 is unknown prior to the power flow, as this converter is
set to constant AC voltage control.
Solving the power flow leads to the results for the active and reactive power:

>> define_constantsdc;
>> [mpc, mpcdc] = runacdcpf(case5_stagg,case5_stagg_HVDCptp);
>> mpcdc.convdc(:,[PCONV QCONV]) =
-60.0000 -40.0000
56.4959
0.0041
Please remark that the reactive power control can be set independently at each converter, whereas
the active power settings are not independent.
4.1.3.2 Case study: Voltage droop control
As discussed in chapter 6, the effect of the converter control on the power flows in the system can be
easily analyzed. This can be observed when using the casedc files case5_stagg_MTDCslack and
case5_stagg_MTDCdroop for a power flow calculation.
The results for the constant power and constant DC voltage control are obtained using:

>> runacdcpf(case5_stagg,case5_stagg_MTDCslack);
18

The results for the DC voltage droop control are obtained using:

>> runacdcpf(case5_stagg,case5_stagg_MTDCdroop);
Both files lead to similar results, since the droop set-points in case5_stagg_MTDCdroop have been
defined based on the power flow results from case5_stagg_MTDCslack. When, however, a converter
outage is simulated, it can be observed that the power injections at all converters are reduced as a
result of the droop control action.
The results for the constant power and constant DC voltage control are obtained using:

>>
>>
>>
>>

define_constantsdc;
mpcdc = loadcasedc(case5_stagg_MTDCslack);
mpcdc.convdc(3,CONVSTATUS) = 0;
%% outage of converter 3
runacdcpf(case5_stagg, mpcdc);

The results for the DC voltage droop control are obtained using:

>>
>>
>>
>>

define_constantsdc;
mpcdc = loadcasedc(case5_stagg_MTDCdroop);
mpcdc.convdc(3,CONVSTATUS) = 0;
%% outage of converter 3
runacdcpf(case5_stagg, mpcdc);

4.1.4 Converter limits

M ATACDC allows to include converter current and voltage limits. Fig. 10 depicts the PQ capability
chart of the converter and the limits included in M ATACDC. The full lines include the effect of the

Reactive power, Qs (p.u.)

0.5

0.5

1
1

0.5

0.5

Active power, Ps (p.u.)

Figure 10: PQ-capability chart Converter station current and voltage limits

filters, the dotted lines neglect the filters. The gray circle forms the converter current limit. The
black arcs depict the upper and lower converter voltage limits. When a converter set-point is located
outside of the converter limits, M ATACDC prioritizes active over reactive power when enforcing the
limits.
More details on the modelling of the converter limits can be found in [6].
19

4.1.4.1 Enabling/disabling converter limits

The converter upper and lower voltage limits and the converter current limit are defined in the
convdc matrix in respectively the VCMAX, VCMIN and ICMAX index and can be easily changed:

>> define_constantsdc;
>> mpcdc = loadcasedc(case5_stagg_MTDCslack);
>> mpcdc.convdc(3,ICMAX) = 1.1; %% change current limit in converter 3
By default, the converter limits are not enforced. The limits can be enabled by changing index LIMAC
of the default option vector defined in macdcoption:

>> opt = macdcoption;

>> opt(10) = 1; % LIMAC, enforce converter current and voltage limits
>> runacdcpf(case5_stagg,case5_stagg_MTDCslack,opt);
As a result, the reactive power at converter 1 is lowered.
When the limits are enabled by the user, the following situations may occur
When an active power controlling converter has an active power set-point outside of the PQ
capability chart, the active power order is reduced to comply with the most stringent limit.
When a DC voltage droop controlling converter hits a limit, the converter is set to a constant
active power injection equal to at the maximum converter active power limit.
Similarly, when a reactive power controlling converter has a reactive power set-point outside
of the PQ capability chart, the reactive power order is reduced to comply with the most stringent
limit, provided that no active power limit is hit. If, on the other hand, this is the case, the active
power is prioritized when enforcing the limits.
When an AC voltage controlling converter hits a reactive power limit, the converter is set to
a constant reactive power injection determined by the most stringent limit. Similarly to the
previous case, active power control is prioritized when the active power limit is violated.
DC slack converters (converters with a constant Ud c control) are excluded from the analysis, but
are checked at the end of the power flow calculation. It is up to the user to redefine the converter
set-points when it is observed that a limit is hit in those converters.
As an example, it is possible to change the active power set-point of converter 1, so that at the same
time, the reactive and active power limit are violated:

>> define_constantsdc;
>> opt = macdcoption;
>>opt(10) = 1; % enforce converter current and voltage limits
>> mpcdc = loadcasedc(case5_stagg_MTDCslack);
>> mpcdc.convdc(1,PCONV) = -130;
>> runacdcpf(case5_stagg,mpcdc,opt);
20

4.1.4.2 Visualization
It is also possible to visualize the converter limit violations, by enabling index CONVPLOTOPT. The
three possible options are
0 - do not plot converter limit violations
1 - plot only converter limit violations
2 - plot converter limit violations and end situation
A graph similar to the one in Fig. 10 is plotted, showing the operational point with and without limit
inclusion.

>>
>>
>>
>>

opt = macdcoption;
opt(10) = 1; % LIMAC, enforce converter current and voltage limits
opt(14) = 1; % CONVPLOTOPT, plot converter limit violations
runacdcpf(case5_stagg,case5_stagg_MTDCslack,opt);

4.2 DC System modelling

Under steady-state conditions, the DC networks can be represented by a resistive network with
current injections and DC voltages at the different nodes, as depicted in Fig. 11 for the example from
Fig. 3.
Ud c1
I d c1

Ud c4
R d c17
Ud c7

I d c4
R d c47
R d c57

I d c2

Ud c5

R d c27

Ud c2

I d c5
R d c56

I d c3

R d c36

Ud c3
Ud c8

I d c6
Ud c6

R d c89

I d c8

Ud c9
I d c9

Figure 11: DC network modeling: example

21

The current injected at a DC node i can be written as the current flowing to the other n 1 nodes in
the network:
I d ci =

n
X

Yd ci j (Ud ci Ud c j ),

(11)

j =1
j 6=i

with Yd ci j equal to 1/R d ci j .

Combining all currents injected in a DC grid with n buses results in
I d c =YdcUd c ,

(12)

I d c = [I d c1 , I d c2 . . . I d ck , 0 . . . 0 ]T ,
|
{z
} | {z }

(13)

with the DC current vector I d c given by

working converters outage

with n k zero elements due to converter outages and DC buses without a connection to the AC
system. The DC voltage vector is given by Ud c = [Ud c1 ,Ud c2 . . .Ud cn ]T and Ydc is the DC bus matrix.
The DC grid power flow equations can be written as
P d ci =p Ud ci

n
X

Yd ci j (Ud ci Ud c j ).

(14)

j =1
j 6=i

with Yd ci j equal to 1/R d ci j and p = 1 for a monopolar system or p = 2 for a monopolar symmetrically
grounded or bipolar system. This parameter of the system is defined as the variable pol in the
casedc data files.
In case of a Ud c P d c droop, the DC power injected by the voltage droop controlled buses, can be
written as
1
P d ci = P d c,0i
(Ud ci Ud c,0i ).
(15)
kd ci

22

5 Sequential AC/DC Power Flow

This chapter will briefly summarize the sequential AC/DC power flow method used by M ATACDC.
Fig. 12 summarizes converter AC and DC powers, voltages and losses and how they relate to the
busdc, convdc and branchdc data matrices. The AC representation of the converter stems with one
of the implementations depicted in Fig. 8.
P l oss, j

AC
S s, j

U s,i

S c, j

DC

P d c, j

U c, j

Ud c, j

convdc

busdc branchdc

Figure 12: AC/DC System interconnection

The sequential AC/DC power flow algorithm sequentially solves the AC and DC system power flow,
thereby respectively keeping all converter powers and voltages constant. Fig. 13 shows the flow chart
of the AC/DC power flow algorithm. The remaining part of this chapter addresses how M ATACDC
internally implements the sequential power flow algorithm. More details on the mathematical
modelling can be found in [6, 7].

Data input

AC grids power flow

per unit conversion

& internal numbering

Converter powers and losses

DC slack & droop

buses power estimate

Converter limit check

Update DC slack &

droop buses power

DC grids power flow

DC slack & droop

buses iteration

per unit reconversion

& external numbering

Output

yes

Converged?

no

Figure 13: Flow chart of the sequential VSC AC/DC power flow algorithm

23

In the mathematical description in this chapter, the converter AC powers are considered to be positive
when injected in the AC network. For convenience, DC powers are considered to be positive when
injected into the DC system. In the M ATACDC input and output format, however, the positive
direction of all active powers stems with a power transfer from the DC to the AC system. The
description in this chapter limits itself to one DC grid, but can be easily generalized.

5.1 AC System Power Flow

M ATACDC relies on the M ATPOWER runpf routine for the AC system power flow. There are two
alterations to the standard usage of the runpf routine:
1. Non-synchronized zones: In case multiple AC grids are defined (using the named index ZONE
in the bus matrix), M ATACDC extracts the AC system data for each zones and solves the power
flow for each AC grid one by one.
2. Infinite buses: In case the user is only interested in the DC system power flow or in case an
AC zone only has one node, the user can define infinite bus systems, by having inf for index
BUS_TYPE in the bus matrix. When M ATACDC runs the M ATPOWER runpf routine these buses
are taken out of the analysis.

5.1.1 Initialization
After having converted all converter data and the AC and DC grid data to the same per unit base,
the AC and DC buses are renumbered as explained in 3.3. In the AC power flow, all DC system and
converter data is kept constant. To start the iteration, the system needs a first approximation of the
converter active power injections. Thereby, the DC system and converters are assumed to be lossless.
As a first estimate to initiate the overall iteration, the AC active power injections of the droop controlled converters are put equal to the negative of the DC power reference P d c,0 , thereby assuming
that the DC voltage does not deviate from the reference value Ud c,0 and neglecting the converter
losses P l oss . Without lack of generality, we assume 2 a n bus DC system with the first converter as the
DC slack bus and the subsequent m 1 converters using a DC voltage droop control. The next k m
buses are under constant active power control. The remaining n k buses do not have a connection
to the AC grid or are facing a converter outage. The vector of AC power injections can thus be written
as
P s = [ P s1 , P s2 . . . P sm , P sm+1 . . . P sk , 0 . . . 0 ]T .
(16)
|{z} | {z } |
{z
} | {z }
slack voltage droop

P control

outage

The AC power injections of the k m power controlled buses are defined in the input data. The
initialization can therefore be written as
P s(0)
=P si i : m + 1 i n.
i

(17)

The active power injection estimate of the m 1 converters under voltage control is given by
P s(0)
=P d c,0i i : 2 i m.
i
2 In M ATACDC, the converters are not sorted based on their control, as done here for convenience.

24

(18)

The active power delivered by the DC slack bus, if present, is initiated as

P s(0)
=
1

m
X
i =2

P s(0)

n
X

Ps j ,

(19)

j =m+1

with P s(0)
from (18) and P s j defined prior to the power flow as the active power injections of the
i
constant power buses.
In case one DC grids contains several voltage controlling converters, the total deficit power is distributed amongst the different DC converters. In the general case of l DC voltage controlling converters, the initialization from (19) becomes
!

m
n
X
1 X
(0)
(0)
P sh =
P +
Ps j
h : 1 h l .
(20)
l i =l +1 si
j =m+1
Please note that having a multiple number of DC slack buses in one DC grid (hence multiple DC
voltage controlled nodes) can give rise to divergence in the DC power flow and has to be explicitly
defined by the user in the option vector.
For subsequent iterations, the solution from the previous iteration is used for P s(k)
.
1

5.1.2 Converter representation

The power flow equations for bus i in the AC grid can be written as
P i (U , ) =Ui
Q i (U , )=Ui

p
X
j =1
p
X

U j G i j cos(i j )+B i j sin(i j ) ,

(21)

U j G i j sin(i j )B i j cos(i j ) .

(22)

j =1

In the AC power flow routine, for which M ATACDC relies on the M ATPOWER file runpf, all converters
are represented as constant active power inputs to the AC system. Converters in V -control are
represented as dummy AC generators and their AC buses are changed from PQ-nodes to PV -nodes.
Several situations can occur for a converter under V -control :

When no generator is present at the AC node under consideration, a dummy generator is added
to the bus.
When a generator is present, but the node was a PQ node, the node is changed to a PV node
and only the additional reactive power delivered is considered to be the converter reactive
power.
When a generator is present, and the AC node was a PV node, the converter is set to constant
reactive power control instead.

Fig. 14 shows the representation of the converters in the AC power flow.

25

PQ

2
4 3

PV

PV

PQ

PV

PQ

1 AC 3

PQ

1 AC 4

AC 1

DC 1

PV

DC 2

AC 2

Figure 14: Representation of converters in the AC system

The converter power injections P s and Q s are included in the power mismatch vectors P (k) and
Q (k) as negative loads. The power mismatch vectors can thus be rewritten as
P i =P i

(j)

g en

(P id em P si ) P i (U ( j ) , ( j ) ),

(23)

(j)

g en

(Q id em Q si ) Q i (U ( j ) , ( j ) ).

(24)

Q i =Q i

With respect to the active power, all converters are treated similar in the sense that also the DC slack
and droop buses are introduced in the AC power flow algorithm as either PQ or PV buses. However,
when a converter is under DC voltage control, either a slack bus or droop-based control, the active
power injection in the AC grid is not known beforehand, since it depends on the active power at the
DC side to control the DC voltage.
After calculating the AC power flow, all converter powers and losses are calculated to obtain the DC
grids injected powers P d c for the k DC buses to which converters are connected, disregarding the
ones facing outages.
P d ci = P ci P l ossi , i < k,
(25)
with P c the active part of the complex power injected at the converter side, shown in Fig. 6. The
converter powers are determined according to one of the implementations from Fig. 8. More details
can be found in [6].

5.2 DC grid power flow

With the DC power injections calculated as a result of the AC power flow, M ATACDC uses a Newtonbased iteration, based on (14) (15) to calculate the DC grids power flow. For the converters under
constant power control, m +1 to k, the DC power injection P d c as defined by (14), is known as a result
of the AC power flow. For the converters under distributed voltage control, 2 to m, the DC power
injection set-points P d c,0 are all known. A modified active power vector P d0 c is introduced to group
these variables, hence
P d0 c = [P d c1 , P d c,02 . . . P d c,0m , P d cm+1 . . . P d ck , 0 . . . 0 ]T .
|{z} |
{z
}|
{z
} | {z }
slack

voltage droop

P control

outage

Using this modified power vector, the DC bus voltages are calculated with a NR method:

!( j )
P d0 c
Ud c ( j )
(j)
Ud c

= P d0 c .
Ud c
Ud c
26

(26)

(27)

The equations and terms corresponding to the slack bus are removed since its voltage is known prior
to the DC network power flow.
In this system of equations, the modified power mismatch vector P d0 c

(j)

P d c,0i P d c,0i (Ud c )

0( j )
(k)
(j)
P d c P d ci (Ud c )
P d c =
i
i

P d ci (Ud c ( j ) )

(j)

is given by

i : 2 i m
i : m < i k ,
i : k < i n

(28)

with P d c,0i (Ud c ( j ) ) given by

(j)

P d c,0 = P d ci (Ud c ( j ) ) +
i

1
(j)
(Ud c Ud c,0i ),
i
ki

(29)

and superscripts ( j ) and (k) respectively referring to the inner Newton-Raphson iteration and the
outer AC/DC power flow iteration.
More details on the DC grid power flow can be found in [6, 7].

5.3 DC slack and droop buses iteration

The AC bus active power injection P s of the DC slack and droop bus is calculated from the DC powers
P d c and by accounting for the converter losses. As the converter losses from (10) depend on the yet
unknown converter current, an additional iteration is needed to calculate the active power injection
P s . During this iteration, the grid side voltage U s and reactive power injection Q s are kept constant.
Omitting the subscript to simplify notations, the value of P c is iteratively updated according to
)
P c(i ) = P d(k)
P l(ioss
,
c

(30)

with the superscripts (i ) and (k) respectively referring to the DC slack bus iteration and the outer
AC/DC power flow iteration. The converter losses P l oss are calculated from (10). The previous AC
network power flow results are used to provide an initial estimate for the converter losses P l(0)
.
oss
A Newton iteration based on U c and U f as variables is internally used to update the converter state

)
in order to obtain a new value for P l(ioss
. For each DC slack or droop node, the iteration uses the values
of Q s , which is assumed to be constant during the iteration and the value of P c , which is updated
each iteration according to (30). Using (2) and (3), Q s and P c can be written as and in terms of U c
and U f . The power conservation at the filter bus leads to two additional equations in terms of U c
and U f , leading to four equations with four unknown variables

Q s (U f ,U c )

(31)

P c (U f ,U c )

(32)

F 1 (U s ,U c ,U f ) = P c f P s f ,

(33)

F 2 (U s ,U c ,U f ) = Q c f Q s f Q f ,

(34)

which leads to a four equations with four unknown variables. P c f , P s f , Q c f , Q s f and Q f are defined
in terms of U c and U f in (3) and (2).
The slack and droop bus iteration is depicted in Fig. 15.
27

Inputs
P c(0) from (30)

)
(i )
U (i
c and U f

using (31) (34)

(k)
U (k)
s ,Q s

Q c(i ) from (4)

Update P c

)
P l(ioss
from (10)

P c(i ) using (30)

Output
P s from (1)

yes

Check
convergence
Pc

no

Figure 15: DC Slack & droop bus iteration flow chart

In the absence of a transformer, the active power P c and reactive power Q s are rewritten in terms of
U s and U c as
P c = Uc2G c U s Uc [G c cos(s c ) B c sin(s c )]
Qs =

U s2 B c f

+U s Uc [G c sin(s c )B c cos(s c )],

(35)
(36)

with B c + B f abbreviated as B c f . Thereby, the number of unknowns is reduced and the problem is
simplified to a system with two equations unknown variables and two unknown variables. More
details can be found in [6].

28

6 Examples
M ATACDC has a number of predefined data files that can be used to obtain AC/DC power flow
results.

In the PowerflowAC map:

case3_inf.m
case5_stagg.m
case24_ieee_rts1996_3zones.m
case24_ieee_rts1996_3zones_inf.m
In the PowerflowDC map:

case5_stagg_HVDCptp.m
case5_stagg_MTDCslack.m
case5_stagg_MTDCdroop.m
case24_ieee_rts1996_MTDC.m
All power flows use the runacdcpf command, and have the AC and DC power flow data as input
arguments, either as structs or as a string referring to the corresponding .m-file.

>> [resultsac, resultsdc] = runacdcpf(caseac, casedc);

Optionally, the runacdcpf command also returns a convergence flag (converged) and a the elapsed
time (timecalc). It is also possible to define non-default options, both for the AC/DC power flow
algorithm (macdcopt), as well as for the standard M ATPOWER routines (mpopt):

>> [resultsac, resultsdc, converged, ...

timecalc] = runacdcpf(caseac, casedc, macdcopt, mpopt);
Please consult help runacdcpf for more options and information on the input and output data and
format.

6.1 Stagg 5-node test system

The Stagg test system, with the AC system based on [9] can be combined with the DC system based
on [7]. The AC power flow solution can be obtained using the M ATPOWER runpf command:

>> runpf(case5_stagg);

29

131.1

89.3

74.0

86.9

72.9

~
40

45+j15

90.8
41.8

40.3

16.8

17.5

40+j5
19.4

19.3

2.9

4.7

54.7

53.4

5.6

4.8

4
6.6

0.5

6.6

5.2

20+j10

60+j10

61.6

Figure 16: Stagg 5-node test system: AC power flow results (without DC system)

6.1.1 Constant power and DC voltage

The results for the constant power (converter 1 & 3) and constant DC voltage control (converter 2)
can be obtained using the case5_stagg_MTDCslack file:

>> runacdcpf(case5_stagg,case5_stagg_MTDCslack);
The output files can be stored in two separate data structs:

>> [mpc,mpcdc] = runacdcpf(case5_stagg,case5_stagg_MTDCslack);

Alternatively, it is also possible to define data matrices as output files:

>> [baseMVA, bus gen ,branch, busdc, convdc, branchdc] = ...

runacdcpf(case5_stagg,case5_stagg_MTDCslack);
>> [baseMVA, bus gen ,branch, busdc, convdc, branchdc, converged, timecalc] = ...
runacdcpf(case5_stagg,case5_stagg_MTDCslack);
For more information on the input and output data and the options, please use help runacdcpf.
All previous commands results in a printed output which summarizes the AC and DC power flow
results. The AC power flow results relies on the M ATPOWER printpf command.

Sequential solution method converged in 3 iterations

Converged in 0.26 seconds
================================================================================
|
System Summary
|
================================================================================
How many?
--------------------Buses
5

How much?
------------------Total Gen Capacity
30

P (MW)
------------550.0

Q (MVAr)
-----------------800.0 to 800.0

Generators
Committed Gens
Loads
Fixed
Dispatchable
Shunts
Branches
Transformers
Inter-ties
Areas

2
2
4
4
0
0
7
0
0
1

On-line Capacity
Generation (actual)
Load
Fixed
Dispatchable
Shunt (inj)
Losses (I^2 * Z)
Branch Charging (inj)
Total Inter-tie Flow

Minimum
------------------------Voltage Magnitude
0.991 p.u. @ bus 5
Voltage Angle
-4.26 deg
@ bus 4
P Losses (I^2*R)
Q Losses (I^2*X)
-

550.0
-800.0 to 800.0
173.6
51.5
165.0
40.0
165.0
40.0
-0.0 of -0.0
-0.0
-0.0
0.0
4.39
13.18
29.6
0.0
0.0

Maximum
-------------------------------1.060 p.u. @ bus 1
0.00 deg
@ bus 1
2.72 MW
@ line 1-2
8.15 MVAr @ line 1-2

================================================================================
|
Bus Data
|
================================================================================
Bus
Voltage
Generation
Load
#
Mag(pu) Ang(deg)
P (MW)
Q (MVAr)
P (MW)
Q (MVAr)
----- ------- -------- -------- -------- -------- -------1 1.060
0.000*
133.64
84.32
2 1.000
-2.383
40.00
-32.84
20.00
10.00
3 1.000
-3.895
45.00
15.00
4 0.996
-4.262
40.00
5.00
5 0.991
-4.149
60.00
10.00
-------- -------- -------- -------Total:
173.64
51.48
165.00
40.00
================================================================================
|
Branch Data
|
================================================================================
Brnch
From
To
From Bus Injection
To Bus Injection
Loss (I^2 * Z)
#
Bus
Bus
P (MW)
Q (MVAr)
P (MW)
Q (MVAr)
P (MW)
Q (MVAr)
----- ----- ----- -------- -------- -------- -------- -------- -------1
1
2
98.38
71.37
-95.66
-69.59
2.717
8.15
2
1
3
35.26
12.96
-34.20
-15.08
1.062
3.19
3
2
3
13.25
-6.22
-13.14
2.57
0.116
0.35
4
2
4
17.08
-5.18
-16.89
1.74
0.181
0.54
5
2
5
25.33
-1.85
-25.07
-0.35
0.257
0.77
6
3
4
23.09
4.64
-23.04
-6.47
0.057
0.17
7
4
5
-0.07
-0.27
0.07
-4.65
0.004
0.01
-------- -------Total:
4.393
13.18
31

================================================================================
|
DC bus data
|
================================================================================
Bus
Bus
Voltage
Power
DC # AC # Mag(pu)
P (MW)
----- ---- --------- -------1
2
1.008
-58.627
2
3
1.000
21.901
3
5
0.998
36.186
================================================================================
|
VSC Converter Data
|
================================================================================
Bus
Bus injection
Converter Voltage
Total loss
DC#
P (MW)
Q (MVAr)
Mag(pu) Ang(deg)
P (MW)
----- ------- -------------- -----------------1
-60.00
-40.00
0.890 -13.017
1.37
2
20.76
7.14
1.007
-0.655
1.14
3
35.00
5.00
0.995
1.442
1.19
-----Total:
3.70
Bus Converter power
Filter
Transfo loss
Reactor loss
Converter loss
DC# P (MW) Q (MVAr) Q (MVAr) P (MW) Q (MVAr) P (MW) Q (MVAr)
P (MW)
----- ------- ------- -------- ------ -------- ------ -------- -------------1
-59.92 -32.63
-8.12
0.08
5.83
0.01
9.66
1.29
2
20.76
-0.65
-9.02
0.01
0.54
0.00
0.70
1.14
3
35.02
-0.37
-8.83
0.02
1.43
0.00
2.03
1.17
------ -------- ------ -------- -------------Total:
0.10
7.80
0.01
12.39
3.59
Bus Grid power
Traf Filt.Power Filter
Conv Filt. Pwr
Converter Power
DC# P (MW) Q (MVAr) P (MW) Q (MVAr) Q (MVAr) Q (MVAr)
P (MW) Q (MVAr)
----- ------ -------- ------ -------- -------- ------------------- -------1
-60.00 -40.00 -59.92
-34.17
-8.12
-42.29
-59.92 -32.63
2
20.76
7.14
20.76
7.68
-9.02
-1.35
20.76
-0.65
3
35.00
5.00
35.02
6.43
-8.83
-2.40
35.02
-0.37
================================================================================
|
DC branch data
|
================================================================================
Brnch
From
To
From Bus
To Bus
Loss
#
Bus
Bus
P (MW)
P (MW)
P (MW)
----- ----- ----- ---------------------1
1
2
30.66
-30.42
0.24
2
2
3
8.52
-8.50
0.02
3
1
3
27.96
-27.68
0.28
32

Total:

-------0.54

Similarly, the results after an outage of the third converter (DC bus 3 or AC bus 5) are obtained using:

>>
>>
>>
>>

define_constantsdc;
mpcdc = loadcasedc(case5_stagg_MTDCslack);
mpcdc.convdc(3,CONVSTATUS) = 0
%% outage of converter 3
runacdcpf(case5_stagg, mpcdc);

6.1.2 Voltage droop control

The results for the DC voltage droop control are obtained using the file case5_stagg_MTDCdroop:

>> runacdcpf(case5_stagg,case5_stagg_MTDCdroop);
Similarly, the power flow results after an outage of converter 3 are obtained with the following
command:

>>
>>
>>
>>

define_constantsdc;
mpcdc = loadcasedc(case5_stagg_MTDCdroop);
mpcdc.convdc(3,CONVSTATUS) = 0;
%% outage of converter 3
runacdcpf(case5_stagg, mpcdc);

Figs. 1718 shows the results of the AC/DC power flow before and after the outage, both for a constant
power & voltage control, and a voltage droop control.
The droop settings can be easily changed, by having:

>>
>>
>>
>>
>>

define_constantsdc;
mpcdc = loadcasedc(case5_stagg_MTDCdroop);
mpcdc.convdc(3,CONVSTATUS) = 0;
%% outage of converter 3
mpcdc.convdc(:,DROOP) = mpcdc.convdc(:,DROOP)/5;
%% changing all droop settings
runacdcpf(case5_stagg, mpcdc);

It can be observed that these lower droop settings result in much lower DC voltages after the outage
of converter 3.

6.1.3 Infinite bus system

When not interested in the AC power flow results, M ATACDC allows to have infinite buses defined in
the AC system data. In file case3_inf, the Stagg 5-node test system has been replaced by 3 infinite
nodes to which the converters are connected:

%% bus data
% bus_i type Pd Qd Gs Bs area Vm

Va baseKV zone Vmax Vmin

33

133.6

98.4

71.4

95.7

69.6

~
40

45+j15

84.3

35.3

34.2

13.0

15.1

40+j5
23.1

23.0

4.6

6.5

25.3

25.1

1.9

0.4

4
0.1

0.3

0.1

4.7

20+j10

60+j10

32.8

(a) Normal operation

133.3

45+j15

84.3

29.1

28.3

14.6

17.5

40+j5
43.9

43.7

3.1

4.5

132.9

4
14.8

0.7

104.2

69.7

99.1

71.2

101.3

67.4

96.4

69.3

45.4

4.7

5.0

14.6

20+j10

33.8

32.8

13.3

15.6

5.0

~
40

46.3

45+j15

84.5

60+j10
40

18.5

40+j5
35.1

35.0

5.9

7.5

49.2

48.3

4.0

3.9

11.9

1.6

11.8

6.1

20+j10

60+j10

25.3

(b) Outage: P -control

(c) Outage: DC voltage droop

Figure 17: Stagg 5-node test system: AC network power flow solution with a VSC MTDC system
between buses 2, 3 and 5: (a) Normal operation, (b) Converter outage on bus 5 & P -control, (c)
Converter outage on bus 5 & DC voltage droop on converters 2 and 3. Legend: Active power (MW )
and 9 Reactive power (MVAr)

bus = [
2
inf
3
inf
5
inf
];

0
0
0

0 0
0 0
0 0

0
0
0

1
1
1

1.06
1
1

0 345
0 345
0 345

1
2
3

1.1
1.1
1.1

0.9;
0.9;
0.9;

The three nodes each belong to a different zone and have a voltage equal to the one defined in the VM
index.
The power flow results can be obtained in a similar manner:

>> runacdcpf(case3_inf,case5_stagg_MTDCslack);
The power flow with the infinite buses leads to similar results. Please note that in case of infinite
buses, the converters in V -control (in this example, bus 2) do not inject reactive power to support
the voltage.
34

20.8

7.1

21.9

28.0

27.7
36.2

58.6
60.0

40.0

35.0

5.0

(a) Normal operation

56.7

0.1

36.1

58.0

17.2

37.3

17.1

11.0

58.6
60.0

7.1

11.0

37.5
40.0

38.8

(b) Outage: P -control

40.0

2
(c) Outage: DC voltage droop

Figure 18: DC network power flow solution with a VSC MTDC system between buses 2, 3 and 5
of Stagg 5-node test system: (a) Normal operation, (b) Converter outage on bus 5 & P -control, (c)
Converter outage on bus 5 & DC voltage droop on converters 2 and 3. Legend: Active power (MW )

6.2 RTS1996 test system

M ATACDC also includes a more elaborated test system, based on the IEEE Two Area Reliability Test
System-96. The two areas have been turned into two non- synchronized AC zones, interconnected by
two DC systems, namely a 4-terminal meshed DC grid and a 3-terminal network. The 3-terminal
network is connected to a third AC zone, which can represent e.g. an offshore wind farm.

>> runacdcpf(case24_ieee_rts1996_3zones,case24_ieee_rts1996_MTDC);
Similarly to the previous example, the third AC zone can be replaced by an infinite bus, which has
been done in the data file case24_ieee_rts1996_3zones_inf.

>> runacdcpf(case24_ieee_rts1996_3zones_inf,case24_ieee_rts1996_MTDC);

35

Bibliography
[1] R. D. Zimmerman, C. E. Murillo-Sanchez, and R. J. Thomas, MATPOWER: Steady-state operations, planning, and analysis tools for power systems research and education, IEEE Trans. Power
Syst., vol. 26, no. 1, pp. 1219, Feb. 2011.
[2] S. Cole and R. Belmans, MatDyn, a new Matlab-based toolbox for power system dynamic
simulation, IEEE Trans. Power Syst., vol. 26, no. 3, pp. 11291136, 2011.
[3] MatDyn website. [Online]. Available: http://www.esat.kuleuven.be/electa/teaching/matdyn/
[4] MATPOWER website. [Online]. Available: http://www.pserc.cornell.edu/matpower/
[5] MatACDC website. [Online]. Available: http://www.esat.kuleuven.be/electa/teaching/matacdc/
[6] J. Beerten, S. Cole, and R. Belmans, Generalized steady-state VSC MTDC model for sequential
AC/DC power flow algorithms, IEEE Trans. Power Syst., vol. 27, no. 2, pp. 821 829, May 2012.
[7] J. Beerten, D. Van Hertem, and R. Belmans, VSC MTDC systems with a distributed DC voltage
control a power flow approach, in Proc. IEEE PowerTech 11, Trondheim, Norway, Jun. 1923,
2011.
[8] G. Daelemans, VSC HVDC in meshed networks, Masters thesis, Katholieke Universiteit Leuven,
Leuven, 2008.
[9] G. W. Stagg and A. H. El-Abaid, Computer Methods in Power System Analysis. Kogakusha, Japan:
McGraw-Hill, 1968.

36