Datasheet

TS27L2C,I,M
PRECISION VERY LOW POWER

CMOS DUAL OPERATIONAL AMPLIFIERS
VERY LOW POWER CONSUMPTION :
10A/op
OUTPUT VOLTAGE CAN SWING TO

GROUND
EXCELLENT PHASE MARGIN ON

CAPACITIVE LOADS
N
DIP8
(Plastic Package)
STABLE AND LOW OFFSET VOLTAGE

THREE INPUT OFFSET VOLTAGE
SELECTIONS
DESCRIPTION
D
SO8
(Plastic Micropackage)
These devices are low cost, low power dual operational amplifiers designed to operate with single
or dual supplies. These operational amplifiers use
the ST silicon gate CMOS process allowing an excellent consumption-speed ratio. These series are
ideally suited for low consumption applications.
Three power consumptions are available allowing
to have always the best consumption-speed ratio:
ICC = 10A/amp.: TS27L2 (very low power)

ICC = 150A/amp.: TS27M2 (low power)
P
TSSOP8
(Thin Shrink Small Outline Package)
PIN CONNECTIONS (top view)
ICC = 1mA/amp.: TS272 (standard)

These CMOS amplifiers offer very high input impedance and extremely low input currents. The
major advantage versus JFET devices is the very
low input currents drift with temperature (see figure 2).
ORDER CODE
7
-
Package
Part Number
Temperature Range
TS27L2C/AC/BC
0C, +70C
TS27L2I/AI/BI
-40C, +125C
TS27L2M/AM/BM
-55C, +125C
Example : TS27L2ACN
N = Dual in Line Package (DIP)

D = Small Outline Package (SO) - also available in Tape & Reel (DT)
P = Thin Shrink Small Outline Package (TSSOP) - only available
in Tape & Reel (PT)
November 2001
1 - Output 1
2 - Inverting Input 1
3 - Non-inverting Input 1
4 - V CC 5 - Non-inverting Input 2
6 - Inverting Input 2
7 - Output 2
8 - V CC +
1/9
TS27L2C,I,M
BLOCK DIAGRAM
VCC
Current
source
xI
Input
differential
Output
stage
Second
stage
Output
VCC
E
ABSOLUTE MAXIMUM RATINGS

Symbol
VCC
Vid
Parameter
Supply Voltage
TS27L2C/AC/BC
1)
2)
TS27L2I/AI/BI
TS27L2M/AM/BM
Unit
18
18
-0.3 to 18
Output Current for VCC+ 15V
30
mA
Input Current
mA
Differential Input Voltage
Vi
Input Voltage
Io
Iin
3)
Toper
Operating Free-Air Temperature Range
Tstg
Storage Temperature Range
0 to +70
-40 to +125
-55 to +125
-65 to +150
C
C
1. All values, except differential voltage are with respect to network ground terminal.
2. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal.
3. The magnitude of the input and the output voltages must never exceed the magnitude of the positive supply voltage.
OPERATING CONDITIONS
Symbol
Parameter
VCC+
Supply Voltage
Vicm
Common Mode Input Voltage Range
2/9
Value
Unit
3 to 16
0 to VCC+ - 1.5
T20
T19
T17
T24
T21
T 18
R2
T 25
VCC
T 22
T 23
T 26
T29
T 28
T27
Input
T3
T1
T5
VCC
T4
T2
C1
Input
R1
T7
T6
T9
T8
T 13
T11
T 10
T 14
T 12
T16
Output
T 15
TS27L2C,I,M
SCHEMATIC DIAGRAM (for 1/2 TS27L2)
3/9
TS27L2C,I,M
ELECTRICAL CHARACTERISTICS
VCC+ = +10V, VCC-= 0V, Tamb = +25C (unless otherwise specified)
TS27L2C/AC/BC
Symbol
Parameter
Min.
Input Offset Voltage
VO = 1.4V, Vic = 0V
Vio
DVio
Iio
Iib
Tmin Tamb Tmax
TS27L2C/I/M
TS27L2AC/AI/AM
TS27L2B/C/I/M
TS27L2C/I/M
TS27L2AC/AI/AM
TS27L2B/C/I/M
Typ.
Max.
1.1
0.9
0.25
10
5
2
12
6.5
3
Input Offset Voltage Drift
Input Offset Current note 1)

Vic = 5V, VO = 5V
Tmin Tamb Tmax
Input Bias Current - see note 1

Vic = 5V, VO = 5V
Tmin Tamb Tmax
VOH
High Level Output Voltage

Vid = 100mV, RL = 1M
Tmin Tamb Tmax
VOL
Low Level Output Voltage

Vid = -100mV
Avd
Large Signal Voltage Gain

ViC = 5V, RL = 1M, Vo = 1V to 6V
Tmin Tamb Tmax
TS27L2I/AI/BI
TS27L2M/AM/BM
Min.
Typ.
1.1
0.9
0.25
8.8
8.6
100
60
40
100
CMR
Common Mode Rejection Ratio

ViC = 1V to 7.4V, Vo = 1.4V
65
80
65
80
SVR
Supply Voltage Rejection Ratio

VCC+ = 5V to 10V, Vo = 1.4V
60
80
60
80
MHz
10
dB
dB
15
18
Output Short Circuit Current

Vo = 0V, Vid = 100mV
60
60
Isink
Output Sink Current

Vo = VCC, Vid = -100mV
45
45
SR
Slew Rate at Unity Gain

RL = 1M, CL = 100pF, Vi = 3 to 7V
0.04
0.04
Phase Margin at Unity Gain

Av = 40dB, RL = 1M, CL = 100pF
45
45
KOV
Overshoot Factor
30
30
Equivalent Input Noise Voltage

f = 1kHz, Rs = 100
68
68
nV
-----------Hz
Channel Separation
120
120
dB
Vo1/Vo2
4/9
V/mV
0.1
15
17
mV
Io
en
1.
50
0.1
10
pA
Gain Bandwidth Product

Av = 40dB, RL = 1M, CL = 100pF, fin = 100kHz
Supply Current (per amplifier)

Av = 1, no load, Vo = 5V
Tmin Tamb Tmax
pA
300
GBP
ICC
V/C
mV
200
50
60
45
10
5
2
12
6.5
3.5
150
8.8
8.7
Max.
100
Unit
Maximum values including unavoidable inaccuracies of the industrial test.
mA
mA
V/s
Degrees
TS27L2C,I,M
TYPICAL CHARACTERISTICS
Figure 1 : Supply Current (each amplifier) versus
Supply Voltage
Figure 3b : High Level Output Voltage versus

High Level Output Current
20
15
Tamb = 25 C
AV = 1
VO = VCC / 2
OUTPUT VOLTAGE, V OH (V)
SUPPLY CURRENT, I CC (A)
20
10
12
Tamb = 25 C
V id = 100mV
16
VCC = 16V
12
8
VCC = 10V
4
0
-50
16
SUPPLY VOLTAGE, VCC (V)
Figure 2 : Input Bias Current versus Free Air

Temperature
1 .0
VCC = 10V
V i = 5V
O U T P U T V O L T A G E , V O L (V )
INPUT BIAS CURRENT, IIB (pA)
Figure 4a : Low Level Output Voltage versus Low

Level Output Current
100
10
1
25
50
75
100
TEMPERATURE, Tamb (C)
0 .8
CC
= 3V
0 .6
CC
= 5V
0 .4
T amb = 2 5 C
V ic = 0 .5 V
V id = -1 0 0 m V
0 .2
125
O U T P U T C U R R E N T , I O L (m A )
Figure 3a : High Level Output Voltage versus

High Level Output Current
Figure 4b : Low Level Output Voltage versus Low

Level Output Current
3
O U T P U T V O L T A G E , V OL (V )
OUTPUT VOLTAGE, VOH (V)
-40
-30
-20
-10
OUTPUT CURRENT, I OH (mA)
Tamb = 25 C
V id = 100mV
4
3
VCC= 5V
2
VCC = 3V
1
0
-10
-8
-6
-4
-2
OUTPUT CURRENT, I OH (mA)
V C C = 10V
VC C = 1 6 V
1
T amb = 2 5 C
V i = 0 .5 V
Vid = -1 0 0 m V
12
16
20
O U T P U T C U R R E N T , I OL (m A )
5/9
TS27L2C,I,M
40
G A IN
G A IN (d B )
30
45
PHASE
20
Phase
Margin
T amb = 2 5 C
V CC+ = 1 0 V
R L = 1 M
C L = 100pF
A VCL = 1 0 0
10
0
135
10
180
Gain
Bandwidth
Product
-1 0
10
90
10
10
10
10
P H A S E (D e g re e s )
50
Figure 8 : Phase Margin versus Capacitive Load

P H A S E M A R G IN , m (D e g re e s )
Figure 5 : Open Loop Frequency Response and

Phase Shift
80
T amb = 2 5 C
R L = 1M
AV = 1
V CC= 1 0 V
70
60
50
40
0
F R E Q U E N C Y , f (H z )
20
40
60
80
C A P A C IT A N C E , C L
(p F )
Figure 9 : Slew Rate versus Supply Voltage
120
0 .0 5
T amb = 2 5 C
R L = 1M
C
= 100pF
L
AV = 1
100
80
S L E W R A T E S , S R (V / s )
G A IN B A N D W . P R O D ., G B P (M H z )
Figure 6 : Gain Bandwidth Product versus Supply

Voltage
100
60
40
T amb = 2 5 C
R L = 1M
C = 100pF
L
SR
0 .0 4
SR
0 .0 3
0 .0 2
12
16
6
8
10
12
14
S U P P L Y V O L T A G E , VCC (V )
16
S U P P L Y V O L T A G E , V CC (V )
60
T amb = 2 5 C
R L = 1 M
C = 100pF
L
AV = 1
50
40
30
300
VCC = 1 0 V
Tamb= 2 5 C
R S= 1 0 0
200
100
12
S U P P L Y V O L T A G E , V CC (V )
6/9
Figure 10 : Input Voltage Noise versus

Frequency
E Q U IV A L E N T IN P U T N O IS E
V O L T A G E (n V /V H z )
P H A S E M A R G IN , m (D e g re e s )
Figure 7 : Phase Margin versus Supply Voltage
16
10
100
F R E Q U E N C Y (H z )
1000
TS27L2C,I,M
PACKAGE MECHANICAL DATA
8 PINS - PLASTIC DIP
Millimeters
Inches
Dim.
Min.
A
a1
B
b
b1
D
E
e
e3
e4
F
i
L
Z
Typ.
Max.
Min.
3.32
0.51
1.15
0.356
0.204
1.65
0.55
0.304
10.92
9.75
7.95
0.020
0.045
0.014
0.008
Max.
0.065
0.022
0.012
0.430
0.384
0.313
2.54
7.62
7.62
3.18
Typ.
0.131
0.100
0.300
0.300
6.6
5.08
3.81
1.52
0.125
0260
0.200
0.150
0.060
7/9
TS27L2C,I,M
8 PINS - PLASTIC MICROPACKAGE (SO)
b1
a1
a2
c1
a3
e3
D
M
Millimeters
Inches
Dim.
Min.
A
a1
a2
a3
b
b1
C
c1
D
E
e
e3
F
L
M
S
8/9
Typ.
Max.
0.65
0.35
0.19
0.25
1.75
0.25
1.65
0.85
0.48
0.25
0.5
4.8
5.8
5.0
6.2
0.1
Min.
Typ.
Max.
0.026
0.014
0.007
0.010
0.069
0.010
0.065
0.033
0.019
0.010
0.020
0.189
0.228
0.197
0.244
0.004
45 (typ.)
1.27
3.81
3.8
0.4
0.050
0.150
4.0
1.27
0.6
0.150
0.016
8 (max.)
0.157
0.050
0.024
TS27L2C,I,M
8 PINS - THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP)
k
c
0.25mm
.010 inch
GAGE PLANE
L1
L1
SEATING
PLANE
E1
A2
A1
5
5
D
e
8
PIN 1 IDENTIFICATION
Millimeters
Inches
Dim.
Min.
A
A1
A2
b
c
D
E
E1
e
k
l
L
L1
0.05
0.80
0.19
0.09
2.90
4.30
0
0.50
0.45
Typ.
1.00
3.00
6.40
4.40
0.65
0.60
0.600
1.000
Max.
Min.
1.20
0.15
1.05
0.30
0.20
3.10
0.01
0.031
0.007
0.003
0.114
4.50
0.169
8
0.75
0.75
0
0.09
0.018
Typ.
0.039
0.118
0.252
0.173
0.025
0.0236
0.024
0.039
Max.
0.05
0.006
0.041
0.15
0.012
0.122
0.177
8
0.030
0.030
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
2001 STMicroelectronics - Printed in Italy - All Rights Reserved
STMicroelectronics GROUP OF COMPANIES
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http://www.st.com
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TS27L2C,I,M

PRECISION VERY LOW POWER

OUTPUT VOLTAGE CAN SWING TO

EXCELLENT PHASE MARGIN ON

STABLE AND LOW OFFSET VOLTAGE

ICC = 10A/amp.: TS27L2 (very low power)

PIN CONNECTIONS (top view)

ICC = 1mA/amp.: TS272 (standard)

N = Dual in Line Package (DIP)

ABSOLUTE MAXIMUM RATINGS

Output Current for VCC+ 15V

Differential Input Voltage

Operating Free-Air Temperature Range

Storage Temperature Range

Common Mode Input Voltage Range

SCHEMATIC DIAGRAM (for 1/2 TS27L2)

Tmin Tamb Tmax

Input Offset Voltage Drift

Input Offset Current note 1)

Input Bias Current - see note 1

High Level Output Voltage

Low Level Output Voltage

Large Signal Voltage Gain

Common Mode Rejection Ratio

Supply Voltage Rejection Ratio

Output Short Circuit Current

Output Sink Current

Slew Rate at Unity Gain

Phase Margin at Unity Gain

Equivalent Input Noise Voltage

Gain Bandwidth Product

Supply Current (per amplifier)

Maximum values including unavoidable inaccuracies of the industrial test.

Figure 3b : High Level Output Voltage versus

OUTPUT VOLTAGE, V OH (V)

SUPPLY CURRENT, I CC (A)

SUPPLY VOLTAGE, VCC (V)

Figure 2 : Input Bias Current versus Free Air

INPUT BIAS CURRENT, IIB (pA)

Figure 4a : Low Level Output Voltage versus Low

Figure 3a : High Level Output Voltage versus

Figure 4b : Low Level Output Voltage versus Low

OUTPUT VOLTAGE, VOH (V)

OUTPUT CURRENT, I OH (mA)

Figure 8 : Phase Margin versus Capacitive Load

Figure 5 : Open Loop Frequency Response and

Figure 9 : Slew Rate versus Supply Voltage

Figure 6 : Gain Bandwidth Product versus Supply

Figure 10 : Input Voltage Noise versus

Figure 7 : Phase Margin versus Supply Voltage

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