Sequential circuit analysis

Review: Flip-flop variations

Last week we started talking about latches and flip-flops, which are
basic one-bit memory units.
Today well talk about sequential circuit analysis and design.
First, well see how to analyze and describe sequential circuits.
State tables show the inputs, outputs, and flip-flop state changes
for sequential circuits.
State diagrams are an alternative but equivalent way of showing the
same information.

Inputs

Combinational
circuit

Outputs

We can make different versions of flip-flops based on the D flip-flop,

just like we made different latches based on the SR latch.
A JK flip-flop has inputs that act like S and R, but the inputs JK=11 are
used to complement the flip-flops current state.

Sequential circuit analysis

October 20, 2003

Review: Characteristic tables

The tables that weve made so far are

called characteristic tables.
They show the next state Q(t+1)
in terms of the current state Q(t)
and the inputs.
For simplicity, the control input C
is not usually listed.
Again, these tables dont indicate
the positive edge-triggered
behavior of the flip-flops that
well be using.

October 20, 2003

Q(t+1)

Operation

0
1

0
1

Reset
Set

Q(t+1)

Operation

0
0
1
1

0
1
0
1

Q(t)
0
1
Q(t)

No change
Reset
Set
Complement

Q(t+1)

Operation

0
1

Reset
Set

Q(t+1)

Operation

0
1

0
1

Reset
Set

Q(t+1)

Operation

0
0
1
1

0
1
0
1

Q(t)
0
1
Q(t)

No change
Reset
Set
Complement

Q(t+1)

Operation

0
1

Q(t)
Q(t)

No change
Complement

October 20, 2003

Q(t+1)

Operation

0
0
1
1

0
1
0
1

Q(t)
0
1
Q(t)

No change
Reset
Set
Complement

Q(t+1)

Operation

Q(t+1)

Operation

Q(t)
Q(t)

No change
Complement

0
1

Q(t)
Q(t)

No change
Complement

Qnext

0
1
1

x
0
1

No change
No change
Qcurrent
2

October 20, 2003

Q(t+1) = KQ(t) + JQ(t)

Q(t+1) = TQ(t) + TQ(t)

= T Q(t)

Sequential circuit analysis

Flip flop timing diagrams

Present state and next state are relative terms.

In the example JK flip-flop timing diagram on the left, you can see that
at the first positive clock edge (1), J=1, K=1 and Q(1) = 1.
We can use this information to find the next state, Q(2) = Q(1).
Q(2) appears right after the first positive clock edge, as shown on the
right. It will not change again until after the second clock edge.
(1)

Q(t+1) = KQ(t) + JQ(t)

Q(t+1) = TQ(t) + TQ(t)

= T Q(t)

Sequential circuit analysis

Q(t+1) = D

0
1

Q(t+1) = D

No change
No change
0 (reset)
1 (set)
Qcurrent

We can also write characteristic equations, where the next state Q(t+1)
is defined in terms of the current state Q(t) and inputs.

We can also write characteristic equations, where the next state Q(t+1)
is defined in terms of the current state Q(t) and inputs.

0
1

Qnext

x
0
1
0
1

Review: Characteristic equations

Sequential circuit analysis

x
0
0
1
1

Sequential circuit analysis

Review: Characteristic equations

0
1
1
1
1

A T flip-flop can only maintain or complement its current state.

Memory

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(2)

(3)

(4)

(1)

These values at clock cycle 1...

5

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Sequential circuit analysis

(2)

(3)

(4)

determine the next Q

Present and next are relative

Positive edge triggered

Similarly, the values of J, K and Q at the second positive clock edge can
be used to find the value of Q during the third clock cycle.
When we do this, Q(2) is now referred to as the present state, and
Q(3) is now the next state.

One final point to repeat: the flip-flop outputs are affected only by the
input values at the positive edge.
In the diagram below, K changes rapidly between the second and
third positive edges.
But its only the input values at the third clock edge (K=1, and J=0
and Q=1) that affect the next state, so here Q changes to 0.
This is a fairly simple timing model. In real life there are setup times
and hold times to worry about as well, to account for internal and
external delays.

K
Q
October 20, 2003

Sequential circuit analysis

October 20, 2003

Sequential circuit analysis

Summary

An example sequential circuit

To use memory in a larger circuit, we need to:

Keep the latches disabled until new values are ready to be stored.
Enable the latches just long enough for the update to occur.
A clock signal is used to synchronize circuits. The cycle time is chosen
to reflect how long combinational operations take.
(and becomes a constraint on all combinatorial operations whose
output needs to be stored at the end of the clock cycle)
Flip-flops further restrict the memory writing interval, to just the
positive edge of the clock signal.
This ensures that memory is updated only once per clock cycle.
There are several different kinds of flip-flops, but they all serve
the same basic purpose of storing bits.
Next week well talk about how to analyze and design sequential circuits
that use flip-flops as memory.

Here is a sequential circuit

with two JK flip-flops. There
is one input, X, and one
output, Z.
The values of the flip-flops
(Q 1Q0) form the state, or the
memory, of the circuit.
The flip-flop outputs also go
back into the primitive gates
on the left. This fits the
general sequential circuit
diagram at the bottom.

X
Inputs

Z
Combinational
circuit

Outputs

Q0

Memory Q1

October 20, 2003

Sequential circuit analysis

October 20, 2003

Sequential circuit analysis

How do you analyze a sequential circuit?

Analyzing our example circuit

For a combinational circuit we could find a truth table, which shows how
the outputs are related to the inputs.
A state table is the sequential analog of a truth table. It shows inputs
and current states on the left, and outputs and next states on the right.
For a sequential circuit, the outputs are dependent upon not only the
inputs, but also the current state of the flip-flops.
In addition to finding outputs, we also need to find the state of the
flip-flops on the next clock cycle.

A basic state table for our example circuit

is shown below.
Remember that there is one input X, one
output Z, and two flip-flops Q 1Q0.
The present state Q 1Q0 and the input will
determine the next state and the output.

Present State
Q1
Q0
0
0
0
0
1
1
1
1
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Sequential circuit analysis

10

11

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0
0
1
1
0
0
1
1

Inputs
X

Next State
Q1
Q0

Outputs
Z

0
1
0
1
0
1
0
1
Sequential circuit analysis

12

The outputs are easy

Flip-flop input equations

The output depends on the current state

Q0 and Q1 as well as the inputs.
From the diagram, you can see that

Step 1:
Find Boolean expressions for the flip-flop inputs.
I.e. How do the inputs (say, J & K) to the flipflops
depend on the current state and input

Z = Q1Q0X
Output at the current time
Present State
Q1
Q0
0
0
0
0
1
1
1
1

0
0
1
1
0
0
1
1

October 20, 2003

Inputs
X

Finding the next states is harder. To do this, we have to figure out how
the flip-flops are changing.

Next State
Q1
Q0

Step 2:
Use these expressions to find the actual flip-flop input values for
each possible combination of present states and inputs.
I.e. Fill in the state table (with new intermediate columns)

Outputs
Z

0
1
0
1
0
1
0
1

0
0
0
0
0
0
0
1

Step 3:
Use flip-flop characteristic tables or equations to find the next
states, based on the flip-flop input values and the present states.

Sequential circuit analysis

13

October 20, 2003

Sequential circuit analysis

Step 1: Flip-flop input equations

Step 2: Flip-flop input values

For our example, the flip-flop

input equations are:

With these equations, we can make a table showing J1, K 1, J 0 and K 0 for
the different combinations of present state Q 1Q0 and input X.

J1 = X Q0
K1 = X + Q 0

J1 = X Q0
K1 = X + Q 0

J0 = X + Q 1
K0 = X

Present State
Q1
Q0

JK flip-flops each have two

inputs, J and K. (D and T flipflops have one input each.)

October 20, 2003

0
0
0
0
1
1
1
1

Sequential circuit analysis

15

0
0
1
1
0
0
1
1

October 20, 2003

In our example circuit, we have two JK flip-flops, so we have to apply

this equation to each of them:

We can also determine the next state for

each input/current state combination
J
directly from the characteristic table.
0
0
1
1

October 20, 2003

Sequential circuit analysis

J1

0
1
0
1
0
1
0
1

0
0
1
0
0
0
1
0

Flip-flop Inputs
K1
J0
0
1
1
1
0
1
1
1

0
1
0
1
1
1
1
1

K0
1
0
1
0
1
0
1
0

16

Finally, here are the next states for Q 1 and Q 0, using these equations:
Q1(t+1) = K 1Q1(t) + J 1Q1(t)
Q0(t+1) = K 0Q0(t) + J 0Q0(t)

Present State
Q1
Q0

Q1(t+1) = K 1Q1(t) + J 1Q1(t)

Q0(t+1) = K 0Q0(t) + J 0Q0(t)

Inputs
X

Step 3 concluded

Finally, use the JK flip-flop characteristic tables or equations to find

the next state of each flip-flop, based on its present state and inputs.
The general JK flip-flop characteristic equation is:
Q(t+1) = KQ(t) + JQ(t)

J0 = X + Q 1
K0 = X

Sequential circuit analysis

Step 3: Find the next states

14

Q(t+1)

Operation

0
1
0
1

Q(t)
0
1
Q(t)

No change
Reset
Set
Complement

0
0
0
0
1
1
1
1

17

October 20, 2003

0
0
1
1
0
0
1
1

Inputs
X

J1

0
1
0
1
0
1
0
1

0
0
1
0
0
0
1
0

FF Inputs
K1
J0
0
1
1
1
0
1
1
1

0
1
0
1
1
1
1
1

Sequential circuit analysis

K0

Next State
Q1
Q0

1
0
1
0
1
0
1
0

0
0
1
0
1
0
0
0

0
1
0
1
1
1
0
1

18

Getting the state table columns straight

State diagrams

The table starts with Present State and Inputs.

Present State and Inputs yield FF Inputs.
Present State and FF Inputs yield Next State, based on the flipflop characteristic tables.
Present State and Inputs yield Output.
We really only care about FF Inputs in order to find Next State.

We can also represent the state table graphically with a state diagram.
A diagram corresponding to our example state table is shown below.

input
Present State
Q1
Q0
0
0
0
0
1
1
1
1

0
0
1
1
0
0
1
1

Inputs
X

J1

0
1
0
1
0
1
0
1

0
0
1
0
0
0
1
0

FF Inputs
K1
J0
0
1
1
1
0
1
1
1

0
1
0
1
1
1
1
1

K0
1
0
1
0
1
0
1
0

Next State
Q1
Q0
0
0
1
0
1
0
0
0

Present State Inputs Next State Outputs

Q1
Q0
X
Q1
Q0
Z

Outputs
Z

0
1
0
1
1
1
0
1

0
0
0
0
0
0
0
1

0
0
0
0
1
1
1
1

0
0
1
1
0
0
1
1

0
1
0
1
0
1
0
1

0
0
1
0
1
0
0
0

0
1
0
1
1
1
0
1

0
0
0
0
0
0
0
1

output
0/0
00

0/0
11

1/0
1/0
1/1
0/0

01
1/0

0/0
10

state
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Sequential circuit analysis

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October 20, 2003

Sizes of state diagrams

Always check the size of your state diagrams.
If there are n flip-flops, there should be 2n nodes in the diagram.
If there are m inputs, then each node will have 2m outgoing arrows.

In our example,
We have two flip-flops, and thus four states or nodes.
There is one input, so each node has two outgoing arrows.

0
0
0
0
1
1
1
1

To analyze sequential circuits, you have to:

Find Boolean expressions for the outputs of the circuit and the flipflop inputs.
Use these expressions to fill in the output and flip-flop input
columns in the state table.
Finally, use the characteristic equation or characteristic table of
the flip-flop to fill in the next state columns.

The result of sequential circuit analysis is a state table or a state

diagram describing the circuit.

From each state

Present State Inputs Next State Outputs

Q1
Q0
X
Q1
Q0
Z
0
0
1
1
0
0
1
1

October 20, 2003

0
1
0
1
0
1
0
1

0
0
1
0
1
0
0
0

0
1
0
1
1
1
0
1

0
0
0
0
0
0
0
1

0/0
00
0/0
11

Sequential circuit analysis

1/0
1/0
1/1
0/0

01
1/0

0/0
10

21

October 20, 2003

Sequential circuit design

20

Sequential circuit analysis summary

Sequential circuit analysis

Sequential circuit analysis

22

Sequence recognizers

Now lets reverse the process: In sequential circuit design, we turn

some description into a working circuit.
We first make a state table or diagram to express the computation.
Then we can turn that table or diagram into a sequential circuit.

A sequence recognizer is a special kind of sequential circuit that looks

for a special bit pattern in some input.
The recognizer circuit has only one input, X.
One bit of input is supplied on every clock cycle. For example, it
would take 20 cycles to scan a 20-bit input.
This is an easy way to permit arbitrarily long input sequences.
There is one output, Z, which is 1 when the desired pattern is found.
Our example will detect the bit pattern 1001:
Inputs:
1 1 1 0 0 1 1 0 1 00 1 0 0 1 1 0
Outputs: 0 00 0 0 1 0 0 0 00 1 0 0 1 0 0

October 20, 2003

Sequential circuit analysis

23

Here, one input and one output bit appear every clock cycle.
This requires a sequential circuit because the circuit has to remember
the inputs from previous clock cycles, in order to determine whether or
not a match was found.

October 20, 2003

Sequential circuit analysis

24

A basic state diagram

What state do we need for the sequence recognizer?

We have to remember inputs from previous clock cycles.
For example, if the previous three inputs were 100 and the current
input is 1, then the output should be 1.
In general, we will have to remember occurrences of parts of the
desired patternin this case, 1, 10, and 100.
Well start with a basic state diagram:

1/0

0/0

0/0

State

Meaning

A
B
C
D

None of the desired pattern (1001) has been input yet.

Weve already seen the first bit (1) of the desired pattern.
Weve already seen the first two bits (10) of the desired pattern.
Weve already seen the first three bits (100) of the desired pattern.

October 20, 2003

Sequential circuit analysis

25