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Unit Ii Memory and Input / Output Management Input and Output Devices

The document discusses input/output (I/O) devices and how they interface with the CPU. It describes how I/O devices contain registers that the CPU reads from and writes to in order to communicate with the device. There are two main methods for implementing I/O - I/O mapped I/O uses special instructions while memory mapped I/O uses normal read/write instructions to addresses assigned to device registers. Busy-wait I/O is described as the basic method where the CPU polls a device's status register to wait for an operation to complete before starting the next one. An example shows how to use peek and poke functions to copy a string to an output device using busy-wait I/O.

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Navis Nayagam
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76 views4 pages

Unit Ii Memory and Input / Output Management Input and Output Devices

The document discusses input/output (I/O) devices and how they interface with the CPU. It describes how I/O devices contain registers that the CPU reads from and writes to in order to communicate with the device. There are two main methods for implementing I/O - I/O mapped I/O uses special instructions while memory mapped I/O uses normal read/write instructions to addresses assigned to device registers. Busy-wait I/O is described as the basic method where the CPU polls a device's status register to wait for an operation to complete before starting the next one. An example shows how to use peek and poke functions to copy a string to an output device using busy-wait I/O.

Uploaded by

Navis Nayagam
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© © All Rights Reserved
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UNIT II

MEMORY AND INPUT / OUTPUT MANAGEMENT


Input and Output Devices:
Input and output devices usually have some analog or non-electronic components,
For instance a disk drive has a rotating disk and analog read/write electronics. But the
digital logic in the device that is most closely connected to the CPU very strongly
resembles the logic in any computer system. The following Figure shows the structure of
a typical I/O device and its relationship to the CPU.

Structure of a typical I/O device


The interface between the CPU and the devices internals (e.g., the rotating disk
and read/write electronics in a disk drive) is a set of registers. The CPU talks to the
device by reading and writing the registers. Devices typically have several registers:
Data registers hold values that are treated as data by the device, such as the data
read or written by a disk.
Status registers provide information about the devices operation, such as whether
the current transaction has completed.
Some registers may be read-only, such as a status register that indicates when the device
is done, while others may be readable or writable.
I/O mapped and Memory mapped I/O:
Microprocessors can provide programming support for input and output in two
ways: I/O instructions and memory-mapped I/O.
Some architectures, such as the Intel x86, provide special instructions (in and out in the
case of the Intel x86) for input and output. These instructions provide a separate address
space for I/O devices.
But the most common way to implement I/O is by memory mappingeven CPUs that
provide I/O instructions can also implement memory-mapped I/O. As the name implies,
memory-mapped I/O provides addresses for the registers in each I/O device. Programs
use the CPUs normal read and write instructions to communicate with the devices. The
following example shows memory mapped I/O in ARM.

Example: Memory-mapped I/O on ARM


We can use the EQU pseudo-op to define a symbolic name for the memory location of
our I/O device:
DEV1 EQU 0x1000
Given that name, we can use the following standard code to read and write the device
register:
LDR r1,#DEV1 ; set up device address
LDR r0,[r1] ; read DEV1
LDR r0,#8 ; set up value to write
STR r0,[r1] ; write 8 to device
The reading and writing of an I/O device is done with the help of peek () and poke ()
functions which are used for reading and writing respectively. The peek and poke
functions in C language is given below,
int peek(char *location) {
return *location; /* de-reference location pointer */
}
The argument to peek is a pointer that is de-referenced by the C * operator to read
the location. Thus, to read a device register we can write:
#define DEV1 0x1000
...
dev_status = peek(DEV1); /* read device register */
The poke function can be implemented as:
void poke(char *location, char newval) {
(*location) = newval; /* write to location */
}
To write to the status register,we can use the following code:
poke(DEV1,8); /* write 8 to device register */

Busy-Wait I/O:
The most basic way to use devices in a program is busy-wait I/O. Devices are typically
slower than the CPU and may require many cycles to complete an operation. If the CPU
is performing multiple operations on a single device, such as writing several characters to
an output device, then it must wait for one operation to complete before starting the next
one. (If we try to start writing the second character before the device has finished with the
first one, for example, the device will probably never print the first character.) Asking an
I/O device whether it is finished by reading its status register is often called polling.
The following example illustrates busy-wait I/O.
Example-: Copy a string of characters to the output device:
Busy-wait I/O programming:

In this example we want to write a sequence of characters to an output device. The device
has two registers: one for the character to be written and a status register. The status
registers value is 1 when the device is busy writing and 0 when the write transaction has
completed. We will use the peek and poke functions to write the busy-wait routine in C.

First, we define symbolic names for the register addresses:


#define OUT_CHAR 0x1000 /* output device character register */
#define OUT_STATUS 0x1001 /* output device status register */

The sequence of characters is stored in a standard C string, which is terminated by a null


(0) character. We can use peek and poke to send the characters and wait for each
transaction to complete:
char *mystring = "Hello, world." /* string to write */
char *current_char; /* pointer to current position in
string */
current_char = mystring; /* point to head of string */
while (*current_char != `\ 0') { /* until null character */
poke(OUT_CHAR,*current_char); /* send character to
device */
while (peek(OUT_STATUS) != 0); /* keep checking
status */
current_char++; /* update character pointer */
}

The outer while loop sends the characters one at a time. The inner while loop checks the
device statusit implements the busy-wait function by repeatedly checking the device
status until the status changes to 0.
Copying characters from input to output using busy-wait I/O:
We want to repeatedly read a character from the input device and write it to the output
device. First, we need to define the addresses for the device registers:
#define IN_DATA 0x1000
#define IN_STATUS 0x1001
#define OUT_DATA 0x1100
#define OUT_STATUS 0x1101

The input device sets its status register to 1 when a new character has been read; we must
Set the status register back to 0 after the character has been read so that the device is
ready to read another character. When writing, we must set the output status register to 1
to start writing and wait for it to return to 0. We can use peek and poke to repeatedly
perform the read/write operation:
while (TRUE) { /* perform operation forever */
/* read a character into achar */
while (peek(IN_STATUS) == 0); /* wait until ready */
achar = (char)peek(IN_DATA); /* read the character */
/* write achar */
poke(OUT_DATA,achar);
poke(OUT_STATUS,1); /* turn on device */
while (peek(OUT_STATUS) != 0); /* wait until done */
}

The 8251 UART (Universal Asynchronous Receiver/Transmitter):


The 8251 UART (Universal Asynchronous Receiver/Transmitter) is the original device
used for serial communications, such as the serial port connections on PCs. The 8251 was
introduced as a stand-alone integrated circuit for early microprocessors. Today, its
functions are typically contained in a larger chip, but these more advanced devices still
use the basic programming interface defined by the 8251.
The UART is programmable for a variety of transmission and reception parameters.
However, the basic format of transmission is simple. Data are transmitted as streams of
characters, each of which has the following form:

Every character starts with a start bit (a 0) and a stop bit (a 1). The start bit allows the
receiver to recognize the start of a new character; the stop bit ensures that there will be a
transition at the start of the stop bit. The data bits are sent as high and low voltages at a
uniform rate. That rate is known as the baud rate; the period of one bit is the inverse of
the baud rate. Before transmitting or receiving data, the CPU must set the UARTs mode
registers to correspond to the data lines characteristics. The parameters for the serial port
are as follows,
the baud rate;
the number of bits per character (5 through 8);
whether parity is to be included and whether it is even or odd; and
The length of a stop bit (1, 1.5, or 2 bits).
The UART includes one 8-bit register that buffers characters between the UART and the
CPU bus. The Transmitter Ready output indicates that the transmitter is ready to accept a
data character; the Transmitter Empty signal goes high when the UART has no characters
to send. On the receiver side, the Receiver Ready pin goes high when the UART has a
character ready to be read by the CPU.

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