Combinational Logic Review G: Far, Far, Away Far, Away

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Combinational Logic

g Review
Digital Devices was a LONG, LONG time ago in a galaxy FAR,
FAR, AWAY for many of you.
you
We dont expect you to remember everything you learned in
Digital Devices,
Devices but you need to remember > 0%.
0%

We will review some to help you remember. You also need to go


back and look at old notes. After a couple of days of review, we
will expect you to be up to speed,
speed and then we will ZOOM
along.
Ask
s QU
QUESTIONS
S ONS du
during
gC
CLASS
SS to
oS
SLOW
OW things
gs dow
down..
V 0.5

Binary Representation
The basis of all digital data is binary representation.
Binary - means two

1, 0
True, False
Hot, Cold
ld
On, Off

W
We mustt be
b able
bl to
t handle
h dl more than
th just
j t values
l
for
f
real world problems

11, 0,
0 56
True, False, Maybe
Hot,, Cold,, LukeWarm,, Cool
On, Off, Leaky
V 0.5

Number Systems
y
To talk about binary data, we must first talk about
number systems
The decimal number system (base 10) you should
be familiar with!
A digit in base 10 ranges from 0 to 9.
A digit
g in base 2 ranges
g from 0 to 1 ((binary
y number
system). A digit in base 2 is also called a bit.
A digit in base R can range from 0 to R-1
A digit
di i in
i Base 16 can range from
f
0 to 16-1
(0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F). Use letters A-F to
p
values 10 to 15. Base 16 is also called
represent
Hexadecimal or just Hex.
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Positional Notation
Value of number is determined by multiplying each digit by a
weight and then summing. The weight of each digit is a
POWER of the BASE and is determined by position
position.
953.78 = 9 * 102 + 5 * 101 + 3 * 100 + 7 * 10-1 + 8 * 10-2
= 900 + 50 + 3 + .7 + .08 = 953.78
0b1011 11 = 1*23 + 0*22 + 1*21 + 1*20 + 1*2-11 + 1*2-22
0b1011.11
= 8 + 0 + 2 + 1 + 0.5 + 0.25
= 11.75
0xA2F = 10*162 + 2*161 + 15*160
= 10 * 256
+ 2 * 16 + 15 * 1
= 2560 + 32 + 15 = 2607
V 0.5

Base 10, Base 2, Base 16


The textbook uses subscripts to represent different
bases (ie. A2F16, 953.7810, 1011.112)
I will use special symbols to represent the different bases.
bases
The default base will be decimal, no special symbol for
base 10.
The 0x will be used for base 16 (0xA2F)
The 0b will be used for base 2 (0b10101111)
If ALL numbers on a page are the same base (ie, all in base
16 or base 2 or whatever)) then no symbols
y
will be used and
a statement will be present that will state the base (ie, all
numbers on this page are in base 16).
V 0.5

Common Powers
2-3 = 0.125
2-2 = 0.25
2-11 = 0.5
05
20 = 1
21 = 2
22 = 4
23 = 8
24 = 16
25 =32
26 = 64
27 = 128
28 = 256
29 = 512
210 = 1024
211 = 2048
212 = 4096

160 = 1 = 20
161 = 16 = 24
162 = 256 = 28
163 = 4096 = 212

210 = 1024 = 1 Ki (kilobinary)


220 = 1048576 = 1 Mi ((1 megabinary)
g
y) = 1024 K = 210 * 210
230 = 1073741824 = 1 Gi (1 gigabinary)

V 0.5

Conversion of Any Base to Decimal


Converting from ANY base to decimal is done by multiplying
each digit by its weight and summing.
Binary to Decimal
0b1011.11 = 1*23 + 0*22 + 1*21 + 1*20 + 1*2-1 + 1*2-2
= 8 + 0 + 2 + 1 + 0.5 + 0.25
= 11.75
11 75
Hex to Decimal
0xA2F = 10*162 + 2*161 + 15*160
= 10 * 256 + 2 * 16 + 15 * 1
= 2560 + 32 + 15 = 2607
V 0.5

Conversion of Decimal Integer


To ANY Base
Divide Number N by base R until quotient is 0. Remainder at
EACH stepp is a digit
g in base R,, from Least Significant
g
digit
g to
Most significant digit.
Convert 53 to binary
Least Significant
g
Digit
g
53/2 = 26,
26 rem = 1
26/2 = 13, rem = 0
13/2 = 6 , rem = 1
6 /2 = 3,
3 rem = 0
3/2 = 1, rem = 1
1/2 = 0, rem = 1
Most Significant
g
Digit
g
53 = 0b 110101
= 11*225 + 11*224 + 00*223 + 11*222 + 00*221 + 11*220
= 32 + 16 + 0 + 4 + 0 + 1 = 53
V 0.5

Least Significant Digit


Most Significant Digit
53 = 0b 110101

Most Significant Digit


(has weight of 25 or
32). For base 2, also
called
ll d Most
M Si
Significant
ifi
Bit (MSB). Always
g
LEFTMOST digit.

Leastt Significant
L
Si ifi t Digit
Di it
(has weight of 20 or 1).
For base 2, also called
Least Significant Bit
(LSB). Always
RIGHTMOST digit.
V 0.5

More Conversions
Convert 53 to Hex
53/16 = 3, rem = 5
3 /16 = 0,
0 rem = 3
53 = 0x35
= 3 * 161 + 5 * 160
= 48 + 5 = 53

V 0.5

10

Hex ((base 16)) to Binaryy Conversion


Each Hex digit
g represents
p
4 bits. To convert a Hex number to
Binary, simply convert each Hex digit to its four bit value.
Hex Digits
g to binary:
y
0x0 = 0b 0000
0x1 = 0b 0001
0x2 = 0b 0010
0x3 = 0b 0011
0x4 = 0b 0100
0x5 = 0b 0101
0x6 = 0b 0110
0x7 = 0b 0111
0x8 = 0b 1000

Hex Di
H
Digits
it to
t binary
bi
(cont):
( t)
0x9 = 0b 1001
0xA = 0b 1010
0xB = 0b 1011
0xC = 0b 1100
0xD = 0b 1101
0xE = 0b 1110
0xF = 0b 1111
V 0.5

11

Hex to Binary,
Binary Binary to Hex
0xA2F = 0b 1010 0010 1111
0x345 = 0b 0011 0100 0101
Binary to Hex is just the opposite, create groups of 4 bits
starting with least significant bits. If last group does not
h
have
4 bi
bits, then
h padd with
i h zeros for
f unsigned
i d numbers.
b
0b 1010001 = 0b 0101 0001 = 0x51

Padded with a zero


V 0.5

12

A Trick!
If faced with a large binary number that has to be
converted to decimal, I first convert the binary number
to HEX,
HEX then convert the HEX to decimal.
decimal Less work!
0b 110111110011 = 0b 1101 1111 0011
=
D
F 3
= 13 * 162 + 15 * 161 + 3*160
= 13 * 256 + 15 * 16 + 3 * 1
= 3328 + 240 + 3
= 3571
Of course, you can also use the binary, hex conversion feature
on your calculator. Too bad calculators wont be allowed on the
first
s test,
es , though...
oug ...
V 0.5

13

Binaryy Numbers Again


g
Recall than N binary digits (N bits) can represent unsigned
integers from 0 to 2N-1.
1
4 bits = 0 to 15
8 bits = 0 to 255
16 bits = 0 to 65535
Besides
B
id simply
i l representation,
t ti we would
ld like
lik to
t also
l do
d
arithmetic operations on numbers in binary form.
Principle operations are addition and subtraction.

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14

Binary Arithmetic, Subtraction


The rules for binary arithmetic
are:

The rules for binary subtraction


are:

0 + 0 = 0, carry = 0

0 - 0 = 0, borrow = 0

1 + 0 = 1, carry = 0

1 - 0 = 1,, borrow = 0

0 + 1 = 1, carry = 0

0 - 1 = 1, borrow = 1

1 + 1 = 0,
0 carry = 1

1 - 1 = 0,
0 borrow
b
=0

Borrows Carries from digits to left of current of digit.


Borrows,
digit
Binary subtraction, addition works just the same as
decimal addition, subtraction.
V 0.5

15

Binary,
y, Decimal addition
Decimal

Binary
0b 101011

34
+ 17
-----51
from LSD to MSD:
7+4 = 1; with carry out of 1
to next column
1 (carry) + 3 + 1 = 5.
answer = 51.
51

+ 0b 000001
--------------101100
From LSB to MSB:
1+1 = 0,
0 carry of 1
1 (carry)+1+0 = 0, carry of 1
1 (carry)+0 + 0 = 1, no carry
1 +0 = 1
0+0=0
1+0=1
answer = % 101100
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16

Hex Addition
Decimal check.
0x3A
0x3A = 3 * 16 + 10
= 58
0x28 = 2 * 16 + 8
= 40
58 + 40 = 98

+ 0x28
-------0x62
A+8 = 2; with carry out of
1 to next column

0x62 = 6 * 16 + 2
= 96 + 2 = 98!!

1 (carry) + 3 + 2 = 6.
answer = 0x62
V 0.5

17

Hex addition again


Why is 0xA + 0x8 = 2 with a carry out of 1?
The carry out has a weight equal to the BASE (in this case
16). The digit that gets left is the excess (BASE - sum).
Ah + 8h = 10 + 8 = 18.
18 is GREATER than 16 (BASE), so need a carry out!
Excess is 18 - BASE = 18 - 16 = 2, so 2 is digit.
Exactly the same thing happens in Decimal.
5 + 7 = 2, carry of 1.
5 + 7 = 12, this is greater than 10!.
So excess is 12 - 10 = 2, carry of 1.
V 0.5

18

Subtraction
Decimal

Bi
Binary

900

0b 100

- 001
------899

- 0b 001
------011

0-1 = 9; with borrow of 1


f
from
nextt column
l
0 -1 (borrow) - 0 = 9, with
borrow of 1
9 - 1 (borrow) - 0 = 8.
Answer = 899.

0-1 = 1; with borrow of 1


from next column
0 -1 (borrow) - 0 = 1, with
borrow of 1
1 - 1 (borrow) - 0 = 0.
Answer = % 011.
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19

Hex Subtraction
Decimal check.
0x34
0x34 = 3 * 16 + 4
= 52
0x27 = 2 * 16 + 7
= 39
52 - 39 = 13

- 0x27
---------0x0D
4 7 = D; with borrow of 1
4-7
from next column

0x0D = 13 !!
3 - 1 (borrow) - 2 = 0.
answer = 0x0D.
V 0.5

20

Hex subtraction again


g
Whyy is 0x4 0x7 = 0xD with a borrow of 1?
The borrow has a weight equal to the BASE (in this case
16).
16)
BORROW +0x4 0x7 = 16 + 4 - 7 = 20 - 7 = 13 = 0xD.
0xD is the result of the subtraction with the borrow.
Exactlyy the same thingg happens
pp
in decimal.
3 - 8 = 5 with borrow of 1
borrow + 3 - 8 = 10 + 3 - 8 = 13 - 8 = 5.
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21

Fixed Precision
Withh paper andd pencil,
Wi
il I can write
i a number
b with
i h as many digits
di i as
I want:
11,027,80,032,034,532,002,391,030,300,209,399,302,992,092,920
027 80 032 034 532 002 391 030 300 209 399 302 992 092 920
A microprocessor or computing system usually uses FIXED
PRECISION for integers;
g ; theyy limit the numbers to a fixed
number of bits:
0x AF4500239DEFA231
0x
9DEFA231
0x
A231
0x
31

64 bit number, 16 hex digits


32 bit number, 8 hex digits
16 bit number, 4 hex digits
8 bit number,, 2 hex digits
g

High end microprocessors use 64 or 32 bit precision; low end


microprocessors use 16 or 8 bit precision.
precision
V 0.5

22

Unsigned
g
Overflow
In this class I will use 8 bit precision most of the time, 16 bit
occasionally.
occasionally
Overflow occurs when I add or subtract two numbers, and the
correct result is a number that is outside of the range of
allowable numbers for that precision. I can have both
unsigned and signed overflow (more on signed numbers later)
8 bits -- unsigned integers 0 to 28 -1 or 0 to 255.
16 bits
bi -- unsigned
i d integers
i
0 to 216-11 or 0 to 65535
N bit unsigned numbers 0 to 2N-1
V 0.5

23

Unsigned Overflow Example


Assume 8 bi
A
bit precision;
ii
ie.
i I cant
store any more than
h 8 bits
bi for
f
each number.
Lets add 255 + 1 = 256
256. The number 256 is OUTSIDE the
range of 0 to 255! What happens during the addition?
255 = 0x FF

/= means Not Equal

+ 1 = 0x 01
------------------256 /= 0x00
0xF + 1 = 0,
0 carry out
0xF + 1 (carry) + 0 = 0, carry out
Carry out of MSB falls off end, No place to put it!!!
Fi l answer is
Final
i WRONG bbecause could
ld nott store
t
carry out.
t
V 0.5

24

Unsigned
g
Overflow
A carry out of the Most Significant Digit (MSD) or Most
Significant Bit (MSB) is an OVERFLOW indicator for addition
of UNSIGNED numbers.
The
h correct result
l has
h overflowed
fl
d the
h number
b range for
f that
h
precision, and thus the result is incorrect.
If we could
ld STORE th
the carry outt off th
the MSD
MSD, th
then th
the answer
would be correct. But we are assuming it is discarded because
of fixed precision, so the bits we have left are the incorrect
answer.

V 0.5

25

Binary Codes (cont.)


N bits (or N binary Digits) can represent 2N different values.
((for
o example,
e
p e, 4 bits
b s can
c represent
ep ese 24 oor 166 different
d e e values)
v ues)
N bits can take on unsigned decimal values from 0 to 2N-1.
Codes usually given in tabular form.
000
001
010
011
100
101
110
111

black
red
pink
yellow
brown
blue
green
white

V 0.5

26

Codes for Characters


Also need to represent Characters as digital data.
The ASCII code (American Standard Code for
Information Interchange) is a 7-bit
7 bit code for Character
data. Typically 8 bits are actually used with the 8th bit
being zero or used for error detection (parity checking).
8 bits = 1 Byte.
A = % 01000001 = 0x41
& = % 00100110 = 0x26
7 bits can only represent 27 different values (128)
(128). This
enough to represent the Latin alphabet (A-Z, a-z, 0-9,
punctuation marks, some symbols like $), but what about
other
h symbols
b l or other
h languages?
l
V 0.5

27

ASCII
American Standard
Code for Information
Interchange

V 0.5

28

UNICODE
UNICODE is a 16-bit code for representing alphanumeric data.
With 16 bits, can represent 216 or 65536 different symbols.
16 bits = 2 Bytes per character (the extended version uses 32
32-bits
bits
per character, or 4 bytes, for 4,294,967,296 different symbols).
0x0041-005A A-Z
0x0061-4007A a-z
Some other alphabet/symbol ranges
0x3400-3d2d
0x3040-318F
0 4E00 9FFF
0x4E00-9FFF

Korean Hangul Symbols


Hiranga, Katakana, Bopomofo, Hangul
Han
H (Chinese,
(Chi
JJapanese, K
Korean))

UNICODE used byy Web browsers,, Java,, most software these


days.
V 0.5

29

Number System Practice


What should you practice?
Hex to decimal, decimal to hex conversion
Hex to binary, binary to hex conversion
Hex addition
addition, subtraction

V 0.5

30

Basic Logic Gates

Copyright 2005. Thomson/Delmar Learning, All rights


reserved.

V 0.5

31

Majority Gate (and-or) form

C
Copyright
i h 2005.
2005 Thomson/Delmar
Th
/D l
Learning,
L
i All rights
i h
reserved.

V 0.5

32

DeMorgans Law

Copyright 2005. Thomson/Delmar Learning, All rights


reserved.

V 0.5

33

Majority Gate (nand-nand) form

Copyright 2005. Thomson/Delmar Learning, All rights


reserved.

V 0.5

34

Representing 1 and 0
In the electrical world, two ways of representing 0 and 1
are (these are not the only ways):
Presence or absence of electrical current
Different Voltage levels

Different voltage levels are the most common


Usually 0v for logic 0, some non-zero voltage for logic 1 (I.e.
> 3 volts)

Can interface external sources to digital systems in many


ways
Switches, buttons, other human controlled input devices
Transducers (change a physical quantity like temperature into a
digital quantity).
V 0.5

35

Switch Inputs
High True switch
Vdd

Vdd

Vdd is power
supply voltage,
typically 5V or
3.3V
H

Gnd is 0 V
Gnd

Gnd

Switch closed ((asserted),


),
output is H

Switch open
(negated), output is L
V 0.5

36

Examples of high, low signals


Vdd

Vdd

Low True switch

Gnd

Gnd

Switch closed ((asserted),


),
output is L

Switch open (negated),


output is H
V 0.5

37

CMOS transistors (P, N)


S: source
G: gate
D: drain

transistor
operation of P, N
types is
complementary
to each other

Copyright 2005. Thomson/Delmar Learning, All rights


reserved.

V 0.5

38

Inverter gate - takes 2 transistors

PMOS is open (off)

NMOS is Closed (on)

PMOS is closed (on)

NMOS is Open (off)

Copyright 2005. Thomson/Delmar Learning, All rights


reserved.

V 0.5

39

Buffer - takes 4 transistors

Copyright 2005. Thomson/Delmar Learning, All rights


reserved.

In digital logic,
logic NMOS must be connected to ground,
ground PMOS to
VDD.
V 0.5
40

NAND gate - takes 4 transistors


AB Y
L L H
L H H
H L H
H H L
AB
0 0
0 1
1 0
1 1

Y
1
1
1
0

out

V 0.5

41

Another logic gate - takes 4 transistors

AB
0 0
0 1
1 0
1 1

V 0.5

42

How do we make an AND gate?


The only
Th
l way with
i h CMOS transistors
i
iis to connect an iinverter
after a NAND gate.

Copyright 2005. Thomson/Delmar Learning, All rights


reserved.

Takes 6 transistors! In CMOS technology, NAND gates are


preferable to AND gates because they take less transistors, are
faster, and consume less power.
V 0.5

43

Tri-State Buffer
There iis another
Th
h way to d
drive
i a li
line or bus
b ffrom multiple
li l
sources. Use a TRISTATE buffer.
EN
A

EN
A

When EN = 1, then Y = A.
When EN = 0, then Y = ??????
Y is undriven, this is called the high impedance state.
Designate high impedance by a Z.
g impedance)
p
)
When EN = 0,, then Y = Z ((high
V 0.5

44

Usingg Tri-State Buffers ((cont))


Only A or B is enabled at a time.
S
A
Y
B
Implements
p
2/1 Mux function
If S=0 then Y = A
If S=1
S 1 then Y = B
V 0.5

45

Combinational Building Blocks, Mux

Copyright 2005. Thomson/Delmar Learning, All rights


reserved.

V 0.5

46

Binaryy Adder
F (A,B,C) = A xor B xor C

G = AB + AC + BC

These equations look familiar. These define a Binary Full


Adder :
A B

Sum = A xor B xor Cin


Cout

Co

Ci

Cin

Cout = AB + Cin A + Cin B


= AB + Cin (A + B)

Full Adder (FA)


Sum

V 0.5

47

4 Bit Ripple Carry Adder


A(3) B(3)

Cout C(4) A

Co

A(2) B(2)

C(3)

Ci

Co

Ci

A(1) B(1)

C(2)

Co

Ci

Sum(3)

Sum(2)

Sum(1)

A(0) B(0)

C(1)

Co

Ci

C(0)

Cin

Sum(0)

A[3:0]
[ ]
B[3:0]

SUM[3:0]

V 0.5

48

Incrementer
A(3)

A(2)

A(1)

A(0)
EN

xor

xor

xor

xor

Y(3)

Y(2)

Y(1)

Y(0)

A[3:0]

inc

Y[3:0]

If EN = 1 th
then Y = A + 1
If EN = 0 then Y = A

EN
V 0.5

49

Combinational Right Shifter


A combinational block that can either shift right or pass data
unchanged

Copyright 2005. Thomson/Delmar Learning, All rights


reserved.

If EN = 1 then Y = A >> 1
If EN = 0 then Y = A
V 0.5

50

Understandingg the shift operation


p
MSB
LSB
0x85 =
1 0 0 0 0 1 0 1
SI = 0
00x42
42 =
SI = 0

0 1 0 0 0 0 1 0

1st right shift

0x21 =
SI = 0

0 0 1 0 0 0 0 1

2nd right shift

0x10 =

0 0 0 1 0 0 0 0

3rd right shift

Et
Etc.
V 0.5

51

Right
g Shift vs. Left Shift
A right shift is MSB to LSB (divide by 2)
In:
SIN

D7 D6

D5

D4

D3

D2

D1

D0

Out:

SIN D7 D6 D5 D4 D3 D2 D1
7
6
5
4
3
2
1
0
A left shift is LSB to MSB (multiply by 2)
In:

D7 D6

D5

D4

D3

D2

D1

D0
SI

Out:

D6
7

D5
6

D4
5

D3
4
V 0.5

D2
3

D1
2

D0 SI
1
0
52

Recall Basic Memoryy Definition


Example:

KxN

16 x 8
Address[log2(K)-1:0]

M
E
M

Data[N-1:0]

(16 locations requires


log2(16) = 4 address lines,
each
h llocation
i stores 8 bits.
bi
Address bus: A[3:0]

K locations, N bits per location

Data bus: D[7:0]

Address bus has log2(K) address lines, data bus has N data
lines.

V 0.5

53

Memory: Implement Logic or Store Data


F (A,B,C) = A xor B xor C

G = AB + AC + BC
8 x 2 Memory

ABC
00 0
00 1
01 0
01 1
10 0
10 1
11 0
11 1

F
0
1
1
0
1
0
0
1

G
0
0
0
1
0
1
1
1

A
B
C

Recall that Exclusive OR (xor) is


AB
0 0
0 1
1 0
1 1

Y
0
1
1
0

Y = AB
= A xor B

V 0.5

A2
A1

D1
DO

F
G

A0

LookUp Table (LUT)


A[2 0] iis 3 bit address
A[2:0]
dd
bus, D[1:0] is 2 bit
output bus.
Location 0 has 00,
Location 1 has 10,
Location 2 has 10,
10 ,
etc.
54

Clock Signal Review

Pw
voltage

rising edge

- period
i d (i
(in seconds)
d )
time

Pw - pulse
l width
idth (i
(in seconds)
d )

f - frequency pulse width (in Hertz)

duty cycle - ratio of pulse width to period (in %)


millisecond ((ms))
-3
10
microsecond (s)
-6
10
nanosecond (ns)
-9
10
Slide by Prof Mitch Thornton

falling edge

f = 1/
duty cycle = Pw /

Kilohertz ((KHz))
3
10
Megahertz (MHz)
6
10
Gigahertz (GHz)
9
10
V 0.5

55

Storage Element: The D Flip-Flop

D: data input
CK: clock input
S : sett input
i t (asynchronous,
(
h
low
l true)
t )
R: reset input (asynchronous, lowV 0.5
true)

56

Synchronous
y
vs Asynchronous
y
Inputs
p
Synchronous input: Output will change after active clock edge
A h
Asychronous
iinput: Output
O
changes
h
iindependent
d
d off clock
l k
St t elements
State
l
t often
ft have
h
async set,
t resett control.
t l
S

D input is synchronous with respect to Clk

D
Q
C
R

S, R are asynchronous. Q output affected by S, R


i d
independent
d off C.
C Async
A
inputs
i
are dominant
d i
over
Clk.

V 0.5

57

Registers
The most common sequential building block is the register. A
register is N bits wide and has a load line for loading in a new
value into the register.

Note that DFF simply loads old value when LD = 0. DFF


i loaded
is
l d d every clock
l k cycle.
l
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reserved.

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58

Counter
Veryy useful sequential
q
buildingg block. Used to generate
g
memoryy
addresses, or keep track of the number of times a datapath
operation is performed.

Copyright 2005. Thomson/Delmar Learning, All rights


reserved.
d

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59

Shift Register
Very useful sequential building block.
block Used to perform either
parallel to serial data conversion or serial to parallel data
conversion.

Copyright 2005. Thomson/Delmar Learning, All rights


reserved.
d

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Computer = Sequential+ Combinational


building blocks/logic
The next chapter will discuss using combinational
+ sequential
q
building
g blocks to build a computer
p

Combinational logic
Memory
Register
Counter

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What do you need to Know?

Convert hex, binary integers to Decimal


Con ert decimal integers to hex,
Convert
he binary
binar
Convert hex to binary, binary to Hex
N bi
binary digits
di it can representt 2N values,
l
unsigned
i d
integers 0 to 2N-1.
Addition,
Additi subtraction
bt ti off binary,
bi
hex
h numbers
b
Detecting unsigned overflow

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What do you need to know? (cont)


ASCII, UNICODE are binary codes for character
data
Basic two-input Logic Gate operation
p
NMOS/PMOS Transistor Operations
Inverter/NAND transistor configurations
Tri-state
state buffer operation
Tri
Mux, Memory, Adder operation
Clock signal definition
DFF, Register, Counter, Shifter register operation
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