Multicore Question Bank
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VALLIAMMAI ENINEERING
COLLEGE, KATTANKULATHUR
DEPARTMENT OF COMPUTER SCIENCE & ENGG.
CS7103 MULTICORE ARCHITECTURE
ME: I SEM
UNIT I
Part A
1.What is instruction level parallelism?
2. What are the advantages of loop unrolling?
3. What are the limitations of VLIW?
4. What is the use of branch-target buffer?
5. Distinguish between shared memory multiprocessor and message passing multiprocessor.
6. Differentiate multithreading computers from multiprocessor systems.
7. What is fine-grained multithreading and what is the advantage and disadvantages of fine- grained
multithreading?
8.What is Amdhals law?
9.What is multicore processor and what are the application areas of multi-core processors?
10. What is a Cell Processor?
11. State the principle of locality and its types.
12. What are the choices for encoding instruction set.
13. how the CPI is calculated?
14. What is loop unrolling?
15. Define multiprocessor cache coherence.
16. What are the approaches used for multithreading?
17. Which block should be replaced on a cache Miss?
18. How is cache performance improved?
19. What is hazard? State its types.
20. Mention the techniques available to measure the performance.
Part B
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UNIT II
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Part B
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8. What are the major advantages for
message passing communication?
9. What is multiprocessor Cache Coherence?
10. What is cache coherence problem and when do you say a memory system is coherent? What are
cache coherence protocols?
11. What is cache consistency?
12. What is write serialization?
13. What is snooping? What are the various snooping protocols?
14. What are write invalidate and write update protocols?
15. What are write through and write back caches?
16. What are ownership misses and coherence misses?
17. Compare true sharing and false sharing misses.
18. What are cold misses, coherence misses and conflict misses?
19. What is a working set effect?
20. Give a performance of snooping cache schemes.
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PART B
Explain in detail the symmetric shared memory architectures with reference to multiprocessor
cache coherence problem.
Explain in detail the schemes available for enforcing coherence. Discuss its implementation
techniques with suitable state diagrams.
With relevant graphs, discuss the performance of symmetric shared-memory multiprocessors for
various workloads.
Explain in detail the distributed shared memory architecture highlighting the directory based
cache coherence protocol. Substantiate your explanation with suitable examples and state
diagrams.
Explain cache and memory states in multichip multicore processor
Explain in detail the memory consistency models.
Explain how thread level parallelism within a processor can be exploited? With suitable
diagrams, explain simultaneous multithreading, its design challenges and potential performance
enhancements.
Explain multiprocessor Cache Coherence?
Explain Multiprogramming and OS workload
Explainthe limitations in Symmetric shared memory multiprocessor and snooping protocols
UNIT IV
PART A
1. WHAT IS wsc?
2. What is RLP?
3. What is DLP?
4. Define computer clusters
5. Difference between data centre and WSC
6. What is oversubscription?
7. Define array switch
8. How is wet-bulb temperature calculated?
9. What is power utilization effectiveness
10. Define cloud computing
11. What is a virtual machine?
12. Explain servers in google
13. Explain networking in google
14. Can flash memory replace disk to improve performance of WSC
15. What is a hybrid datacenter
16. What is the function of Mapreduce?
17. Define NAS.
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PART B
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