EC201 - Tutorial 3 - Solutions

October 17, 2006

Problem 1

| Id3 |= 170 A and so Vg3 = Vd2,4 = 4 V1

5V

(10/1)

4V

M1
10A

M2

(40/1)
4V

2M
3V

Vi

M4

(10/1)

3M

The small signal circuit is shown in fig 2 with all the

necessary parameters. The equivalent circuit is shown in
the next figure and for convenience, it has been redrawn
as shown in fig 4.

M3

(170/1)

Input and Output impedance

The input impedance is given by

2.1V

RE = 10K

2M k 3M = 1.2 M
Vout

The output impedance is given by

Rout = (RE k ro3 ) k Ref f
To find Ref f :
As seen in fig 5,

Figure 1: Problem1

DC operating point

vg3
ro2

We have

Solving these two equations, we get

ro4 + ro2
Ref f =
= 11.62
(1 + gm3 ro2 )(1 + gm4 ro4 )

3
Vdd = 3 V
5
By current mirroring,(assuming = 0)
Vg4 =

So, the output impedance is given by

| Id2 |= Id4 = 40 A

Rout = (RE k ro3 ) k 11.62 11.62

So, assuming all the transistors are in saturation region,

we get

Small Signal gain

Voverdrive,2 = Voverdrive,4 = 0.2 V

So,

vout vg3
+ gm3 .vg3 and
ro4
vout vg3
= gm4 .vout +
ro4

i = gm4 .vout +

We determine the small signal gain using the short circuit

current and the output impedance. Fig 6 shows the circuit
with the output being shorted.

Vg2 = 4 V and Vs4 = 2.1 V

Therefore, as
Vs4
I RE =
= 210 A, we have,
RE

1 It

only

can be easily verified that the transistors are in saturation region

G4

vi

G3
ro4

gm4vgs4

S4

3M
gm2 = 400 S

gm4 = 400 S

ro2 = 250 K

RE ro3

gm3 = 1.7 mS

ro4 = 250 K

vout

2M

ro2

gm3vsg3

ro3 = 58.8 K
S3

M2

Figure 4:

M3

We see that,

M4

vi
3M

RE = 10K

2M

isc

vout

= iro2 (1 + gm3 ro2 )

ro4
(1 + gm3 ro2 )
= gm4 vg4 .
ro2 + ro4
ro4
= gm4 vi .
(1 + gm3 ro2 )
ro2 + ro4
Thus,

Figure 2: Small signal circuit

Av

ro2

gm3Vsg3

vi

ro3

S4

3M

2M

Maximum allowable input signal

Clipping can occur when either M2, M3 or M4 go out of
the saturation region. Calculations will show that the gain
from Vi to Vg3 is equal to -0.005. Thus, it is quite right to
consider node Vg3 to be at AC ground. So, clipping will
happen

ro4

gm4Vgs4

= isc .Rout
ro4
= gm4
(1 + gm3 ro2 ) .Rout
ro2 + ro4
= (85.2m)11.62 = 0.99

S3

G3

G4

= iro2 gm3 vg3

= iro2 + gm3 iro2 ro2

RE = 10K

vout

when Vout goes above 4.8 V as M3 enters linear region. This translates to an input swing of approximately 2.7 V.
when Vi reaches 0.9 V or Vout reaches 0 V as any
further decrease in Vi will not be tracked by Vout .

Figure 3: Small signal equivalent circuit

when Vout reaches 3.8 V as M4 enters linear region.

This corresponds to an input swing of 1.7 V
2

Vdd 5 V

(10/1)

G3

M1

4V
1.5M

ro4

gm4vs4

S4

M2

ro2

vout

2.5M

Reff

gm3vg3

10 uA

S3
Figure 5: To calculate Ref f

40 uA

3V
M3

2V

(40/1)

(40/1)

1M

Figure 7: Problem 2 : DC analysis

Thus, we see that of all the above situations, the constraint for M4 to remain in saturation region is the most
stringent one and hence, the maximum input swing allowable is 1.7 V on both directions.

G4

vi

gm4vg4

S4

3M

G3

Problem 2

ro4

DC Operating Points

vout
isc

ro2

For transistor M1

-gm3vg3

Kp W 1
2
(VSG1 |VT P |) = IM 1
2 L1

S3

(VSG1 |VT P |) = 0.04

VSG1 = 1 V

Figure 6: To calculate Isc

VSD1 = VSG1 = 1 V

Voltage at gate of Transistor M2,

3

Vin

VG2

= 5V

2.5 M

Vout

1M
1M + 1.5M

1.5 M 1 M

r1

r2

gm3(Vin - Vout)

= 2V
Also, VSG2

= 1V

Current through transistor M2

Vin

R1

Vout

W2 /L2
IM 1
W1 /L1
= 4IM 1

IM 2

R2

gm3(Vin - Vout)

= 40A
Figure 8: Small Signal Equivalent circuit
Therefore
VD1 = VG2 + 1 V
VD1 = 3 V
VSD1 = 2 V
and
VSD2 = 3 V

Let 1.5M ||1M ||r2 ||r3 = R2 and R1 = 2.5M

Solving the equivalent circuit,
vout
vin
Av

R2 (1 + gm3 R1 )
R1 + R2 (1 + gm3 R1 )
= 0.9763
=

Small signal gain

We obtain the transconductances of the transistors

gm1

Input Impedance
From the equivalent circuit,

W
(VSG1 |VT P |)
L
= 0.1mS
= Kp

Zin

gm2 = 0.4mS
gm3 = 0.4mS

R1
1 Av
2.5M
=
1 0.9763
= 105.6M
=

And the output resistances of the transistors,

r2

100
=
gm1
= 1M
= 250K

r3

= 250K

r1

Output Impedance
From the circuit,
Zout

= R1 ||R2 ||
= 2.44K

1
gm3

Vdd 5 V

R1

R2

Zout

(10/1)

1 / gm3

M2

M1

(40/1)

1.5M

Figure 9: Circuit for computing Output impedance

3V
M3

2V

(40/1)
1.6 V

Largest Input Sinusoid

For a small signal input vi ,the output voltage,
10 uA

Vout = 3 + Av vi , Av = 0.9763
For M2 to be in saturation,

1M

40 K

Figure 10: Problem 3 : DC analysis

3 + Av vi < 4.8 V
vi < 1.84 V
For M3 to be in saturation,

Hence VG (M 1) = 4 V = VG (M 2)
Due to current mirroring
ID (M 2) = 40 A = ID (M 3)
0 (2 + vi ) < |VT p |
Hence VSG (M 3) = 1 V from (1)
vi > 2.8 V
1
5V = 2V
VG (M 3) =
2.5
VS (M 3) = 3 V = VD (M 2)
Since ID (M 3) = 40 A
Therefore, the maximum amplitude of the input V (M 3) = 40 A 40 K = 1.6 V
D
sinusoid is 1.84 V.
Small Signal gain

Problem 3

W
gm = Kp (VSG VT p ) = 400 S
L
gm r0 = 100 Hence r0 = 250 K

DC operating point

Calculating small signal gain from Fig 11 :

The DC picture of the circuit has been shown in

Fig 10
ID (M 1) = 10 A
ID = K p

W
(VSG |VT p |)2
2L

40 uA

Let the small signal voltage at node a be v

By Kirchoffs Law at node a
v
v vout
vi v
+
+ gm v =
ro
r0
20 K

(1)

A
and |VT p | = 0.8 V
V2
Hence VSG (M 1) = 1 V

Given Kp = 50

Applying Kirchoffs Law at node b

20 K
+

20 K

ro

v
gmv
-

vi

ro

vout
+

40 K

ro

gmv
-

Figure 11: Small signal analysis

iout

vout

40 K

rout

v vout
vout
gm v +
=
r0
40 K
On solving these equations:

Figure 12: Calculating the output impedance

vout
10100
Av =
=
= 1.73
vi
5833
For a small signal input vi
the voltage at node a is

Input Impedance
vi v
20 K
vi
ri =
= 22.84 K
ii

ii =

3+

Output Impedance

2.84
vi
22.84

For M2 to be in saturation,

Calculating output impedance from Fig 12 :

Let small signal voltage at node a be v
By applying Kirchoffs Law at node a

3+

v
v
vout v
+
+ gm v =
r0
20 K
r0

2.84
vi
22.84
vi

< 4.8V
< 14.5V

For M3 to be in saturation,

By applying Kirchoffs Law at node b

gm v + iout =

vout
vout v
+
40 K
r0

(1.6 + Av vi ) 2 < |VT p |, Av = 1.73

vi

On solving these equations:

rout

< .69V

For M3 to be not in cut-off,

vout
=
= 39.26 K
iout

3+

Largest Input Sinusoid

2.84
vi 2 > |VT p |
22.84
vi > 1.6V

VDD

Writing equation for the current in M1

W
(VDD V1 |VT p |)2
2L
Writing equation for the current in M2

(2)

4W
(VDD IR V1 |VT p |)2
2L
Writing equation for the current in M3 (and M4)

(3)

I = kp

R
(4W/L)

I
M2
V1

I
(W/L)

M1

(W/L)

W
(V2 VT n )2
2L
From (1) and (2), we get

M3

(4)

I = kn

V2
M4

I = kp

VDD V1 |VT p | = 2IR

(W/L)

Substituting back in (2), we get

I=

1
2kp W
L

1
R2

and

Figure 13: circuit for problem 4

V1 = VDD |VT p |

(5)
1
kp W
L

(6)

Using (3) and (4), we can solve for V2

1
1
+ VT n
R
k p kn W
L

(7)
We also have to make sure that small signal current
into M3 does not exceed the DC current ID
From Fig 11
Transconductance
v vout
Small signal current into M3 = iab = gm v +
We know that
r0
r
29
10100
W
W
From above calculations v =
vout & vout =
vi
gm,M1 = kp (VSG |VT p |) = 2kp I
404
5833
L
L
Hence iab = 43.288vi
ID (M 3) iab = 0
Using (4)
On solving we get vi = 0.924 V
1
gm,M1 =
(8)
R
Therefore, the maximum amplitude of the input
We see that gm,M1 is independent of all device paramsinusoid is 0.69 V.
eters and depends only on the value of the resistor.
V2 = p

This is a fixed-gm bias circuit. If the current is used

to bias any MOSFET, then its transconductance would
also track R1 . This is advantageous as the resistor value
is precise. Also, normally, gm depends on device parameters which in turn depend on temperature. We have got
around that problem by using this circuit. It is also worth
noting that all the calculations hold good only as long as
the square-law approximation holds.

Problem 4
Evaluation of operating points
Because of the presence of the nMOS current mirror, the
current in both branches remain the same (say I).
7

Calculation of minimum VDD

5V
M1
(10/1)

Lets evaluate the minimum voltage to keep transistors in

saturations on both branches.
Lets take the path from VDD to GND through M1. The
minimum voltage required to keep the transistors in saturation is the sum of the overdrive of the bottom NMOS
transistor M3 and VSG of M1.

vi

10 uA

M6
(10/1)

VDD1 = VSG |M 1 + (VGS VT n )|M 3

s
s
2I
2I
=
+ |VT p | +
W
kp L
kn W
L
1
kp W
L

+ |VT p | + p

1
k n kp W
LR

M3
(100/1)

RL

M5
(10/1)

The small signal model of the circuit is given below

Rf

Using the values from the previous calculations, we have

vi

1
1
+VT n +
+p
(10)
W
W
2kp L R
2kp W
kn kp L R
LR

gm4 vi

vi

(11)

VDD = max(VDD1 , VDD2 )

Problem 5)

+ v2
ro4 ||ro5
-

gm4 vi

vout
+
RL ||ro3 ||ro2

gm3 vgs2

Rout

Rf

Rin

Hence, the minimum VDD required to maintain the transistors in saturation is

+v2
ro4 ||ro5
-

gm3 v2

vout
+
RL ||ro3 ||ro2 ||1/gm3
-

Figure 15: Small Signal equivalent

The circuit for this problem is shown above for clarity.From the above we can compute the operating point
information which is tabulated below
M1
1
1
10

vout

b)

VDD2 = (VSG |VT p |)|M 2 + VGS |M 4 + IR

s
s
2I
2I
=
+
+ VT n + IR
W
kp 4W
k
n L
L

|VGS |(V)
|VDS |(V)
ID (A)

3.1 V

0.8 V

4.1 V

(9)

Lets take the path from VDD to GND through the resistor.
Here, we have to account for the overdrive of M2 and VGS
of M4 and the drop in the resistor

VDD2 =

(40/1)
M4
Rf

4.1 V

Figure 14: DC analysis

Using the values from the previous calculations, we have

VDD1 =

M2
(100/1)

4V

M2
1
0.9
100

M3
1
4.1
100

M4
0.9
1.9
10

M5
0.8
3.1
10

From this we can compute the input and output

resistance as
The input resistance is measured as mentioned in the
previous problems.A similar procedure is applied to
compute the output impedance that is the test voltage is
applied at the output node now and the input node is open
circuited.So we get

M6
0.8
0.8
10
8

VD = 4.1Vand this gives rise to the condition

Rin =
Rout

where R

Rf + R
1 + Gm R
1
=
||R
Gm

1
gm3

similarly for M5 to be in saturation we have

||ro3 ||ro2 ||RL

and Gm

gm4 (ro4 ||ro5 )gm3

From the above expressions we can compute the values
of the input and the output impedance to be Rin = 429
and Rout = 19.6
This is a current controlled voltage source and hence
the transfer parameter for this circuit is the Transresistance. The transresistance is measured by driving the
input with a current source and then finding the volatge at
the output node. So by this the transresistance is given by

RT =

VDD VD (|Vgs2 | |Vtp |)

= 14 mV
Av

similarly for M4 to be in saturation we have

1 G m Rf
= 19.57 K
1
Gm +
R

1.8
= 35.3 mV
51

so from this we see that imax = 14 mV

Once we get the maximum input volage that can be
applied we can compute the maximum input current by
simply dividing it by the input resistance Rin

c)
iimax =

In this case we compute the maximum input signal that

can be applied to the amplifier such that none of the
devices enter into ohmic region.
The voltage gain of the circuit is given by

Av =

3
= 60 mV
50

imax
= 32.6 A
Rin

Problem 6
Va can be found from the current equation of M4

R
(1 Gm Rf ) = 45.62 V/V
R + Rf

Kp
100 =
2
Va = 4 V

First we see that the devices M2,M4,M5 are the

ones whose operating regions are functions of the input
voltage. So for operation we can derive 3 conditions on
the maximum peak vlaue of the input siganl.And then
choose the intersection of the values
For device M2 to be in saturation we want that
|Av |i +VD VDD (|Vgs2 ||Vtp |) where,VDD = 5V

W
L

(VDD Va |VT p |)

Similarly using the current equation of M5

5V

1.1

= 0.1

x 10

ID1

1.08

M1
Va = 4 V

M5
(100/1)

(100/1)
M2

(100/1)
ID1

ID2

1.04
1.02

VY

ID

M4
(100/1)

M3
(100/1)

Vb = 3 V

ID2

1.06

1
0.98
0.96
0.94

100uA

0.92
0

VX

0.5

1.5

VX

2.5

3.5

Figure 17: Currents for = 0

Figure 16: Current mirror

Kp
100 =
2
Vb = 3 V

W
L

(Va Vb |VT p |)2

of the VX is felt at its drain terminal VY . This can

be realised by looking at the small signal model of the
cascode in figure 18. This circuit can be simplified to the
circuit shown in figure 19.

If = 0 then VY = Va for 0 VX < Vb + |VTp |

ID1
ID2

=
=

1/gds2
vY

 
Kp W
(VDD Va |VT p |)2
2
L
 
Kp W
2
(VDD Va |VT p |)
2
L

gm3 vY

1/gds3

Hence ID1 = ID2 for = 0, and is constant over the

vX
entire range of VX .
For = 0.1 the mosfets no longer behave as ideal curFigure 18: Small signal equivalent of cascode current mirrent sources in saturation, since the current also depends
ror
on the voltage between the drain and source terminals.
In M1 , any change in VX is entirely reflected on its
drain terminal. Whereas, in M2 , only a small portion
10

1/gm3

1/gds2
vY
1/gds3

gm3vY
vX

Figure 19: Modulation of vY due to change in vX

vY
vX

1.4

gds3
gm3 + gds3 + gds2
gds3
= 0.01
gm3

= 0.1

x 10

ID1
ID2

1.35
1.3
1.25

ID

1.2
1.15
1.1
1.05
1
0.95
0

0.5

1.5

VX

2.5

3.5

Figure 20: Currents for = 0.1

We see that current ID1 shows greater variation than
ID2 . Hence the cascode current mirror is more accurate.

11