ACSE Journal, Volume (6), Issue (4), Dec.

, 2006

BLDC Motor Controlled Using Resonant Pole Inverter with Variable Pulse
Width Method
M.Karnan1 K.Thangavel2 L.Chitra3 R.Sivakumar3 G.K.Dwarakanath3
1: Department of Computer Science Gandhigram Rural Institute - University,
Gandhigram-624302, Tamil Nadu, India. Email: [email protected]
2: Department of Computers science, Periyar University, Salem, Tamil Nadu, India.
3: Hindusthan College of Engineering and Technology, Coimbatore, TamilNadu, India

Abstract pulse width modulation control in hard switching inverter.

This paper presents the control of BLDC motor using To solve these problems many resonant pole inverters
resonant pole inverter. This inverter possesses the have been designed. In the auxiliary resonant
advantages of low switching power loss, low inductor commutated pole inverter[4],[5] ,it requires a stiff dc link
power loss, low device voltage stress and simple control capacitor bank and it may affect the operation of the
scheme. The operation principle of the inverter is resonant of the resonant circuit. Many resonant snubber
analyzed. The control circuit for this inverter is also inverters[6] have been designed. It also have
proposed. The simulation results of the proposed inverter disadvantages like maximum attainable switching
are also presented. The performance characteristics of the frequency and low dc bus utilization and also it requires
proposed inverter are also analyzed for variable pulse additional switching actions. In order to solve these entire
width method. problems, this paper proposes a new inverter and it is
unique for BLDC drive system.
Keywords: resonant pole inverter, simulation, variable
pulse width method, soft switching, BLDC motor. The rest of the paper is organized as follows: Section 2
presents proposed inverter Section 3 presents the working
1. Introduction principle Section 4 presents the control circuit section 5
The brushless dc motor (BDCM) has been widely used in presents the simulation of the inverter section 6
industrial applications because of its low inertia, fast Experiments and results. And section 7 describes the
response, high power density, and high reliability. It characteristic curves section 8 describe the comparison of
exhibits the operating characteristics of a conventional BLDC motor with brushed DC motor and Section 9
commutated dc permanent magnet motor but eliminates describe the summary and conclusion.
the mechanical commutators and brushes. Hence, many
problems associated with brushes are eliminated; such as 2. Proposed Inverter
radio-frequency interference and sparking which is the The system contains a diode bridge rectifier, a resonant
potential source of ignition in inflammable atmosphere. circuit, a conventional three-phase resonant pole inverter
The control of BLDC motor can be done by two methods; and a control circuitry. In the BLDC motor, suitable Hall
they are sinusoidal commutation, trapezoidal Effect sensors sense the rotor position and it is given to
commutation. In sinusoidal commutation the cost will be the control circuit. The proposed inverter has been shown
very high. So we are going for trapezoidal commutation. in the figure 2.1.The resonant circuit consists of three
In trapezoidal commution, the motor can be controlled by auxiliary switches. These switches are used to obtain soft
hard switching, soft switching techniques. A hard switching action. Because of this, the turn off power
switching inverter[1], which normally has high switching losses can be reduced and the turn off voltage spike is
losses, low efficiency and high dv/dt, high di/dt will eliminated. The resonant pole inverter consists of six
result in severe electromagnetic interference and severe switches and the snubber capacitor connected in parallel
reverse recovery problems. In order to solve all these to each lower switch of phase leg. The snubber capacitor
problems, many soft switching inverters has been resonates with the primary winding of the transformer.
designed. Soft switching inverters are usually classified Rotor position is sensed using Hall Effect sensors
into two categories. They are resonant link inverters and embedded into the stator. The BLDC motor has three
resonant pole inverters. The resonant DC link Hall Effect sensors embedded into the stator on the non-
inverter[2],[3] has disadvantages such as high voltage driving end of the rotor. Whenever the rotor magnetic
stress, high dc link voltage ripple and large resonant poles pass near the hall sensors, they give a high or low
inductor power losses and it is hard to achieve discrete signal indicating the N pole or S pole is passing near the

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 ACSE Journal, Volume (6), Issue (4), Dec., 2006

sensors. Based on the combination of these hall sensor During phase current commutation, the switching state is
signals, the exact sequence of commutation can be changed from one lower switch to another, e.g., turn off
determined. These signals are given to the control circuit. and turn on can be turned off directly in the ZVS
condition, turning on auxiliary switch to discharge the
In a whole PWM cycle, the three lower switches
snubber capacitor then switch can get the ZVS condition.
can be turned off in the ZVS condition as the snubber
During phase current commutation, if the switching state
capacitors can slow down the voltage rise rate. The turn-
is changed from one upper switch to another upper
off power losses can be reduced and the turn off voltage
switch, the operation is the same as that of the hard
spike is eliminated. Before turning on the lower switch,
switching inverter, as the switching power losses of the
the corresponding auxiliary switch must be turned on
upper switches is much smaller than that of the lower
ahead. The snubber capacitor is then discharged and the
switches.
lower switches get the ZVS condition.

Figure : 2.1.Proposed inverter

3. Working Principle
During this period of time when the switch S1 is always
turned on, when switch S6works under PWM frequency,
and when other main inverter switches are tuned off.
Since the resonant transition is very short, it can be
assumed that the load current is constant. The equivalent
circuit is shown in Fig.3.1. Where Vs is the dc link
voltage, iLris the transformer primary winding current,uS6
is the voltage drop across the switch (i.e., snubber
capacitor voltage), and Io is the load current. The
waveforms of the switches gate signal, PWM signal,
main switch voltage drop uS6 , and the transformer
primary winding current are illustrated in Fig.3.2The
operation of one switching cycle can be divided into
seven modes.

Figure: 3.2.Waveforms of the Equivalent circuit

Figure: 3.1.Equivalent circuit

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 ACSE Journal, Volume (6), Issue (4), Dec., 2006

3.2. Mode 1 :( t1-t2) 3.5. Mode 4 :( t4-t5)

The auxiliary switch Sb is turned on. The transformer The transformer primary winding current iLr decays
primary winding current iLr begins to increase, the linearly from load current to zero. The auxiliary switch
current flowing through D3 decays. The secondary Sb can be turned off in ZVS condition.
winding current iLrs also begin to conduct through diode
Dr to the DC link.

Figure: 3.7.Mode 4
Figure: 3.4.Mode 1 3.6. Mode 5: (t5-t6)
3.3. Mode 2: (t2-t3) The transformer primary winding current decays to zero
The load current flows through the transformer primary and the resonant circuit idles. The load current flows
winding, the free wheeling diode D3 is turned off .The from the two switches S1 and S6 and the motor.
voltage drop across switch S6 decays. 3.7. Mode 6 :( t6-t7)
The main inverter switch S6 is turned off directly and the
resonant circuit does not operate.

Figure: 3.5.Mode 2
3.4. Mode 3:(t3-t4)
The voltage across S6 reaches zero, the freewheeling Figure: 3.8.Mode 6
diode Dfp begins to conduct. The transformer primary 4. Control circuit
current iLr decays linearly. In this mode, switch S6 is The controller consists of five main parts. They are
turned on in the ZVS condition. comparator, inverter, delay ciruit, pwm controller, and
combinational circuit. The block diagram of a phase R
has shown in figure 4.1.The comparator is used for
comparing the hall sensor output signal and it will give a
square wave output and it is given to the inverter IC.The
inverter is used for giving inverted signal to the delay
circuit. The delay circuit will produce a required delay
for the lower switches and auxiliary switches. The
auxiliary switches will be turned on for a fraction of time
and after that it will be turned off automatically. After
turning off of the auxiliary switch, the lower switch will
be turned on, and so it will be turned in ZVS condition.
The delay circuit is used for this Purpose. The signals
from the delay circuit are given to the combinational
circuit. The PWM controller is used for producing
required PWM signal for inverter. In the PWM IC we can
change the pulse width, frequency at a time. With help of
this IC, we can obtain or control the motor for specific
Figure: 3.6.Mode 3 speed. The output from the PWM IC is given to the
combinational circuit.

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 ACSE Journal, Volume (6), Issue (4), Dec., 2006

S1
PWM And gate
controller CD4081 S1
LM3524

S4
HALL Delay And gate
EFFECT Comparator Inverter circuit CD4081
SENSOR LM324 CD4049 CD4528

SB

Figure: 4 Block diagram of phase R

4.1. Amplifier (LM741): 4.5. Combinational circuit (CD4081):

The output of the hall sensor signal is very low. This It is used for producing a required output from the PWM
signal is amplified by LM741 IC and it is given to the 3rd controller and the delay circuit. The CD4071BC and
pin of the inverter IC. The output of LM741 is taken from CD4081BC quad gates are monolithic complementary
pin no6. MOS (CMOS) integrated circuits constructed with N-
and P-channel enhancement mode transistors. They have
4.2. Inverter IC (CD4049): equal source and sink current capabilities and conform to
The output from the amplifier signal is given to the 3rd standard B series output drive. The devices also have
pin of the inverter IC via 4148.The output is taken from buffered outputs, which improve transfer characteristics
the 2nd pin of the inverter IC.This signal is given to the by providing very high gain. All inputs protected against
delay circuit to obtain zero voltage switching. static discharge with diodes to VDD and VSS.Pin no 2 is
connected to the 3rd pin of the inverter IC and pin no 1 is
connected to the PWM output. The output is taken from
4.3. Delay circuit (CD4528):
pin no 1 and it is given to the corresponding upper switch
It is used for producing required delay for the three lower S1.Pin no 5 is connected to the output of CD 4528-pin
switches in the resonant inverter part. The CD4528B is no6. Pin no 6 is connected to switch S1.Pin no 5 is
16 pin dual monostable multivibrator. Each device is connected to the output of CD 4528-pin no6. Pin no 6 is
retriggerable and resettable. Triggering can occur from connected it is used to trigger the corresponding lower
either the rising or falling edge of an input pulse, switch S4.For the remaining 2 phases the connection is
resulting in an output pulse over a wide range of widths. same as before.
Pulse duration and accuracy are determined by external
timing components Rx and Cx.The output from the
inverter is given to the 4th, 12th pin of CD4528.The 5. Simulation
output is taken from pin no 6 and pin no 10.The output The Proposed resonant pole inverter has been simulated
from pin no6 is given to the combinational circuit. The using Power electronics simulator (PSIM). The inverter
output from pin no 10 is directly given to the auxiliary has been tested for 230V DC supply. The capacitor and
switch. inductor value chosen here are Lr=7.038mH,
Cr=5.1μF.The switching frequency is 10 KHz .The
4.4. PWM CONTROLLER (SG4524): simulated waveforms of phase current Ia, phase current
It is used for producing variable speed output. In the Ib, phase current Ic are shown in figure.5.1,5.2,5.3he
LM3524D the circuit bias line has been isolated from the speed characteristics are also shown in figure.5.4
shutdown pin. This prevents the oscillator pulse
amplitude and frequency from being disturbed by
shutdown. Also at high frequencies (j300 kHz) the max.
duty cycle per output has been improved to 44%
compared to 35% max. duty cycle. The input is given to
the pin no 2 via amplifier circuit. A pot is connected in
pin no 2 to obtain variable pulse width. In pin no6 and
pin no 7 a variable pot and a capacitance are connected to
obtain variable frequency output. Pin no 11 and 14 are
interconnected and the output is taken from the pin
no11 and it is given to the combinational circuit

Figure: 5.1 Phasecurrent IA

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 ACSE Journal, Volume (6), Issue (4), Dec., 2006

6. Experimental Results
The experimental waveforms for the gate signals are
shown in figure. The waveforms are all for the nine
IGBT switches in the power circuit. The operating
frequency is 20 KHz and the delay for the auxiliary
switch is 5μs.The experimental waveforms across the
oscilloscope are shown below. The gate signal across S1,
S2,S6 and S1,S4 are shown in figure 6.1,6.2.The gate
signal waveforms obtained here are matching with the
actual timing diagram of the proposed inverter shown in
figure.6.3

Figure: 5.2. . Phase current IB

Figure.5.3. Phase current IC

Figure .6.1 Gate signal across S1,S 2 and S6

Figure.5.4. Speed characteristics

Figure .6.2 Gate signal across S1and S4

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 ACSE Journal, Volume (6), Issue (4), Dec., 2006

SPEED CHARACTERISTICS FOR VIN

20V

180
160
140

Speed in rpm
120
100
y
80
60
40
20
0
0 0.5 1 1.5 2
Phase current Ia in amps

Figure.7.1.2.Speed characteristics for VIN=20V

7.2. Constant Frequency:

The characteristics curves have been drawn for variable
pulse width and constant frequency of 10kHz and 31.2
kHz by taking phase current (IA) in X-axis and
speed(N)inY-axis.
S P E E D C H A R A C T E R IS T IC S F O R A
FR EQ UEN C Y O F 10kH z

Figure.6.3.Timing diagram of the proposed inverter 60

50
Speed in rpm

40
7. Characteristic Curves
30 y

20
7.1. Constant Pulse Width 10
The characteristic curves have been drawn for the duty 0
cycle of 0.6 with the input voltage of 10V and 20V by 0 0 .1 0 .2 0 .3 0 .4
P h a s e c u r r e n t Ia in a m p s
taking phase current (IA) in X-axis and speed (N) in Y-
axis. Figure .7.2.1.Speed characteristics for f=10 kHz
SPEED CHARACTERISTICS FOR VIN 10V
SPEED CHARACTERISTICS FOR A
70 FREQUENCY OF 31.2kHz
60
Speed in rpm

50 80
40 70
y
Speed in rpm

30 60
50
20
40 y
10 30
0 20
0 0.2 0.4 0.6 0.8 10
0
Phase current Ia in am ps
0 0.2 0.4 0.6 0.8
Phase current Ia in amps

Figure.7.1.1.Speed characteristics for VIN=10V

Figure.7.2.1.Speed characteristics for f=31.2 kHz

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 ACSE Journal, Volume (6), Issue (4), Dec., 2006

8. Comparison of BLDC motor 9. Summary Conclusion

FEATURE BLDC MOTOR BRUSHED
DC MOTOR A specially designed resonant pole inverter for the BLDC
Commutation Electronic Brushed motor drive system is presented. The principle of
commutation commutation. operation is explained. The inverter operation is also
based on Hall verified by the results of simulation. The simulation was
position sensors. successfully furnished using PSIM software. The
Maintenance Less required Periodic experimental gate signal waveforms also presented. The
due to absence maintenance is performance of the inverter has been tested in constant
of brushes. required. pulse width and constant frequency method.the
performance characteristics of the inverter are also
presented. The following observations were made:
Life Longer Shorter
1. All the high frequency switches work under soft
switching condition.
Speed/ Flat – Enables Moderately
Torque operation at all flat – At 2. A voltage stress on all the devices is low.
Characteristics speeds with higher speeds, 3. Very simple auxiliary control scheme.
rated load. brush friction 4. Reduced reverse recovery problem.
increases, thus
reducing References
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Efficiency High – No Moderate. [1] M. Dehmlow, K. Heumann, and R. Sommer,
voltage drop “Resonant inverter systems for drive applications,” EPE
across brushes. J., vol. 2, no. 4, pp. 225–232, Dec. 1992.
[2] D. M. Divan, “The resonant DC link converter—A
Output Power/ Moderate/Low
new concept in static power conversion,” IEEE Trans.
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Ind. Applicat., vol. 25, no. 2, pp.317–325, Mar./Apr.
size due to produced by
1989.
superior thermal the armatureis
[3] L. Malesani, P. Tenti, P. Tomasin, and V. Toigo,
characteristics. dissipated in
“High efficiency quasiresonant DC link three-phase
Because BLDC the air gap,
power inverter for full-range PWM,”IEEE Trans. Ind.
has the windings thus increasing
Appl., vol. 31, no. 1, pp. 141–148, Jan./Feb. 1995.
on the stator, the
[4] Y. C. Jung, H. L. Liu, G. C. Cho, and G. H. Cho,
which is temperature in
“Soft switching space vector PWM inverter using a new
connected to the the air gap and
quasiparallel resonant DC link,” in Proc. IEEE Power
case, the heat limiting specs
Electronics Specialists Conf., 1995, pp. 936–942.
dissipation is on the output
[5] R.W. De Doncker and J. P. Lyons, “The auxiliary
better. power/frame
resonant commutated pole converter,” in Proc. IEEE
size.
Industry Appliations Soc. Annu. Meeting, 1990, pp.
Rotor Inertia Low, because it Higher rotor
1228–1235.
has permanent inertia which
[6] W. McMurray, “Resonant snubbers with auxiliary
magnets on the limits the
switches,” in Proc.IEEE Industry Applications Soc. Annu.
rotor. dynamic
Meeting, vol. 1, 1989, pp. 289–834.
This improves characteristics.
[7] V. Vlatkovic, D. Borojevic, F. Lee, C. Cuadros, and S.
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 ACSE Journal, Volume (6), Issue (4), Dec., 2006

KARNAN MARCUS, received SIVA KUMAR RAMAKRISHNAN

the Master of Computer Science Received the Master of Computer
and Engineering Degree Science and Engineering Degree from
Government College of Government College of Engineering,
Engineering, Manonmaniam Manonmaniam Sundaranar University,
Sundaranar University, Tamil Tamil Nadu, India, in 2000. Currently
Nadu, India, in 2000. Currently he is working as Assistant Professor,
he is working as Professor and Department of Computer Science & Engineering,
Head, Department of Computer Science & Engineering Hindusthan College of Engineering & Technology,
Department, Hindusthan College of Engineering & Coimbatore, Tamil Nadu, India. His area of interests
Technology, Coimbatore, Tamil Nadu, India. And doing includes medical image processing, artificial intelligence,
part-time research in the Department of computer neural network and fuzzy logic.
Science and Applications, Gandhigram Rural Institute-
Deemed University, Tamil Nadu, India. His area of
interests includes medical image processing, artificial DWARAKANATH.G.K,
intelligence, neural network, genetic algorithm, pattern received the Master of
recognition and fuzzy logic. Technology in 1973. He got his
Ph. D. Degree from Chemical
Engineering Department, Madras
THANGAVEL KUTTIANNAN, University in 1980. Currently he is
received the Master of Science working as Principal in
from Department of Mathematics, Hindusthan College of
Bharathidasan University in Engineering & Technology,
1986, and Master of Computer Coimbatore, Tamil Nadu, India. His area of interests
Applications Degree from Madurai simulation techniques, Neural Networks.
Kamaraj University, India in 2001.
He got his Ph. D. Degree from
Mathematics department, Gandhigram Rural Institute-
Deemed University in 1999. Currently he is working as
Professor and Head in Computer Science Department,
Periyar University, and his experience started from 1988;
His area of interests includes medical image processing,
artificial intelligence, neural network, and fuzzy logic.

CHITRA LAKSMANAN
Received the master of power
electronics and drives from
electrical and electronics
engineering department from
karunya deemed university,
Tamilnadu, India in 2006.
Currently she is working as a
lecturer in Hindusthan college of engineering and
technology, Tamil nadu, India. Her area of interests
includes soft switching converters, solid state drives,
neural networks.

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