School of Electrical & Computer Engineering: Optical Computers
School of Electrical & Computer Engineering: Optical Computers
OPTICAL COMPUTERS
OPTICAL COMPUTERS
OPTICAL COMPUTERS
Contents
Overview of Optical computers
1 Components of Optical computers. . . . . . . . . . . . . . . . . . . . . . 9
1.1
1.2
1.3
1.4
1.5
1.6
1.7
Hard Disk
CPU
Memory
Cache Memory
Main Memory
Screen
Power Supply
References
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PREFACE
An optical computer (also called a photonic computer) is a device that uses the
photons of visible light or infrared (IR) beams, rather than electric current, to
perform digital computations. An electric current creates heat in computer systems.
As the processing speed increases, so does the amount of electricity required; this
extra heat is extremely damaging to the hardware. Light, however, creates
insignificant amounts of heat, regardless of how much is used. Thus, the
development of more powerful processing systems becomes possible.
An optical desktop computer could be capable of processing data up to 100,000
times faster than current models because multiple operations can be performed
simultaneously.
Optical computing where the processing of electrical energy is replaced by light
quanta is very attractive for future technologies. The replacement of wires by
optical pathways is of special interest because light can cross without interference
and thus, the complex wiring of modern computers may be appreciably simplified.
Moreover, optical computers can operate at very high rates because there are not
the problems of electrical computers such as inductivities of wires and loading of
parasitic capacitors.
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OPTICAL COMPUTERS
For decades, silicon, with its talent for carrying electrons, has been
the mainstay of computing. But for a variety of reasons (see "The Coming Light
Years"), we're rapidly approaching the day when electrons will no longer cut it.
Within 10 years, in fact, silicon will fall to the computer scientist's triple curse: "It's
bulky, it's slow, and it runs too hot." At this point, computers will need a new
architecture, one that depends less on electrons and more on... well...what else?
Computer of 2010
OPTICAL COMPUTERS
Optics. With the assistance of award-winning firm frogdesign (the geniuses behind
the look of the early Apple and many of today's supercomputers and workstations),
Forbes ASAP has designed and built (virtually, of course) the computer of 2010.
Whenever possible, our newly designed computer replaces stodgy old
electrons with shiny, cool-running particles of light--photons. Electrons remain,
doing everything they do best (switching), while photons do what they do best
(traveling very, very fast). In other words, we've brought the speed and bandwidth
of optical communications inside the computer itself. This mix is called
optoelectronics, another buzzword we encourage you to start using immediately.
The result is a computer that is far more reliable, cheaper, and more
compactthe entire thing, believe it or not, is about the size of a Frisbee--than the
all-electronic solution. But above all, optoelectronic computing is faster than
what's available today.How fast ? In a decade, we believe, you will be able to buy
at your local computer shop the equivalent of today's supercomputers.
How likely is it that this computer will be built ? Some of its components
are slightly pie-in-the-sky. But many others have already been developed or are
being developed by some of the best scientific minds in the country. Sooner or
later, and probably sooner, an optoelectronic computer will exist .
Okay, so we've built a revolutionary new optical computer just in
time for 2010. What do we do with it now? Everything. Because it's small (about
the size of a Frisbee) and because it has the power of today's supercomputer, the
2010 PC will become the repository of information covering every aspect of our
daily life. Our computer, untethered and unfettered by wires and electrical outlets,
becomes something of a key that unlocks the safety deposit box of our lives.
When we plug our 2010 PC into the wall of our home, our house will
become smart, anticipating our every desire. At work, we'll plug it into our desk,
which will become a gigantic interactive screen. When it communicates wirelessly
with a small mobile device, we'll have a personal digital assistanton steroids.
OPTICAL COMPUTERS
OPTICAL COMPUTERS
few optical fibers and films, making the systems more efficient with no
interference, more cost effective, lighter and more compact. Optical components
would not need to have insulators as those needed between electronic components
because they donot experience cross talk. Indeed, multiple frequencies (or different
colors) of light can travel through optical components without interfacing with
each others, allowing photonic devices to process multiple streams of data
simultaneously.
SECURITY
The PC will be protected from theft, thanks to an advanced biometric scanner
that can recognize your fingerprint.
INTERFACE
You'll communicate with the PC primarily with your voice, putting it truly at
your beck and call.
OPTICAL COMPUTERS
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OPTICAL COMPUTERS
where the fluorescence quantum yield is a measure of the preservation of lightenergy; light fast fluorescent dyes with 100% fluorescence quantum yield are
known .
The third problem sets a lower limit to the size of conventional optical
components and hinders the construction of an optical computer on a molecular
scale. However, the development of molecular optics would reduce the size of such
components by a factor of 500.
The limitation of resolution by the wavelengths of light may be overcome
by the transport of the energy of light instead of the emission and absorption of
light quanta. This corresponds to the use of the alternating current (50 Hz) with a
problematic wavelength of some 6000 km where the electrical energy is handled
on a human scale or even lower.
In analogy to such a transport of electrical energy an energy transfer
between chromophores can replace the absorption and emission of light quanta in
optical signal processing components. The transfer will proceed rapidly if the
distance between the two chromophores lies within the Forster radius, that means
between 2 and 3 nm for most combinations of similarly absorbing chromophores.
On the other hand, this Forster radius would be the natural lower limit for the size
of complex arrangements of switching components for handling energy transfer
because going below this limit would spread energy over many chromophores
without control; a solution of this limiting problem would be the prerequisite for
the development of optical computers with very high densities of integration.
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Hard Disk
CPU
Memory
Cache Memory
Main Memory
Screen
Power Supply
(1) HARD
DISK
(STORES
PROGRAMS
AND
FILES)
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(3) MEMORY(RAM)
When we stir optical communication into the old-fashioned
electronic computer, some of the greatest potential gains will
involve your computer's short-term memory. In the long-gone days
(1980) of the 80286, computers enjoyed a design advantage that
we've never had since. The memory bus speed--that is, the speed at
which data flowed between CPU and memory--was the same as the
CPU's clock rate, or how fast it operates . (Of course, they were
both 8 megahertz , but we said this was a long time ago.) Data
reached the CPU as fast as the chip could process it, which
kept the CPU from waiting around being bored.
We've never reached that pinnacle again, and since then, the
situation has gotten steadily worse. A reasonably fast computer
today has a CPU clock of 600 megahertz and a memory bus speed
of 133 megahertz. Despite various clever technical feats, the CPU
still spends half to two-thirds of its time just waiting around for
data
from
memory.
Optoelectronics will knock this problem out of the park. With a
properly designed optical memory bus, speed of fetch from
memory can once again equal CPU clock rate.
Of course, this also will require that processing in RAM be very
quick, so we'll need a faster RAM architecture, which luckily is--or
will be--available. A large cache (see below) made of superfast,
nonvolatile magnetic RAM will hold information that the CPU
needs quickly and repeatedly. It will be backed up by a much
larger area of holographic (pure optical) main RAM that will hold
programs, files, images, etc., while you work with them.
(4) FAST MEMORY (CACHE)
To build our new fast cache, we'll need to get rid of the
inefficiencies of today's product, which requires the computer to
constantly refresh it, just like short-term memory in humans needs
to be constantly refreshed or it's forgotten. The inefficiencies in
cache are so bad, in fact, that once you know the speed of your
cache you can assume that its real-world performance will be about
a third of that--the missing two-thirds being sacrificed to refresh
cycles.
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current PCs possess but much, much better. We've got 10 fruitful
years to develop it, after all.
WHO'S WORKING ON IT? Sharp Electronics, a world leader in
color LCD technology, which is also investing heavily in
optoelectronics. Sony, Toshiba, and IBM are the current leaders in
flat-panel displays.
TIME OF COMPLETION? 2010, if we're lucky.
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Optical computing was a hot research area in the 1980s. But the work
tapered off because of materials limitations that seemed to prevent optochips from
getting small enough and cheap enough to be more than laboratory curiosities.
Now, optical computers are back with advances in self-assembled conducting
organic polymers that promise super-tiny all-optical chips.
[1]. Advances in optical storage device have generated the
promise of efficient, compact and large-scale storage devices
[2]. Another advantage of optical methods over electronic
ones for computing is that parallel data processing can frequently be done much
more easily and less expensively in optics than in electronics
[3]. Light does not have the time response limitations of
electronics, does not need insulators, and can even send dozens or hundreds of
photon signal streams simultaneously using
different color frequencies. Parallelism, the capability to execute more than one
operation simultaneously, is now common in electronic computer architectures.
But, most electronic computers still execute instructions
sequentially; parallelism with electronics remains sparsely used. Its first
widespread appearance was in Cray supercomputers in the early 1980s when two
processors were used in conjunction with one shared memory. Today, large
supercomputers may utilize thousands of processors but communication overhead
frequently results in reduced overall efficiency
[4]. On the other hand for some applications in input-output
(I/O), such as image processing, by using a simple optical design an array of pixels
can be transferred simultaneously in parallel from one point to another. Optical
technology promises massive upgrades in the efficiency and speed of computers,
as well as significant shrinkage in their size and cost. An optical desktop computer
could be capable of processing data up to 100,000 times faster than current models
because multiple operations can be performed simultaneously. Other advantages of
optics include low manufacturing costs, immunity to electromagnetic interference,
a tolerance for lowloss transmissions, freedom from short electrical circuits and the
capability to supply large bandwidth and propagate signals within the same or
adjacent fibers without interference.
One oversimplified example may help to appreciate
the difference between optical and electronic parallelism. Consider an imaging
1000 independent points per mm2 in the object plane which
system with 1000
are connected optically by a lens to a corresponding number of points per mm2 in
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the image plane; the lens effectively performs an FFT of the image plane in real
time. For this to be accomplished electrically, a million operations are required.
Parallelism, when associated with fast switching speeds, would result in staggering
computational speeds. Assume, for example, there are only 100 million gates on a
chip, much less than what was mentioned earlier (optical integration is still in its
infancy compared to electronics). Further, conservatively assume that Optical
technology promises massive upgrades in the efficiency and speed of computers,
as well as significant shrinkage in their size and cost.
An optical desktop computer could be capable of
processing data up to 100,000 times faster than current models because multiple
operations can be performed simultaneously. Each gate operates with a switching
time of only 1 nanosecond(organic optical switches can switch at sub-picosecond
rates compared to maximum picosecond switching times for electronic switching).
Such a system could perform more than 1017 bit operations per second. Compare
this to the gigabits (109) or terabits (1012) per second rates which electronics are
either currently limited to, or hoping to achieve. In other words, a computation that
might require one hundred thousand hours (more than 11 years) of a conventional
computer time could require less than one hour by an optical one. But building an
optical computer will not be easy. A major challenge is finding materials that can
be mass produced yet consume little power; for this reason, optical computers may
not hit the consumer market for 10 to 15 years.
Another of the typical problems optical computers
have faced is that the digital optical devices have practical limits of eight to eleven
bits of accuracy in basic operations due to, e.g., intensity fluctuations. Recent
research has shown ways around this difficulty. Thus, for example, digital
partitioning algorithms, that can break matrix-vector products into lower-accuracy
sub-products, working in tandem with error-correction codes, can substantially
improve the accuracy of optical computing operations. Nevertheless, many
problems in developing appropriate materials and devices must be overcome
before digital optical computers will be in widespread commercial use. In the near
term, at least, optical computers will most likely be hybrid optical/electronic
systems that use electronic circuits to preprocess input data for computation and to
post-process output data for error correction before outputting the results.
The promise of all-optical computing remains highly
attractive, however, and the goal of developing optical computers continues to be a
worthy one. Nevertheless, many scientists feel that an all-optical computer will not
be the computer of the future; instead optoelectronic computers will rule where the
advantages of both electronics and optics will be used. Optical computing can also
be linked intrinsically to quantum computing. Each photon is a quantum of a wave
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Fig.- 1
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expands the capabilities of electronic systems and enables optical systems with
high levels of electronic signal processing. Thus, smart pixel systems add value to
electronics through optical input/output and interconnection, and value is added to
optical systems through electronic enhancements which include gain, feedback
control, and image processing and compression.
Fig.- 2 (a)
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Fig.- 2 (b)
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emitting diode (LED) under the control of a field-effect transistor (FET), can now
be made entirely out of organic materials on the same substrate for the first time. In
general, the benefit of organic over conventional semiconductor electronics is that
they should (when mass-production techniques take over) lead to cheaper, lighter,
circuitry that can be printed rather than etched. Scientists at Bell Labs have made
300-micron-wide pixels using polymer FETs and LEDs made from a sandwich of
organic materials, one of which allows electrons to flow, another which acts as
highway for holes (the absence of electrons); light is produced when electrons and
holes meet. The pixels are quite potent, with a brightness of about 2300
candela/m2, compared to a figure of 100 for present flat-panel displays . A
Cambridge University group has also made an all-organic device, not as bright as
the Bell Labs version, but easier to make on a large scale .
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SLM play an important role in several technical areas where the control of
light on a pixel-by-pixel basis is a key element, such as optical processing and
displays.
SLM FOR DISPLAY PURPOSES
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OPTICAL MEMORY
In optical computing two types of memory are discussed. One consists of
arrays of one-bit-store elements and other is mass storage, which is implemented
by optical disks or by holographic storage systems. This type of memory promises
very high capacity and storage density. The primary benefits offered by
holographic optical data storage over current storage technologies include
significantly higher storage capacities and faster read-out rates. This research is
expected to lead to compact, high capacity, rapid-and random-access, and low
power and low cost data storage devices necessary for future intelligent spacecraft.
The SLMs are used in optical data storage applications. These devices are used to
write data into the optical storage medium at high speed. More conventional
approaches to holographic storage use ion doped lithium niobate crystals to store
pages of data.
For audio recordings ,a 150MBminidisk with a 2.5- in diameter has been
developed that uses special compression to shrink a standard CDs640-MB storage
capacity onto the smaller polymer substrate. It is rewritable and uses magnetic field
modulation on optical material. The mini disc uses one of the two methods to write
information on to an optical disk. With the mini disk a magnetic field placed
behind the optical disk is modulated while the intensity of the writing laser is held
constant. By switching the polarity of the magnetic field while the laser creates a
state of flux in the optical material digital data can be recorded on a single layer.
As with all optical storage media a read laser retrieves the data.
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Fiber optic systems can carry both analog and digital signals over
light waves. A system consists of a signal generator, (e.g. computer, video, audio)
an encoder, a fiber optic cable, and a decoder, and a receiving device (e.g. tv,
computer network, etc.) Fiber optics have many advantages over copper cable.
They have become a desired standard for networking backbones and hubs because
of the advantages they have over copper to achieve the speed and bandwidth
capacity. A single fiber optic cable can transmit the same amount of data as
approximately 600 pair traditional copper telecommunications wire, an transmit
data further with less boosting of the signal, it is not effected by electrical
anomalies such as lightning, it is small, light weight and easy to install.
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Year2000:
With the highly purified and streamlined manufacturing process, the current
speeds of data transfer are around 5millionbps. The biggest challenge remaining is
the economic challenge. Today telephone and cable television companies generally
bring in fiber links (backbones)to remote sites serving many customers, but then
use twisted wire pair or coaxial cables from optical network units to individual
homes. This technology is often referred to "broadband" and is becoming
increasingly popular, but considerably limited to the potential of complete fiber
optic networks directly linked to individual homes. Only time will tell how long it
will take before the technology becomes reasonably economical and enough
demand is given to take that next step.
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OPTICAL COMPUTERS
Since photons are uncharged and do not interact with one another as readily
as electrons, light beams may pass through one another in full-duplex operation,
for example without distorting the information carried. In the case of electronics,
loops usually generate noise voltage spikes whenever the electromagnetic fields
through the loop changes. Further, high frequency or fast switching pulses will
cause interference in neighboring wires.
On the other hand, signals in adjacent optical fibers or in optical integrated
channels do not affect one another nor do they pick up noise due to loops. Finally,
optical materials possess superior storage density and accessibility over magnetic
materials. The field of optical computing is progressing rapidly and shows many
dramatic opportunities for overcoming the limitations described earlier for current
electronic computers. The process is already underway whereby optical devices
have been incorporated into many computing systems. Laser diodes as sources of
coherent light have dropped rapidly in price due to mass production.
Also, optical CD-ROM discs are now very common in home and office
computers. Current trends in optical computing emphasize communications, for
example the use of free-space optical interconnects as a potential solution to
alleviate bottlenecks experienced in electronic architectures, including loss of
communication efficiency in multiprocessors and difficulty of scaling down the IC
technology to sub-micron levels. Light beams can travel very close to each other,
and even intersect, without observable or measurable generation of unwanted
signals. Therefore, dense arrays of interconnects can be built using optical systems.
In addition, risk of noise is further reduced, as light is immune to electromagnetic
interferences. Finally, as light travels fast and it has extremely large spatial
bandwidth and physical channel density, it appears to be an excellent media for
information transport and hence can be harnessed for data processing. This high
bandwidth capability offers a great deal of architectural advantage and flexibility.
Based on the technology now available, future systems could have 1024 smart
pixels per chip with each channel clocked at 200MHz (a chip I/O of 200Gbits per
second), giving aggregate data capacity in the parallel optical highway of more
that 200Tbits per second; this could be further increased to 1000Tbits. Free-space
optical techniques are also used in scalable crossbar systems, which allow arbitrary
interconnections between a set of inputs and a set of outputs. Optical sorting and
optical crossbar inter-connects are used in asynchronous transfer modes or packet
routing and in shared memory multiprocessor systems.
In optical computing two types of memory are discussed. One consists of
arrays of one-bit-store elements and the other is mass storage, which is
implemented by optical disks or by holographic storage systems. This type of
memory promises very high capacity and storage density. The primary benefits
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the lower layer to the upper layer with greater spacing between bits. In this way,
data can be stored much closer together (at distances smaller than the read beam
wavelength) on the bottom layer without losing data due to averaging across bits.
This method is close to commercial production, offering capacities of up to 20 GB
on a 5.25 in. disk without the need for altering conventional read-laser technology.
Advanced storage magnetic optics (ASMO) builds on MSR, but with one
exception.
Standard optical disks, including those used in MSR, have grooves and lands
just like a phonograph record. These grooves are used as guideposts for the writing
and reading lasers. However, standard systems only record data in the grooves, not
on the lands, wasting a certain amount of the optical materials capacity. ASMO
records data on both lands and grooves and, by choosing groove depths
approximately 1/6 the wavelength of the reading laser light, the system can
eliminate the crosstrack crosstalk that would normally be the result of recording on
both grooves and lands. Even conventional CD recordings pick up data from
neighboring tracks, but this information is filtered out, reducing the signal-to-noise
ratio. By closely controlling the groove depth, ASMO eliminates this problem
while maximizing the signal-to-noise ratio. MSR and ASMO technologies are
expected to produce removable optical disk drives with capacities between 6 and
20 GB on a 12-cm optical disk, which is the same size as a standard CD that holds
640 MB. Magnetic amplifying magneto-optical systems (MAMMOS) use a
standard polymer disk with two or three magnetic layers. In general terms,
MAMMOS is similar to MSR, except that when the data is copied from the bottom
to the upper layer, it is expanded in size, amplifying the signal. According to
Archie Smith of Storageteks Advanced Technology Office (Louisville, CO),
MAMMOS represents a two-fold increase in storage capacity over ASMO.
Technology developed by Call/Recall Inc. (San Diego, CA) could help bridge the
gap between optical disk drives and holographic memories. Called 2-photon
optical storage technology (which got its start with the assistance of the Air Force
research laboratories and DARPA), the Call/Recall systems under development use
a single beam to write the data in either optical disks with up to 120 layers, or into
100-layer cubes of active-molecule-doped MMA polymer. In operation, a mask
representing data is illuminated by a mode-locked Nd:YAG laser emitting at 1064
nm with pulse durations of 35 ps. The focal point of the beam intersects a second
beam formed by the second harmonic of the same beam at 532 nm. The second
beam fixes the data spatially and temporally. A third beam from a He Ne laser
emitting at 543 nm reads the data by causing the material to fluoresce. The
fluorescence is read by a chargecoupled device (CCD) chip and converted through
proprietary algorithms back into data. Newer versions of the system use a
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Ti:Sapphire laser with 200-fs pulses. Call/Recalls Fredrick McCormick said the
newer and older approaches offer different strengths. The YAG system can deliver
higher-power pulses capable of storing megabits of data with a single pulse, but at
much lower repetition rates than the Ti:Sapphire laser with its lower-power pulses.
Thus, it is a trade-off. Call/Recall has demonstrated the system using portable
apparatus comprised of a simple stepper-motor-driven stage and 200-microwatt
HeNe laser in conjunction with a low-cost video camera. The company estimates
that an optimized system could produce static bit error rates (BER) of less than 9
1013. McCormick believes that a final prototype operating at standard CD
rotation rates would offer BERs that match or slightly exceed conventional optical
disk technology. Researchers such as Demetri Psaltis and associates at the
California Institute of Technology are also using active-molecule-doped polymers
to store optical data holographically.
Their system uses a thin polymer layer of PMMA doped with
phenanthrenequinone (PQ). When illuminated with two coherent beams, the
subsequent interference pattern causes the PQ molecules to bond to the PMMA
host matrix to a greater extent in brighter areas and to a lesser extent in areas where
the intensity drops due to destructive interference. As a result, a pair of partially
offsetting index gratings is formed in the PMMA matrix. After writing the
hologram into the polymer material, the substrate is baked, which causes the
remaining unbounded PQ molecules to diffuse throughout the polymer, removing
the offsetting grating and leaving the hologram. A uniform illumination is the final
step, bonding the diffuse PQ throughout the matrix and fixing the hologram in the
polymer material.
Storageteks Archie Smith estimates that devices based on this method could
hold between 100 and 200 GB of data on a 5.25-in diameter polymer disk.
More conventional approaches to holographic storage use irondoped
lithium niobate crystals to store pages of data. Unlike standard magneto-optical
storage devices, however, the systems developed by Pericles Mitkas at Colorado
State University use the associative search capabilities of holographic memories.
Associative or content-based data access enables the search of the entire memory
space in parallel for the presence of a keyword or search argument. Conventional
systems use memory addresses to track data and retrieve the data at that location
when requested. Several applications can benefit from this mode of operation
including management of large multimedia databases, video indexing, image
recognition, and data mining.
Different types of data such as formatted and unformatted text, gray scale
and binary images, video frames, alphanumeric data tables, and time signals can be
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interleaved in the same medium and we can search the memory with either data
type. The system uses a data and a reference beam to create a hologram on one
plane inside the lithium niobate. By changing the angle of the reference beam,
more data can be written into the cube just like pages in a book. The current
systems have stored up to 1000 pages per spatial location in either VGA or VGA
resolutions. To search the data, a binary or analog pattern that represents the search
argument is loaded into a spatial light modulator and modulates a laser beam. The
light diffracted by the holographic cube on a CCD generates a signal that indicates
the pages that match the sought data. Recent results have shown the system can
find the correct data 75 percent of the time when using patterns as small as 1 to 5
percent of the total page. That level goes up to 95 to 100 percent by increasing the
amount of data included in the search argument.2
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Most of the components that are currently very much in demand are electrooptical (EO). Such hybrid components are limited by the speed of their electronic
parts. All-optical components will have the advantage of speed over EO
components. Unfortunately, there is an absence of known efficient nonlinear
optical materials that can respond at low power levels. Most alloptical components
require a high level of laser power to function as required. A group of researchers
from the university of southern California, jointly with a team from the university
of California Los Anglos, have developed an organic polymer with a switching
frequency of 60 GHz. This is three times faster than the current industry standard,
lithium niobate crystal-based devices. The California team has been working to
incorporate their material into a working prototype. Development of such a device
could revolutionize the information superhighway and speed data processing for
optical computing. Another group at Brown University and the IBM.
Almaden Research Center (San Jose, CA) have used ultrafast laser pulses to
build ultrafast datastorage devices. This group was able to achieve ultrafast
switching down to 100ps. Their results are almost ten times faster than currently
available speed limits. Optoelectronic technologies for optical computers and
communication hold promise for transmitting data as short as the space
between computer chips or as long as the orbital distance between satellites. A
European collaborative effort demonstrated a high-speed optical data input and
output in free-space between IC chips in computers at a rate of more than 1 Tb/s.
Astro Terra, in collaboration with Jet Propulsion Laboratory (Pasadena, CA) has
built a 32-channel 1-Ggb/s earth to satellite link with a 2000 km range. Many
more active devices in development, and some are likely to become crucial
components in future optical computer and networks.
The race is on with foreign competitors. NEC (Tokyo, Japan) have
developed a method for interconnecting circuit boards optically using Vertical
Cavity Surface Emitting Laser arrays (VCSEL). Researchers at Osaka City
University (Osaka, Japan) reported on a method for automatic alignment of a set of
optical beams in space with a set of optical fibers.
As of last year, researchers at NTT (Tokyo, Japan) have designed an optical
back plane with free space optical interconnects using tunable beam deflectors
and a mirror. The project had achieved 1000 interconnections per printed-circuit
board, with throughput ranging from 1 to 10 Tb/s.
Optics has a higher bandwidth capacity over electronics, which enables more
information to be carried and data to be processed arises because electronic
communication along wires requires charging of a capacitor that depends on
length. In contrast, optical signals in optical fibers, optical integrated circuits, and
free space do not have to charge a capacitor and are therefore faster.
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not affect one another nor do they pick up noise due to loops. Finally, optical
materials possess superior storage density and accessibility over magnetic
materials.
Obviously, the field of optical computing is progressing rapidly and shows
many dramaticopportunities for overcoming the limitations described earlier for
current electronic computers.
The process is already underway whereby optical devices have been
incorporated into many computing systems. Laser diodes as sources of coherent
light have dropped rapidly in price due to mass production. Also, optical CD-ROM
discs have been very common in home and office computers.
OPTICAL DISK
13
WORKING
The 780nm light emitted from AlGaAs/GaAs laser diodes is collimated by a lens
and focused to a diameter of about 1micrometer on the disk. If there is no pit where
the light is incident, it is reflected at the Al mirror of the disk and returns to the
lens, the depth of the pit is set at a value such that the difference between the path
of the light reflected at a pit and the path of light reflected at a mirror is an integral
multiple of half-wavelength consequently, if there is a pit where light is incident,
the amount of reflected light decreases tremendously because the reflected lights
are almost cancelled by interference. The incident and reflected beams pass
through the quarter wave plate and all reflected light is introduced to the
photodiode by the beam splitter because of the polarization rotation due to the
quarter wave plate. By the photodiode the reflected light, which has a signal
whether, a pit is on the disk or not is changed into an electrical signal.
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One of the issues of current chip design is the excessive power needed to
transport and store ever increasing amounts of data. A possible solution is to use
optics not just for sending data, but also to store information and perform
calculations, which would reduce heat dissipation and increase operating speeds.
Disproving previous beliefs in the matter, MIT researchers have demonstrated the
first laser built from germanium which can perform optical communications... and
it's also cheap to manufacture.
As Moore's law keeps giving us faster and faster computers, chip builders
also need higher-bandwidth data connections. But excessive heat dissipation and
power requirements make conventional wires impractical at higher frequencies,
which has lead researchers to develop new ways to store, transmit and elaborate
optically-encoded information.
If optical-based data elaboration is to have a future, researchers will need to
find a cheap and effective way to integrate optical and electronic components onto
silicon chips.
The solution found by the MIT team and detailed in a paper published in the
journal Optics Letters is notable not only because it achieves these objectives, but
also because it changes the way physicists have been looking at a class of materials
that were previously thought to be unsuitable for manufacturing lasers.
In a semiconductor, electrons that receive a certain amount of energy enter a
"conduction band" and are free to conduct electrical charge. Once they fall out of
this excited state, the electrons can either release their energy as heat or as photons.
Materials such as the expensive gallium arsenide are thought to be the best for
manufacturing lasers, because their excited electrons tend to go fall back into the
photon-emitting state.
However, the MIT team demonstrated that materials such as germanium,
whose electrons would normally tend to go in the heat-emitting state, can be
manipulated to emit photons and used to produce lasers that are cheap not only
because of the cost of the materials, but also because the processes used to build
them are already very familiar to chip manufacturers.
The researchers found two ways to make germanium "optics-friendly". The
first is a technique called "doping," which involves implanting very low
concentrations of a material such as phosphorous to force more electrons in the
conduction band and modify the electrical properties of the material.
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The second strategy was to "strain" the germanium, pulling its atoms slightly
farther apart than they would be naturally by growing it directly on top of a layer
of silicon. This makes it easier for electrons to jump into the photon-emitting state.
The team now needs to find a way to increase the concentration of
phosphorus atoms in the doped germanium to increase the power efficiency of the
lasers, making them more attractive as sources of light for optical data connections
and, one day, for computing as well.
The work is part of the Si-Based-Laser Initiative of the Multidisciplinary
University Research Initiative (MURI), and was sponsored by the Air Force Office
of Scientific Research (AFOSR).
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communication. Our all-optical logic gates were made using a thin film of metalfree phthalocyanine compound and a polydiacetylene polymer in a hollow fiber"
Logic gates are the building blocks of any digital system," he continues.
"An optical logic gate is a switch that controls one light beam with another. It is
"on" when the device transmits light, and "off" when it blocks the light."
"Our phthalocyanine switch operates in the nanosecond regime (i.e.,
Gigabits per second), functioning as an all-optical AND logic gate. To demonstrate
it, we waveguided a continuous (cw) laser beam co-linearly with a nanosecond
pump beam through a thin film of metal-free phthalocyanine. The output was sent
to a fast photo-detector and to an oscilloscope. The cw beam was found to pulsate
synchronously with the pump beam, showing the characteristic table of an AND
logic gate."
A schematic of the nanosecond all-optical AND logic gate setup. More
schematics and illustrations are available in "Recent Advances in Photonic Devices
for Optical Computing" by NASA/Marshall's Hossin Abdeldayem, Donald O.
Frazier, Mark S. Paley, and William K. Witherow.
"Our setup for the picosecond switch was similar, except that the
phthalocyanine film was replaced with a hollow fiber coated from inside with a
thin polydiacetylene film. Both collinear laser beams were focused on one end of
the tube, and a lens at the other end focused the output onto a monochrometer with
a fast detector attached. The product of the two beams demonstrates three of the
four characteristics of a NAND logic gate."
"Optical bistable devices and logic gates such as these are the equivalent of
electronic transistors," concludes Dr. Abdeldayem. "They operate as very high
speed on-off switches and are also useful as optical cells for information storage."
According to Dr. Frazier, these all-optical computer components and thinfilms developed by NASA are essential to the current worldwide work in electrooptical hybrid computers - and will help to make possible the astounding organic
optical computers that will be the standard of future terrestrial and space
information, operating and communication systems.
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structure within the computer chassis. Processor, memory, and I/O boards plug into
a backplane and then use the backplane bus to communicate.
Processor-memory buses are often design-specific, wile both I/O buses and
backplane buses are frequently standard buses with parameters established by
industry standards. The distinction between bus types is becoming increasingly
difficult to specify. Thus, the present application generically refers to computer
buses to encompass all processor-memory buses, I/O buses, and backplane buses.
The problem with computer buses is that they create a communication
bottleneck since all input/output must pass through a single bus. Thus, the
bandwidth of the bus limits the throughput of the computer. Physical constraints
associated with existing computer buses are beginning to limit the available
performance improvements generally available in computers.
The physical operation and constraints of existing computer bus designs are
most fully appreciated .A computer bus 20 positioned on a backplane 22. The
computer bus 20 is a set of wires, effectively forming a transmission line. A
random number of system cards (or cards) 24A-24N are attached to the computer
bus 20. By way of example, the cards 24 may include a video processing card, a
memory controller card, an I/O controller card, and a network card. Each card 24 is
connected to the computer bus 20 through a connector 26. Thus, each card 24 is
electrically connected to the set of wires forming the computer bus 20. As a result,
one card, say card 24A, can communicate with another card, say card 24N, by
writing information onto the computer bus 20. Only one card 24 can write
information onto the computer bus 20 at a time, thus a computer bus 20 can
generate a performance bottleneck as different cards 24 wait to write information
onto the bus 20.
Another problem associated with a traditional computer bus 20, is that its
performance is constrained by complicated electrical phenomenon. For example,
the connectors 26 effectively divide the bus into transmission line segments,
resulting in complicated transmission line effects. Note that the transmission line
segments will vary depending upon the number of cards 26 connected to the bus
20. This periodic loading of the bus 20 makes it difficult to optimize bus
performance. In addition, each connector 26 produces a lumped discontinuity with
parallel capacitance and series inductance, thereby complicating the electrical
characteristics of the bus 20. Note also that "T-connections" are formed between
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the wires of a computer bus 20 and the wires to a connector 26. The T-connections
complicate the electrical characteristics of the computer bus 20.
Each card 24 includes a transceiver circuit 28 connected to a card logic
circuit 30, which performs the functional operations associated with the card 24.
The transceiver circuit 28 is used to read and write information on the bus 20. That
is, the transceiver circuit 28 reads information from the bus 20, the card logic
circuit 30 processes the information, and then the transceiver circuit 28 writes
processed information to the bus 20. Additional electrical complications arise with
the transceiver circuits 28. For example, transmission line segments are formed
between each connector 26 and each bus transceiver 28 circuit. In addition, the
transceiver circuits 28 present an impedance at their package pins that depends
upon the circuit design, the electrical state of the transceiver, and the packaging.
In sum, the computer bus 20 constitutes a transmission line with complicated
electrical interactions caused by such factors as transmission line segments and
connectors forming lumped discontinuities with parallel capacitance and series
inductance. The bus 20 may be terminated with termination resistors (R) to reduce
transmission line effects, such as reflections and mismatches. Nevertheless,
solutions of this sort do not overcome all transmission line problems associated
with a computer bus 20.
Given these complicated electrical interactions, signals on the bus 20 do not
experience a uniform rise. That is, if the bus 20 was a perfect transmission line,
then high signals (digital ONES) written to the bus 20 would experience a uniform
rise. However, in view of the complicated electrical interactions on the bus 20,
high signals frequently experience one or more spurious signal transitions before
reaching a final peak value that can be processed. Waiting for signals to settle
causes delays. Another problem is that the complicated electrical interactions on
the computer bus 20 require higher powered drive signals, and thus more power
dissipation.
It is difficult to avoid these problems by changing the electrical
characteristics of the bus 20. That is, it is difficult to design a bus with improved
transmission line properties in view of the complicated factors that establish bus 20
performance. Thus, it would be highly desirable to design a new type of bus whose
performance is not contingent upon complicated transmission line effects
associated with prior art buses.
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and writes signals to a designated wire of the computer bus. If any card on the bus
writes a digital ONE to this designated wire of the computer bus, then all cards on
the bus read a digital high signal for this designated bit. This is a logical OR
operation performed by a hardwired circuit (the wire of the bus). The present
invention eliminates the physical wires of traditional computer buses and executes
the operation associated with such wires with digital gates. That is, the chip bus 40
of the invention performs logical OR operations with digital gates in order to
eliminate the transmission line problems associated with prior art computer buses.
The chip bus 40 is positioned on a backplane 22. Chip bus communication
lines 42 are electrically connected to the chip bus 40. In one embodiment, chip bus
input lines 44 carry input signals to the chip bus 40, the chip bus performs logical
OR operations on the input signals and generates output signals which are applied
to chip bus output lines 46. The chip bus communication lines 42 are electrically
connected to connectors 48, which in turn are electrically connected to cards 49.
The connectors 48 and cards 49 may be of the type known in the art. Thus, the chip
bus 40 of the invention can be used with prior art computer configurations.
Therein is a single bit embodiment of the chip bus 40 of the invention. In
particular, the figure illustrates a chip bus bit processor 50. The chip bus bit
processor 50 includes a logical OR circuit 51, illustratively shown as a wired OR
circuit. In this embodiment of the invention, the chip bus bit processor 50 also
includes a card signal driver 52 with a bus input signal driver 54, implemented as
an inverter, and a bus output signal driver 56, also implemented as an inverter.
Thus, it can be appreciated that the chip bus bit processor 50 of receives a
single bit input signal from four cards (49A, 49B, 49C, 49D). In particular, each
single bit input signal is driven by the bus input signal driver 54 and applied to the
logical OR circuit 51. If any single bit input signal is a digital ONE on the logical
OR circuit 51, then a high output is generated at all output nodes. For the
embodiment, the high output signal is seen by the card logic circuit 66 after
processing by inverters 56 and 64.
In one embodiment of the invention, the card 49B may include a card
transceiver 60B. In this embodiment, the card transceiver 60B includes a logic
output signal driver 62, implemented as an inverter, and a logic input signal driver
64, also implemented as an inverter. The signals from the card transceiver 60B are
then processed by a logic circuit 66 in a conventional manner.
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Therein are the same components shown , but the components are
rearranged to more fully describe the invention. In addition, the logical OR circuit
51 as being implemented with a four input OR gate. Thus, it is seen that each card
(49A, 49B, 49C, 49D) generates a single bit signal that is respectively applied to
the chip bus input lines (44A, 44B, 44C, 44D). The four signals are routed to the
four input OR gate 51. The output of the four input OR gate 51 is then routed back
to the cards (49A, 49B, 49C, 49D) through their respective chip bus output lines
(46A, 46B, 46C, 46D).
A four bit digital gate computer bus in accordance with the invention. The
four bit digital gate computer bus is used in conjunction with four processing cards
(49A, 49B, 49C, 49D). The four bit digital gate computer bus includes a chip bus
package 70 with package pins 72. Standard packaging techniques may be used to
form this structure. Within the package 70 are four chip bus bit processors (50A,
50B, 50C, 50D). The package 70 is positioned on a backplane 22.
Each processing card (49A, 49B, 49C, 49D) generates a single bit signal that
is applied to one of the chip bus bit processors 50. In particular, each processing
card generates a single bit signal that is applied to a chip bus input line 44 formed
on backplane 22. The signal reaches a package pin 72 and is then routed to a chip
bus bit processor 50 via a package internal trace 74. After processing by the chip
bus bit processor 50 is completed, the output signals are applied to chip bus output
lines 46 formed in the backplane 22. The chip bus output lines 46 route the output
signals to their respective cards for processing in a standard fashion.
The invention has now been fully described. Attention presently turns to a
discussion of various implementation issues. Implementations of the chip bus 40 of
the invention will have the shared portion of a physical bus implemented with
digital gates and will use point-to-point wiring to connect the daughterboards
(cards 24). As used herein, point-to-point wiring refers to wiring running directly
between pins of two packages, without "T-connections", "Y-connections", or
related configurations or sources which complicate signal transmission.
The preferred embodiment of the invention uses separate chip bus input lines
44 and chip bus output lines 46. However, it is possible to use bidirectional wires
to make these connections. The bidirectional wires save a factor of two in signals,
but cannot reach the speed attainable by the unidirectional technique, unless
special transceivers are used that can simultaneously send and receive on the same
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line. For the highest speed systems, it may be advantageous to use differential
simultaneous bidirectional signaling to reduce system noise.
Simultaneous bidirectional transceiver technology has been available in
emitter coupled logic for many years. The technology depends on having very high
performance differential amplifiers to subtract the outgoing signal from the signal
on the pin to recover the incoming signal. Simultaneous bidirectional signaling has
been demonstrated in CMOS, but is harder to implement because the close
matching and high gain of the bipolar devices is not available.
If the chip bus 40 is used in a synchronous system which is properly
arbitrated, it is not necessary to provide any control signals to control who is
driving the bus. While additional control signals are not required, the chip bus 40
of the invention does require more wires on the backplane than the traditional bus
structure, and also requires IC packages with many pins.
The logical OR circuit 51 may be implemented in any number of manners.
For example, wide fan-in pseudo-NMOS gates with four to six inputs have been
successful. For a chip bus bit processor 50 that process more than six signals, a
gate tree is generally required.
If the electrical distance from the card 49 to the chip bus 40 is less than
about half the transition time, the signal can be unterminated, and the driver can be
quite small. If the line is long enough to be terminated, it is possible to operate in
the 50 to 100 Ohm regime, rather than the sub-20 Ohm regime associated with a
heavily loaded conventional bus. Note that the termination can be done by
correctly sizing the driver transistors.
One way to use the chip bus 40 is as a drop-in replacement for a traditional
bus structure. In this mode, the chip bus provides the advantages of lower power
because it is easier to drive the lines, there are smaller propagation delays because
the point-to-point wiring is not periodically loaded, and the bus topology is
decoupled from the electrical behavior. The chip bus does not suffer from the
multiple reflection noise and settling delays associated with classical bus
implementations.
In a second implementation of the chip bus 40, a constraint is placed on the
wire lengths. It is easiest to think about this in the context of the unidirectional
implementation with all wire lengths equal. In this case, under the assumption of
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no clock skew, the signal duration may be set to the minimal width to ensure
recognition. The electrical distance from the card 49 to the chip bus 40 enters into
latency, but no longer influences the maximum signaling speed.
The chip bus 40 of the invention is extremely fast. Simulated chip bus 40
designs have shown bit rates of 2.4 Gbits/sec per line. The delay through the chip
bus 40 is only 330 pS. A portion of the chip bus's speed is attributable to the fact
that input signals to the bus 40 can be pipelined, four input signals A, B, C, and D
are respectively carried by chip bus input lines 44A, 44B, 44C, and 44D at time
To. The pulse width of each signal is equivalent to the pulse width of the signal
clock, shown as Tp.. 6B illustrates the progression of the four input signals after a
clock cycle, that is, at time T=To Tp. the same signals on the chip bus output lines
46A, 46B, 46C, and 46D. The signals appear on the chip bus output lines at a time
T=To nTp, where n is the number of clock cycles required to drive the signals
through the chip bus 40. that it is possible to have an input signal to the bus and an
output signal from the bus every cycle. This pipelining capability results in
extremely high processing speeds that are not possible with traditional bus
architectures.
Current processor designs have about twenty gates between latches. The sum
of the setup and hold time of the latches is around 10% of the cycle time, or two
unit gate delays. The bus chip can be modeled as a pure delay, it doesn't change
pulse width. This implies that up to ten bus signals could be stacked in one
processor cycle. If some margin is allowed for timing tolerances, a practical limit
near eight transactions per cycle might be obtained with very careful design.
The real limitations on the speed of the system are clock skew and bit-to-bit
skew within a single package. Careful design of the wiring on the backplane 22
allows wire skew to be reduced to below all other skews in the system. Clock skew
can be kept low by using self-compensating clock drivers.
If the bus is wide enough that more than one package 70 is required, two
elements will contribute to the bit-to-bit skew. One is the difference in average
total delay between the parts, and the other is the spread in delay between the pins
within a single part. The traditional way of coping with part-to-part variations is to
bin the parts. Note that this does not cause yield loss, it just requires that any
particular board be populated with parts that have the same total delay dashnumber. It is also possible to build active compensation circuits into the parts to
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force the average delay to match, for example, a reference delay printed on the
board.
Bit-to-bit skew within a part is controlled by a combination of the vendor's
process control, and what special efforts were taken during the design and layout
of the chip to minimize the sensitivity of the part to random variations in the
processing.
The clock protocol also influences the effect of delay variations. If the
signalling is source synchronized on a chip-by-chip basis, that is each group of bits
that is carried by a single bus chip carries its own clock, the sensitivity to interchip
delay variations may be minimized. This does add some complexity to the receiver
design to ensure that all the bit groups are correctly realigned. The source clock
may be used to provide the reference input for delay lock loops to compensate
these errors. Errors in arrival time of signals at the inputs of a single bus chip can
directly subtract from the signal pulse width.
Each signal can carry its own clock, for example, by using Manchester
coding as the synchronization protocol. Any method that carries the clock on the
same line as the signal will pay some overhead in bandwidth and latency. One
advantage of using a self clocking protocol is that all inputs to a chip bus can be
individually actively delay compensated by choosing one of the inputs as a
reference for all the others. This can be made to work both for the chip buses and
the system chips, and provides a global clock synchronization method as a side
effect of minimizing skew errors in the interconnect.
The available bandwidth in a chip bus system in accordance with the
invention can be reduced by parasitic reactances in the IC packages and in the
interconnect. Reactances in the package can reduce the bandwidth by two
mechanisms: low pass filtering the signals and introducing noise. If the IC
packages are designed with close attention to the parasitics, it is possible to resolve
these problems. For example, a flip chip circuit can be used for very low series
inductance, and to maintain a controlled impedance right up to the pads.
Simultaneous switching noise caused by inductance in the ground return
path in the chip packages (ground bounce) and crosstalk between signals also
introduce uncertainty in when the transitions are recognized. The same measures
that are used to reduce package parasitics to avoid bandwidth reduction will also
help reduce these noise sources.
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The ability to swap out boards in servers without powering down the system
or stopping the clock has become a requirement for new server designs. This is
rather difficult to implement using a traditional bus structure because both the
insertion and removal of the board produces electrical transients on the backplane.
The chip bus of the invention provides an elegant solution to this problem. A
disable pin for each port on a bus chip can be provided to force the corresponding
port into an idle state where the output is not driven and the input is ignored. This
isolates a board being removed or inserted from the bus. The control of these
disable signals can be derived from variable length fingers on the backplane
connectors.
It is possible to provide small state machines on the chip bus to perform
arbitration or protocol functions. If protocol or arbitration logic is embedded in the
chip bus, two problems arise. The first is that the gate depth rises beyond the
minimum needed to accommodate the fanout. The second is that connections are
required between the chip buses to coordinate control. Both factors increase
latency and reduce bandwidth. These problems may be reduced by pipelining the
bus protocol and arbitration. The pipelining can be done through central or
distributed arbitration. In the case of central arbitration, a special arbiter chip is
placed on the backplane near the chip buses. To match the performance of the chip
buses, all connections to the arbiter must be point-to-point, and the length matched
to the signal lines. The shortest pipeline sequence is: request, resolve, grant,
transfer. Distributed arbitration can be accomplished by running the same state
machine on each of the devices present on the bus. This usually requires dedicating
N request lines, where N is the number of devices. Pipelining the arbitration is still
required.
When state machines or other intelligence is not used, the chip bus is
logically equivalent to passive wires on a backplane. This allows them to run at the
maximum speed that the technology will support and permits bit-slicing the bus to
accommodate real world packaging constraints.
In the bi-directional communication line implementation, a package would
require control pins to control the signal direction. A package would typically
require one power or ground pin per two signal pins. Standard pin versus speed
tradeoffs may be made when designing a package 70. The chip bus 40 of the
invention may be clocked at up to eight times the processor clock speed.
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light receiving sources are controlled by dynamic bandwidth allocators of the type
described below.
The optical bus bit processor 80 may also be implemented as
lithographically produced polymer or silica planar waveguides. Preferably, the
output optical connector card 110 is DC coupled and has fast recovery from
overload. This is important because several input pulses may overlap at the
receiver array 112 during system start-up or during a fault.
Those skilled in the art will appreciate that the optical computer bus 90 of
the invention is very fast. The optical and electrical implementations of the
invention allow the bus clock to operate at a multiple of the system clock. This
operation illustrates a four word bus which makes connections to four input optical
connector cards 100, although only one is shown for the sake of simplicity.
Similarly, the bus is connected to four output optical connector card 110, although
only one is shown. Relying upon this example, if the clock for the optical bus 90 is
operated at four times the speed of the system clock, then four bus time slots exist.
Each of the four connector cards can transmit an eight bit data word in a bus time
slot.
Waveform 120 illustrates the system clock signal. Waveform 122 illustrates
the bus clock signal, which is four times faster than the system clock signal.
Waveform 124 illustrates that a first input optical connector card transmits data (an
eight bit word in this example) during the first bus time slot, which corresponds to
the first bus clock signal cycle. The second input optical connector card transmits
data during the second bus clock cycle, the third input optical connector card
transmits data during the third bus clock cycle, and the fourth input optical
connector card transmits data during the fourth bus clock cycle, during one system
clock cycle and four bus clock cycles (bus time slots), each optical connector card
is allowed to transmit data on the system bus. This process may be repeated for
subsequent clock cycles.
A flat or uniform allocation of optical bus bandwidth. Observe that during
the course of a single computer system clock signal cycle, every node gets to send
one message in its own bus time slot. This functionality is a superset of a crossbar
because every node can observe all of the transmissions. This allows for the
implementation of snoopy cache coherence methods that have a lower overhead
than the directory based methods required for a classic crossbar.
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104. Preferably, a deskew circuit 154 and a drive circuit 156 are used at the output
end of the transmission circuit 152.
An output optical connector card 110 has a similar configuration to that of
the input optical connector card 100 . In particular, an output optical connector
card 110 has a receiver array 112 connected to a driver array 114, which includes a
set of receiving dynamic bandwidth allocators, which are controlled by receive
mask signals stored in receive mask registers. The output from the driver array 114
is applied to a buffer array.
The processing of a bit signal between a transmitting dynamic bandwidth
allocator 150 of an input optical connector card 100 and a receiving dynamic
bandwidth allocator 170 of an output optical connector card 110. As discussed
above, the transmitting dynamic bandwidth allocator 150 includes a transmission
circuit 152, a transmission signal mask register 148A of the transmission mask
array 148, a deskew circuit 154 and a driver 156. Similarly, the receiving dynamic
bandwidth allocator 170 includes a driver 172 and a receiver circuit 174, which is
controlled by a receiving mask bit from the receiving mask register 176 of a
receiving mask register array (not shown). The receiver circuit 174 operates in the
same manner as the transmission circuit 152. The receiving dynamic bandwidth
allocator 170 also includes a skew compare circuit 178, which identifies skew
between the received signal form the optical bus and the bus clock signal. The
skew value is then sent to the deskew circuit 154 of the transmitting dynamic
bandwidth allocator 150 so that future signals are sent with reduced skew.
It should be appreciated that the disclosed dynamic bandwidth allocation
concept of the invention is also applicable to the disclosed digital gate computer
bus. When implemented in reference to the digital gate computer bus embodiment
of the invention, light array transmitters 104 and receivers 112 are omitted.
The foregoing descriptions of specific embodiments of the present invention
are presented for purposes of illustration and description. They are not intended to
be exhaustive or to limit the invention to the precise forms disclosed, obviously
many modifications and variations are possible in view of the above teachings. For
example, a traditional backplane 22, connectors 48, and cards 49 need not be used.
The embodiments were chosen and described in order to best explain the principles
of the invention and its practical applications, to thereby enable others skilled in
the art to best utilize the invention and various embodiments with various
modifications as are suited to the particular use contemplated.
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APPLICATIONS :-
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MERITS :1. Optical computing is at least 1000 to 100000 times faster than
todays silicon machines.
2. Optical storage will provide an extremely optimized way to store
data, with space requirements far lesser than todays silicon chips.
3. Super fast searches through databases.
4. No short circuits, light beam can cross each other without
interfering with each others data.
5. Light beams can travel in parallel and no limit to number of
packets that can travel in the photonic circuits.
6. Optical computer removes the bottleneck in the present day
communication system
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DRAWBACKS
1. Todays materials require much high power to work in consumer
products, coming up with the right materials may take five years or
more.
2. Optical computing using a coherent source is simple to compute
and understand, but it has many drawbacks like any imperfections
or dust on the optical components will create unwanted
interference pattern due to scattering effects. Incoherent processing
on the other hand cannot store phase information.
17
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FUTURE TRENDS
The Ministry of Information Technology has initiated a photonic
development program. Under this program some funded projects are continuing
in fiber optic high-speed network systems. Research is going on for developing
new laser diodes, photodetectors, and nonlinear material studies for faster switches.
Research efforts on nanoparticle thin film or layer studies for display devices are
also in progress. At the Indian Institute of Technology (IIT), Mumbai, efforts are in
progress to generate a white light source from a diodecase based fiber amplifier
system in order to provide WDM communication channels.
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REFERENCES
1. Debabrata Goswami , article on optical computing, optical components
and storage systems, Resonance- Journal of science education pp:56-71
July 2003
advances
in
photonic
devices
for
optical
computing,
6. www.sciam.com
7. www.msfc.com
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