CC 415 Data Acquisition System

CHAPTER 2
Signal Conditioning
Amplification and Filtering

Prof. Fawzy Ibrahim

Electronics and Communication Department
Arab Academy for Science and Technology (AAST)

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 Chapter Contents

2.1 Ideal Operational Amplifiers

2.2 The Inverting Configuration
2.3 The Noninverting Configuration
2.4 Difference Amplifiers
2.5 The Instrumentation Amplifier
2.6 Active Filters

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2.1 Ideal Operational Amplifier (op–Amp)
Introduction:
• OP–Amps are utilized in hundreds of application. One can do almost
anything with op–Amps. Therefore, op – amps are produced on IC’s.
• An IC op–amp is made of a large number of transistors (tens),
resistors and usually one capacitor.

2.1.1 The op–Amp Terminals

• From signal point of view op–Amp has three terminals as shown in
Fig. 2.1:
– Two input terminals (Terminal 1 and Terminal 2 )
– One output terminal (Terminal 3)
• From operational point of view op–Amp has five terminals as shown in
Fig. 2.2:
– Two terminals for the inputs and one for the output.
– Two terminals for dc power supplies: (Terminal 4 for the positive
voltage VCC and Terminal 5 for the negative voltage – VEE)

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 2.1.1 The op–Amp Terminals (Continued)
• Other terminals are induced for frequency compensation and terminals for
offset nulling.

Fig. 2.1 Circuit symbol for the op amp.

Fig. 2.2 The op amp shown connected to dc power supplies.

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2.1.2 Function and characteristics of the ideal op–Amp
Refer to Fig. 2.3:
1. V3 = Vo = A (V2 – V1) where A is the amplifier gain (open-loop gain)
2. The ideal op – amp is not supposed to draw any input current:
i1 = 0 and i2 = 0, therefore, the input impedance Zin = ∞
3. V3 = A (V2 – V1) independent of the current that may be drawn from
terminal 3 into the load impedance, therefore the out impedance
Zout = 0.
4. V3 is in phase with V2 and out of phase with V1. For this reason
Terminal 1 is called the inverting input terminal and is distinguished
by “–” sign, while terminal 2 is called the noninverting input terminal
and is distinguished by a “+” sign.

Fig. 2.3 Equivalent circuit

of the ideal op amp.

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 2.1.2 characteristics of the ideal op–Amp (Continued)
5. V3 = A (V2 – V1), the op–amp respond only to the difference signal (V2 –
V1) and hence ignore any signal common to both inputs. This is called
common – mode rejection (zero common mode gain or infinite common
mode rejection)
6. Op–amps are direct–coupled or dc amplifiers that amplify signal whose
frequency is low or zero.
7. The ideal op–amp has a very large gain and ideally A ∞. These
characteristics are summarized in Table 2.1.
Table 2.1 characteristics of ideal Op – Amp.

# Characteristic Description
1 Zin = ∞ Infinite input impedance
2 Zout = 0 Zero output impedance
3 Zero common mode gain Infinite common mode rejection
4 A≈ ∞ Infinite open–loop gain
5 BW = ∞ Infinite bandwidth

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2.2 The Inverting Configuration
Refer to Fig. 2.4
• R2 is connected from the output terminal of the op–amp (Terminal 3)
back to the inverting or negative input terminal (Terminal 1) R2 apply
a negative feedback.
• Input signal is connected terminal 1 through a Resistance R1
• Terminal 2 is grounded

Fig. 2.4 The inverting closed-loop configuration.

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2.2 The inverting configuration (Continued)
2.2.1 The Closed – Loop Gain
Refer to Fig. 2.5
• The closed – loop gain G is defined as G = Vo/V1
Since Vo = (V2 – V1) A yields V2 – V1 = Vo/A = 0 (A  ∞)
V2 = V1 or V1 = V2
• This is called a virtual short circuit means that whatever voltage at
2 will automatically appears at 1 because A  ∞

Fig. 2.5 The inverting closed-loop configuration.

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 2.2.1 The Closed – Loop Gain (Continued)
Apply Ohm’s law we have:
V V 1 0
i1 
I V I V I
R1 R1 R1
For ideal op–amp Zin = ∞ No current go into the op–amp therefore
Vo is given by:
V o V I  i1 R 2  0  V I R 2   V I
R2
R1 R1
V o
  R 2
 G   R 2
V I R 1 R 1

• The closed–loop gain is the simply the ratio of the two resistor R2
and R1.
• The minus sign (–) means that the closed–loop gain amplifies
provides a signal inversion (or the output signal is 180° phase–
shifted with respect to the input. Therefore, this is called inverting
configuration).

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 2.2.2 Input and Output Resistances
• Assume ideal op–amp with infinite
open–loop gain.
• The input resistance of the closed – loop
inverting amplifier of Fig.2.6 is given by:

VI VI 
Ri R1 Fig.2.6 The inverting
i1 V I / R 1 closed-loop configuration

• It is required that the input resistance must be high, we have to select

a high value of R1. However if the required gain R2/R1 is also high,
then R2 could became impractically large.
• We may conclude that the inverting configuration suffers from a low
input resistance.
• Refer to fig.2.6 (a) Vo = A (V2 – V1) ideal voltage source, it follows that
the output resistance of the closed–loop amplifier Ro = 0
• A solution to compromise between the requirement high Ri and high
gain consider the following example:
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 2.2.2 Input and Output Resistances
Example 2.1
Assuming ideal op–amp, consider the amplifier circuit shown in
Fig.2.7. Assume also that for practical reasons it is required not to
use resistors greater than 1 MΩ. For this circuit do the following:
a) Derive an expression for the closed–loop gain Vo/VI.
b) Design this circuit to have a gain of G = 100 and Ri = 1 MΩ.
c) Compare your design with that based on the inverting configuration
of fig.2.5
Solution:
V2 – V1 = Vo/A = -Vo/∞ = 0
V1 = V2 = 0 virtual ground
Determination of the current i1

V V
i1  I 1 V I
R1 R1
Figure 2.7 Circuit for Example 2.1 the circled numbers
indicate the sequence of the steps in the analysis
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 2.2.2 Input and Output Resistances
Example 2.1 (Continued)
Determination of i2

i1 = i2 Since zero current flows into the inverting terminal

i2 = i1 = VI/R1

The voltage at node x is given by:

   0  V I   R2
V x V 1 i2 R 2 R2 V I
R1 R1
Determination of i3:

0  V x R 2
i 3   V I
R 3 R 1 R 3
Determination of i4:
V I R 2
i4  i2  i3   V I
R 1 R 1R 3
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 2.2.2 Input and Output Resistances
Example 2.1 (Continued)
Determination of Vo:
R2 V I  R2
V o V x  i4 R 4   V I( V I) R 4
R1 R1 R1R 3
a) The closed – loop voltage gain is given by:
G  V o   R 2 (1  R 4  R 4 )
VI R1 R2 R3
b) Since the input resistance of 1 MΩ is required.
Ri = R1 = 1 MΩ.
From the gain equation G, the maximum possible value for the first
factor R2/R1 = 1, thus select R2 = 1 MΩ
To obtain G = -100, the second factor of the gain expression is 100,
we select maximum allowed value of resistance to R4 = 1 MΩ
The value of R3 is calculated as
1M  1M 
(1   )  100
1M  R3
R3 = 10.2 KΩ
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 2.2.2 Input and Output Resistances
Example 2.1 (Continued)
c) In comparison with inverting configuration shown in Fig. 2.8,
use input resistance:
Ri = R1 = 1 MΩ
For G = -R2/R1 R2 = 100 MΩ
Which is impractically large value.
Figure 2.8 The inverting configuration
Current Amplifier:
Refer to Fig. 2.9, marking R3 < R2, if
(R3 = R2/K, where K > 1)
i2 = i1 and i3 = K i1 i4 = (K+1) i1
• The circuit can be used as a current amplifier
• The current i4 is independent of R4.

The current amplifier of Fig. 2.9 delivers its output

current to R4. It has a current gain of (1+R2/R3), a zero
input resistance, and an infinite output resistance. The
load(R4), however, must be floating (i.e., neither of its
two terminal can be connected to ground). Figure 2.9 a current amplifier

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 2.2.3 The Weighted Summer Amplifier

• A very important application of the

inverting configuration is the weighted
summer amplifier as shown in Fig. 2.10.
• V2 – V1 = Vo/A = Vo/∞ = 0
V2 = V1 = 0 Virtual Ground

• Apply ohm’s law to have: Figure 2.10 weighted summer amplifier

i1 = V1/R1, i2 = V2/R2, …… in = Vn/Rn
i = i1 + i2 + i3 +……+in since op–amp input current = 0

Rf Rf Rf
V o  0  i R f  i R f   ( V1  V2  ....  V n)
R1 R2 Rn
• The output voltage is a weighted sum of the input signals V1, V2, …
• Each summing coefficient can be independently adjusted by the
corresponding feed in resistors (R1, R2, … or Rn).
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 2.2.3 The Weighted Summer Amplifier (Continued)

• For summing signals with opposite signs, two ideal op–amps can be
used as shown is Fig.2.11 and is given by:

Ra Rc Ra Rc Rc Rc
V o  V 1 ( )( )  V 2 ( )( )  V 3 ( )  V 4 ( )
R1 R b R2 Rb R3 R4

Figure 2.11 A weighted summer capable of implementing summing coefficients of both signs.

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2.3 The Noninverting Op Amp Configuration
As shown in Fig.2.12, the input is
connected to input (+ve) terminal
of the op-amp and one terminal of
R1 is connected to the ground.

2.3.1 Closed – loop Gain Fig.2.12 The Noninverting configuration

Refer to Fig. 2.13

• The closed loop – gain
• G = Vo/V1

Fig.3.13 Analysis of the noninverting circuit. The sequence of the steps in

the analysis is indicated by the circled numbers.
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 2.3.1 Closed – loop Gain (Continued)
• Assuming that the op-amp is ideal A ∞
• VId = V2 – V1 = Vo/A = 0 V1 = V2 = VI

 0
i 1  V I  V I  i 2
R 1 R 1

V o V I  i2 R 2  V I  V I . R 2  V I (1  R 2 ) which yields:
R1 R1
G  V o  1  R 2
V I R 1
2.3.2 Characteristics of the Noninverting Configuration
The gain G is positive
• The input impedance Zin = ∞ VI/I = VI/0 = ∞
• The output impedance Zout = 0 ideal voltage source

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 2.3.4 The Voltage Follower
• In many applications, a buffer amplifier is needed as an impedance
transformer or power amplifier that has Rin = ∞, Rout = 0 and G = 1 or
the output just follow the input which is called voltage follower.
• Fig.2.13 can be utilized as voltage follower by making R2 = 0 and R1
= ∞ as shown in Fig. 2.14.

Fig. 2.14 (a) The unity-gain buffer or follower amplifier. (b) Its equivalent circuit model.

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 2.4 Difference Amplifiers
• Difference amplifier is one that
responds to the difference between the
two signals applied at its input and
ideally rejects signals that are common
to the two inputs.
• As discussed before, the representation
of signals in terms of their differential
and common – mode components as
shown in Fig. 2.15
Fig. 2.15 Representing the input
• The output voltage V0 is given by: signals to a differential amplifier
V0 = Ad VId + ACm VICm in terms of their differential and
common-mode components.
Where
Ad denotes the amplifier differential amplifier gain.
ACm denotes the common – mode gain.
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 2.4 Difference Amplifiers (Continued)
• The efficiency of a differential amplifier is measured by the degree of
its rejection of the common–mode signals in preference to
differential signal which is referred to as Common – Mode Rejection
Ratio (CMRR) and is defined as:

CMRR  20 log Ad
A Cm

• The gain of the noninverting Configuration (1+ R2/R1) and the gain of
inverting configuration (-R2/R1).
• To get the difference between the two inputs, we have to make the
two gain magnitudes equal in order to reject the common mode
signals. Fig.2.16 is used to alternate (1+ R2/R1) to (R2/R1).
• The proper ratio of the voltage divider can be determined by:

R 4 (1  R 2 )  R 2 or R4  R2
R 4 R 3 R1 R1 R 4 R 3 R 2 R1
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2.4 Difference Amplifiers (Continued)
R4  R2
• This condition is satisfied
R 3 R1
• The output can be determined by superposition as shown in Fig.2.17

• Refer to Fig.2.17 (a) V I2  0 V o1   R 2 .V I1

R1
R 4 (1  R 2 )  R 2
• Refer to Fig.2.17 (b) V I1  0  V o2 V I2 V I2

R4 R3 R1 R1
• The output voltage, by applying the superposition principle
R
V o  V o1  V o 2  R 2 (V I 2  V I 1 )  2 V Id
R1 R1
 R2
• The difference amplifier gain A d
R1
• We can select R3 = R1 and R4 = R2

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2.4 Difference Amplifiers (Continued)

Fig. 2.16 A difference amplifier.

Fig. 2.17 Application of superposition to the analysis of the circuit of Fig. 2.16.

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 2.4 Difference Amplifiers (Continued)
• Refer to Fig.2.18 the common – mode gain ACm can be calculated
as follows:
1 R4 R3  1 
i1  [V ICm  V ICm ]V ICm i2
R1 
R4 R3 
R 4 R 3 R1

 R4   R4  R2 . R3  R4 (1 R2 . R3)
Vo V ICm i2 R2 V ICm V ICm V ICm
R4  R3 R4  R3 R1 R4  R3 R4  R3 R1 R4
Thus
A Cm  V o ( R 4 )( 1  R 2 . R 3 )  0
V ICm R 4  R 3 R1 R 4
When R2  R3
R1 R 4

A ICm  0  CMRR  

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2.4 Difference Amplifiers (Continued)
• Refer to Fig. 2.19 the input resistance  V Id
R id
i1
V Id  R 1i1 0  R1i1 R id  2 R1
• R1 is required to be large and R2/R1 is desired to be large
• This configuration has two disadvantages:
1. Low input resistance 2. It is difficult to vary Ad

Fig. 2.18 Analysis of the Fig. 2.19 Finding the input resistance of
difference amplifier the difference amplifier.

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 2.5 The Instrumentation Amplifier
• The low input resistance problem of the difference amplifier can be
solved by using two voltage followers with gain as shown in Fig.
2.20(a) A1 and A2 which connected as noninverting configuration
with gain (1  R 2 )
R1
• The difference amplifier A3 operates on the difference signal
R 2 )  (1  R 2 )
(V I2 V I1 )( 1  V Id and provides the output
R1 R1
V o  R 4 ( 1  R 2 ) V Id
R 3 R 1
 R 4 (1  R 2 )
Therefore, the differential gain
A d
R 3 R1

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2.5 The instrumentation Amplifier (Continued)
• ACm = 0 and high differential gain
• The disadvantages of 2.20 (a) are:
1. VICm is amplified in the first stage and may saturate the 2nd state
2. A1 and A2 must be matched to have the same gain.
3. To vary Ad, we have to change R1 (up with A1) and R1 (with A2)
and have to be perfectly matched (very difficult).
• Disconnect the node X between the two resistors R1 and R1 as shown
in Fig.2.20.(b) will solve the three problems.
- Refer to Fig.2.20 (b) assuming ideal op–amps as shown in Fig.2.20 (c)

V Id
V I2 V I1  V Id  i 
2R1
 (1  2R 2)
V o 2  V o1 V Id
2R1

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 2.5 The Instrumentation Amplifier (Continued)

Fig. 2.20 A popular circuit for an instrumentation amplifier: (a) Initial approach to the
circuit; (b) The circuit in (a) with the connection between node X and ground removed and
the two resistors R1 and R1 lumped together. This simple wiring change dramatically
improves performance; (c) Analysis of the circuit in (b) assuming ideal op amps.
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2.5 The Instrumentation Amplifier (Continued)
• The overall difference voltage gain is given by:
V o  R 4 (1  R 2 )
Ad 
V Id R 3 R1
Example 2.3:
Design an instrumentation amplifier circuit (Fig.3.20(b)) to provide a
gain that can be varied over a range of 2 to 1000 utilizing 100 KΩ
variable resistances or potentiometer (pot).
Solution:
• The first stage is used as gain stage.
• The second stage is used as a difference stage
of gain 1 therefore select R3 = R4 = 10 KΩ.
• Choose 2R1 as a series of two resistors R1f (fixed)
and R1V = 100KΩ pot. as shown in Fig.2.21
• difference voltage gain is Fig. 2.21 Choice of 2R1
R 4 (1  2 R 2 )
Ad 
R3 2R1
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2.5 The Instrumentation Amplifier (Continued)
Example 2.3: (Continued)
• To realize an adjustable gain over a range of 2 to 100, we can write:

(1  2R 2 )
= 2 to 1000
R 1 f  R 1V

(1  2R 2 )  2 and 2 R 2 )  1000
(1 
R 1 f  R 1V R 1 f  R 1V
• Solve these two equations gives
R1f = 100.2 Ω and R2 = 50.05 KΩ

We can choose the standard resistors R1f = 100 KΩ and R2 = 49.9 KΩ

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2.6 Active Filters
• A Filter circuit can be constructed using passive components:
resistors and capacitors. An active filter additionally uses an amplifier
to provide voltage amplification and signal isolation or buffering.

2.6.1 Low-Pass Filter

An ideal low-pass filter provides a content
output from the dc up to cutoff frequency
fOH and then passes no signal above that
frequency. The ideal response of low-pass
filter is shown in Fig.2.22.
• The first order low-pass filter using a
signal resistor and capacitor is shown in
Fig.2.23 (a). The output voltage is given Fig.2.22 The idea response of LPF
by:
1 / Sc1 Rf Rf 1
V o ( s )  Vi ( s )( ).(1  )  Vi ( s )(1  ).( )
1 / Sc 1  R1 RG RG 1  Sc 1 R1

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 2.6.1 Low-Pass Filter (Continue)
• The filter transfer function is defined as H(s) = Vo(s) / Vi (s) and is
given by:
Vo ( s ) Rf 1
H ( s)   (1  )( )
Vi ( s) RG 1  s R1 C1
• The filter frequency response is determined by replacing s by j in
the filter transfer function H(s) which leads to H(j) = Vo(j) / Vi (j) and
is given by:
Vo ( j  ) Rf 1 1
H ( j )   (1  )( ) Av (1  j /  oH )
Vi ( j  ) RG 1  j /  oH
Where Av is the filter voltage gain and OH is the cutoff frequency which
calculated as:

1 1
woH  2f oH   f oH 
C1 R1 2R1C1
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 2.6.1 Low-pass Filter (Continued)
• The Bode-plot of H(j) is shown in Fig.2.23 (b)
Rf 1 1
AV  1  w oH  2 f oH   f oH 
RG C 1 R1 2 R1C 1
Example:
• Calculate the cutoff frequency of a first order low-pass filter when
1
R 1  1.2 K and C  0.02µF foH  3 6
 6.63kHz
2 (1.210 )(0.0210 )

Fig.2.23 First-order low-pass active filter (a) the circuit; (b) the Bode plot.
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 2.6.2 High–Pass Filter
• A filter that provides or passes
signals above cutoff frequency FOL
is high-pass filter The ideal
response of this filter is shown in
Fig.2.24.
• The first-order high-pass filter
circuit is shown in Fig.2.25 (a).
The output voltage is given by:
R1 R
V o ( s )  V i ( s )( ).( 1  f ) Fig.2.24 The idea response of HPF
R1  1 / Sc 1 RG
Vo ( s ) Rf SC 1 R1 SC 1 R1
H (s)   (1  )( )  Av ( ) The filter transfer function
Vi ( s ) RG 1  SC 1 R1 1  SC 1 R1
Vo ( j ) j / OL
H ( j )   Av (1  j / OL ) The filter frequency response
Vi ( j )
• The Bode-plot of H(j) is given in Fig.3.25 (b)
Rf 1 1
AV  1  and w oL  2 f oH   f oL 
RG C 1 R1 2 R1C 1
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 2.6.2 High–Pass Filter (Continued)
Example:

• Calculate the voltage gain and the cutoff frequency of a high-pass

filter shown in Fig.2.25 for R1 = 2.1 KΩ, C1 = 0.05 µF and RG=10KΩ
and RF = 50 KΩ

Solution:
Rf 50
AV  1  1 6 (The voltage gain)
RG 10
The cutoff Frequency:

1 1
foL   3 6
 1.5KHz
2R1C1 2 (2.110 )(0.0510 )

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 2.6.2 High–Pass Filter (Continued)

(b)
(a)

Fig. 2.25 High-pass filter: (a) the circuit; (c) response Bode plot.
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 2.6.3 Band-Pass Filter
• The Band-pass filter circuit passes
signals above one ideal cutoff
frequency fOL and below a second
cutoff frequency fOH as shown in
Fig.2.26.
• Fig.2.27 shows a band-pass filter using
two stages, the first a high-pass filter
and the second a low-pass filter. The
combined response represent the filter. Fig.2.26 The idea response of BPF
R1 Rf SR 1C 1 Rf
V o 1 ( s )  V i ( s )( ).( 1  )  V i ( s )( )(1  )
R1  1 / Sc 1 RG 1  SR 1C 1 RG
1 / SC 2 Rf 1 Rf
V o ( s )  V o1 ( s )( ).(1  )  V o1 ( s )( ).( 1  )
R 2  1 / Sc 2 RG 1  SR 2 c 2 RG
• Combine the above equations we get the filter transfer function as:
Rf 2 SR 1C 1 1 Vo ( s )
V o ( s )  V1 ( s ).(1  ) ( )( )  H (s)
RG 1  SR 1C 1 1  SR 2 c 2 Vi ( s )
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2.6.3 Band-Pass Filter (Continued)
• The filter frequency response is determined by replacing s by j in
the filter transfer function H(s) which leads to H(j) = Vo(j) / Vi (j) and
is given by:
H ( j )  
j / OL 1
A 1  j /
v
x
 OL
1  j /  OH
Rf 1
AV  (1  )2 FoL  and
1
RG 2R1C1 FoH 
2R2C2
• The Bode-plot is shown in Fig.2.27 (b).
Example:
• Calculate the cutoff frequencies of the band-pass filter if R1 = R2 =10kΩ,
C1 = 0.1 µF and C2 = 0.002 µF
Solution:
1 1
FoL   3 7
 159.15Hz
2R1C1 2 (1010 )(10 )
1 1
F oH   4 5
 7 . 96 KHz
2 R 2 C 2 2   10  2  10
38 of 39 CC415 Ch.2 S. Conditioning Prof Fawzy Ibrahim
 2.6.3 Band-Pass Filter (Continued)

Fig. 2.27 Bandpass active filter (a) the circuit; (b) response Bode plot.

39 of 39 CC415 Ch.2 S. Conditioning Prof Fawzy Ibrahim