Computer Architecture

Exercise 1
Due 02. November 2010, 12:15pm

Part 1. Case Study - Chip Fabrication Cost

There are many factors involved in the price of a computer chip. New, smaller technologies
give a boost in performance and a drop in required chip area. In the smaller technology,
one can either keep the small area or place more hardware on the chip in order to get
more functionality. In this case study, we explore how different design decisions involving
fabrication technology, are, and redundancy affect the cost of chips.
1.1. Table 1 gives the relevant chip statistics that influence the cost of several current
chips. In the next few exercises, you will be exploring the trade-offs involved between the
AMD Opteron, a single-chip processor, and the Sun Niagara, an 8-core chip.
Table 1: Manufacturing cost factors for several modern processors. = 4.
Chip
Die Size Estimated defect Manufacturing Transistors
(mm2 )
rate (per cm2 )
size (nm)
(millions)
IBM Power5
389
0.30
130
276
Sun Niagara
380
0.75
90
279
AMD Opteron 199
0.75
90
233

a) What is the yield for the AMD Opteron?

b) What is the yield for the Sun Niagara processor?
c) Why does the Sun Niagara have a worse yield than the AMD Opteron, even though
they have the same defect rate?
1.2.
You are trying to figure out whether to build a new fabrication facility for your
IBM Power5 chips. It costs $1 billion to build a new fabrication facility. the benefit of
the new fabrication is that you predict that you will be able to sell 3 times as many chips
at 2 times the price of the old chip. The new chip will have an area of 186mm2 , with a
defect rate of 0.7 defects per cm2 . Assume the waver has a diameter of 300mm. Assume
it costs $500 to fabricate a wafer in either technology. You were previously selling for 40%
more than their cost.
a) What is the cost of the old Power5 chip?
b) What is the cost of the new Power5 chip?
c) What was the profit on each old Power5 chip?
Coordinator: Dipl.-Ing. Philpp Mahr (Dipl.-Inf. Benajmin Andres)

d) What is the profit on each new Power5 chip?

e) If you sold 500,000 old Power5 chips per month, how long will it take to recoup the
costs of the new fabrication facility?

Part 2. Case Study - Power Consumption in Computer Systems

Power consumption in modern systems is dependent on a variety of factors, including chip
clock frequency, efficiency, the disk drive speed, disk drive utilization, and DRAM. The
following exercises explore the impact on power that different design decisions and/or use
scenarios have.
Table 2: Power consumption of several computer components.
Component Product
Performance Power
Type
Processor
Sun Niagara
1.2 GHz
72-79W peak
Intel pentium 4
2 GHz
48.9-66W
DRAM
Kingston X64C3AD2 1GB 184-pin
3.7W
Kingston D2N3 1 GB
240-pin
2.3W
Hard drive
DiamondMax 16
5400 rpm
7W read/seek, 2.9W idle
DiamondMax Plus 9
7200 rpm
7.9W read/seek, 4W idle
2.1. Table 2 presents the power consumption of several computer system components.
In this exercise, we will explore how the hard disc affects power consumption for the
system and how to calculate the MTTF.
a) Assuming the maximum load for each component, and a power supply efficiency of
70%, what wattage must the servers power supply deliver to a system with a Sun
Niagara 8-core chip, 2 GB 184-pin Kingston DRAM, and two 7200 rpm hard drives?
b) How much power will the 7200 rpm disk drive consume if it is idle roughly 40% of
the time?
c) In a single rack, the MTTF of each processor is 4500 hours, of the hard drive is 9
million hours, and of the power supply is 30000 hours. For a rack with 8 processors,
what is the MTTF for the rack.
2.2. Your companys internal studies show that a single-core system is sufficient for the
demand on your processing power. You are exploring, however, whether you could save
power by using two cores.
a) Assume your application is 100% parallelizable. By how much could you decrease
the frequency and get the same performance.
b) Assume that the voltage may be decreased linearly with the frequency. Using the
equation P owerdynamic = 1/2 Capacity load V oltage2 F requency switches,
how much dynamic power would the dual-core system require as compared to the
single-core system.
Coordinator: Dipl.-Ing. Philpp Mahr (Dipl.-Inf. Benajmin Andres)

c) Now assume the voltage may not decrease below 30% of the original voltage (minimum 70%of the original voltage). This voltage is referred to as the voltage floor,
and any voltage lower than that will lose the state. What percent of parallelization
gives you a voltage at the voltage floor.
d) Using the equation for the dynamic power P owerdynamic , how much dynamic power
would the dual-core system require from part a) compared to the single-core system
when taking into account the voltage floor.

Part 3. Home Work - Chip Fabrication Cost [8 pt.]

3.1. Table 1 gives the relevant chip statistics that influence the cost of several current
chips. In the next few exercises, you will be exploring the effects of different possible
design decisions for the IBM Power5.
a) What is the yield for the IBM Power5? [1 pt.]
b) Why does the IBM Power5 have a lower defect rate than the AMD Opteron and
the Sun Niagara? [1 pt.]
3.2.
It costs $1 billion to build a new fabrication facility. You will be selling a range
of chips from the factory, and you need to decide how much capacity to dedicate to each
chip. Your Woods chip will be 150 mm2 and will make a profit of $20 per defect-free
chip. Your Markon chip will be 250 mm2 and will make a profit of $25 per defect-free
chip. Your fabrication facility will be identical to that for the Power5. Each wafer has a
300 mm diameter. Assume that the W af er yield = 1 and = 4.
a) How much profit do you make on each wafer of Woods chip? [2 pt.]
b) How much profit do you make on each wafer of Markon chip? [1 pt.]
c) Which chip should you produce in this facility? [1 pt.]
d) If your demand is 50,000 Woods chips per month and 25,000 Markon chips per
month, and your facility can fabricate 150 wafers a month, how many wafers should
you make of each chip to maximize the profit, without taking into account the yield?
[2 pt.]

Part 4. Home Work - Power Consumption in Computer Systems [16 pt.]

4.1. Table 2 presents the power consumption of several computer system components.
In this exercise, we will explore how the hard drive affects power consumption for the
system.

Coordinator: Dipl.-Ing. Philpp Mahr (Dipl.-Inf. Benajmin Andres)

a) Assuming the maximum load for each component, and a power supply efficiency
of 80%, what wattage must the servers power supply deliver to a system with an
Intel Pentium 4 chip, 2 GB 240-pin Kingston DRAM, and one 7200 rpm hard drive?
[2 pt.]
b) How much power will the 7200 rpm disk drive consume if it is idle roughly 60% of
the time? [1 pt.]
c) Given that the time to read data of a 7200 rpm disk drive will be roughly 75% of a
5400 rpm disk, at what idle time of the 7200 rpm disk will the power consumption
be equal, on average, for the two disks? [2 pt.]
Hint: Describe a system of equations. Take into account the idle time and read/seek
time in a time frame.
4.2. Your companys internal studies show that a single-core system is sufficient for the
demand on your processing power. You are exploring, however, whether you could save
power by using two cores (on one die).
a) Assume your application is 80% parallelizable. By how much could you decrease
the frequency and get the same performance? [2 pt.]
b) Assume that the voltage may be decreased linearly with the frequency. Using the
equation P owerdynamic , how much dynamic power would the dual-core system require as compared to the single-core system? [2 pt.]
c) Now assume the voltage may not decrease below 25% of the original voltage. This
voltage is referred to as the voltage floor, and any voltage lower than that will lose
the state. What percent of parallelization gives you a voltage at the voltage floor?
[2 pt.]
d) Using the equation P owerdynamic , how much dynamic power would the dual-core
system require as compared to the single-core system when taking into account the
voltage floor? [2 pt.]
4.3. Your company has just bought a new dual Pentium processor, and you have been
tasked with optimizing your software for this processor. You will run two applications
on this dual Pentium, but the resource requirements are not equal. The first application
needs 75% of the resources, and the other only 25% of the resources
a) Given that 60% of the first application is parallelizable, how much speedup would
you achieve with that application if run in isolation? [1 pt.]
b) Given that 95% of the second application is parallelizable, how much speedup would
this application observe if run in isolation? [1 pt.]
c) Given that 60% of the first application is parallelizable, how much overall system
speedup would you observe if you parallelized it, but not the second application?
[1 pt.]
Your solutions need to be traceable!
Coordinator: Dipl.-Ing. Philpp Mahr (Dipl.-Inf. Benajmin Andres)

Die yield:


Def ects per unit area Die area
Die yield = W af er yield 1 +

(1)

Dies per wafer:

Dies per waf er =

( W aver diameter
)2 W aver diameter
2

Die area
2 Die area

Cost per die:

Cost per die =

W af er Cost
Dies per waf er Die yield

Mean Time To Failure:

MT T F =

1
F ailure rate

(2)

(3)

(4)

Amdahls Law:
Speedupoverall =

1
(1 F ractionenhanced ) +

F ractionenhanced
Speedupenhanced

(5)

F ractionenhanced is the enhanced fraction of the application and Speedupenhanced is the

amount of speedup of the enhanced fraction.

Coordinator: Dipl.-Ing. Philpp Mahr (Dipl.-Inf. Benajmin Andres)