Solid-Slate

Electronics,

1974. Vol.

17, pp.

1059-1063.

Pergamon

Press.

Printed

in Great

Britain

SIMPLE THEORY
TO PREDICT
THRESHOLD
VOLTAGE
OF
SHORT-CHANNEL
IGFETs
L. D.
Bell Laboratories,

Murray

(Received 2 January

THE

YAU

Hill, New Jersey

07974, U.S.A.

1974; in revised form 3 April 1974)

Abstract-A
simple expression
for the threshold
voltage of an IGFET is derived from a charge
conservation
principle
which geometrically
takes into account
two-dimensional
edge effects. The
expression
is derived for zero drain voltage and is valid for short and long-channel
lengths. The
dependence
of the threshold voltage on the source and drain diffusion depth, r,, and channel length, L,
voltage equation
reduces
to the familiar
is explicitly given. In the limit, L/r, -co, the threshold
expression
for the long-channel
case.
The theory is compared
with the measured
threshold
voltages on IGFETs fabricated
with 1.4, 3.8
and 7.4 pm channel lengths. The dependence
of the threshold
voltage under backgate bias voltages
ranging from zero to breakdown
agrees closely with the theory.

NOTATION
free space permitivity
bulk Fermi level = kT/q In ND/n,, where k is the
Boltzmanns
constant.
T, absolute temperature,
n,,
intrinsic carrier concentration
semiconductor
surface potential with respect to the
substrate
oxide capacitance
per cm*
oxide dielectric
constant
semiconductor
dielectron
constant
channel length (distance along the surface between
the junction defining the source and drain)
narrower
base of the trapezoid
bulk doping
electronic
charge
bulk charge, C/cm*
junction
depth
threshold
voltage
backgate
bias voltage
backgate
bias voltage at the onset of L = 0
flatband voltage
depletion
width under the center of the gate
depletion
width at the onset of L = 0
charge in the metal gate, C/cm*
free carrier concentration
in the channel, C/cm*
fixed charge in the oxide, C/cm*
1. INTRODUCTION

Current
progress
in both
photolithography
and
electron lithography
coupled with the self-aligned
gate technology
has led to the fabrication
of
IGFETs
with shorter
channel
lengths.
As the
distance between the source and drain decreases,
the influence
of the source
and drain on the
electrostatic
potential
distribution
under the gate

increases.
In contrast to the long-channel
theory, a
large fraction of the field lines from the bulk charge
under the gate are terminated
on the source and
drain islands,
causing
the threshold
voltage to
decrease
as the channel
becomes
shorter.
To
predict
the threshold
voltage
of short-channel
IGFETs,
Cheney
and Kotch[l]
modified
the
threshold
voltage expression
in the case of large
substrate bias by including the effect of the depth of
the source and drain diffusion. This resulted in a
correction
at high backgate bias. To include the
short-channel
effect for low backgate bias Leer21
refined the model of Cheney and Ketch, and after a
lengthy
piecewise
one-dimensional
analysis,
he
obtained
a close-form
expression
which is very
complicated.
His theory and experiments
appear to
agree much better than that of Cheney and Ketch.
In this report, a very simple model is presented
which uses a simple geometrical
approximation
in
conjunction
with charge conservation
analysis. The
result of the analysis
gives a threshoid
voltage
expression
which has the advantage
of a simple
form and at the same time retains the physical
insight of the original charge conservation.
The
theory is compared with experiment
and excellent
agreement
is obtained.

1059

2. MODEL AND ANALYSIS

In the long-channel
model, the threshold voltage
of an IGFET is simply obtained by applying the
charge
conservation
principle
to the
region

L. D.

1060

bounded
by
semiconductor.

the metal gate and

This may be written

bulk
as

of

the

YAU

is
W = ,/[2K,c,JqNo

Qw+Qo+Qs+~s=~

where QM is the charge in the metal gate, QI,

includes the fixed charge in the SiO:, Qs is the
charge due to the free carrier concentration
at the
semiconductor
surface, and QB is the fixed charge
due to the ionized impurity in the depletion region.
For a P-channel
IGFET,
equation
(I) may be
expressed
in terms of voltages as[3-S]
V, = VFB - cbs - QslC,,,

(24, + VB,)]

(3)

(1)

(2)

where Vc is the gate voltage, VFB is the flatband

voltage, & is the surface potential with respect to
the substrate,
and CoX is the oxide
intrinsic
capacitance
per cm. Byusing the commonly used
criterion for turn-on [3-51, (i.e., & = 2&, where &
is the bulk Fermi level), the expression
for the
threshold
voltage is

assuming
a uniform
N-type
substrate.
Without
going through a two-dimensional
analysis, the field
lines arising from the bulk charge can be intuitively
approximated
as drawn in Fig. 1. The field lines
originating
from the fixed charges
inside
the
trapezoidal
region are terminated
within the channel length L, whereas the field lines from the fixed
charge outside the trapezoidal
region are terminated in the p + islands. Based on this geometrical
approximation,
the total bulk charge inside the
trapezoid
is
QAL = qi%W(y)&
Thus Qh is the average
channel
of length
I,
trigonometric
analysis,

(4)

charge per unit area in a

and by straightforward

(2a)
Equation (2a) is valid as long as the channel length
of the IGFET is long compared
to the junction
depth of the source and drain. The effect of the bulk
(2a) is to increase
the
charge
QB in equation
magnitude of the threshold
voltage. In the case of
short-channel
IGFETs, the full effect of QB on the
threshold
voltage is decreased
because near either
end of the channel,
some of the field lines
originating from the bulk charge are terminated
in
the
p+ islands.
Therefore,
in short-channel
IGFETs,
Vr is lower than what is predicted
by
equation (2a).
In the following
analysis,
to obtain a simple
expression
for the threshold
voltage,
only the
edge-effects
of Qs is taken into account. This is
justified
because
in equation
(2a). the flatband
voltage
V,,
is determined
by
the
metalsemiconductor
work function
difference
and the
fixed charge
in the oxide,
and is therefore
a
constant under the channel region; the variation of
the surface potential at turn-on would also be small
compared to & because once the surface potential
is inverted to 2&, it will practically
lock at this
potential.
To include the source and drain junction depth in
the expression
for VT, we assume a cylindrical edge
with a radius, r,, equal to the depth of the p _ islands
as shown in Fig. 1. Directly under the middle of the
gate, the width of the bulk space charge at turn-on

The trapezoidal
bulk charge causes a nonuniform
surface potential along the channel. This makes it
impossible to define uniquely a surface potential for
the threshold voltage. To circumvent
this difficulty,
we make an arbitrary smoothing
approximation
that the effect of Qh on the surface potential
is
uniform along the channel at turn-on, and therefore

k
SlO2
I

METAL

I
Fig. 1. Model to calculate

the threshold

voltage.

Threshold voltage of IGFETs

equation

1061

(2) becomes

(6)
As we will see below, this equation gives a good
prediction
of VT for IGFETs with channel lengths
from 1.4 to 7.4 pm.
Equation
(6) has the same form and physical
interpretation
as equation
(2a) in which QB is
replaced
by an effective
charge, QL. The charge
conservation
principle
is applied in a lumped
manner, to the region which includes the gate, the
intervening
oxide and the bulk charge inside the
trapezoid.
This
idea
could
be extended
to
nonuniform
bulk charge by numerically
integrating
Qh in the trapezoid.
In the derivation
of equation
(6) the fringing field around the edges of the metal
gate is ignored because the metal-gate
overlap with
the source and drain is normally larger than the
oxide thickness.
For IGFETs under zero backgate bias, equation
(6) is applicable
to all practical doping levels and
channel lengths. However,
under sufficiently large
backgate
bias, the trapezoid
will approach
a
triangular
shape as L+O.
Under this condition
equation (5) can be solved for W, and at the onset
of L=O,

W(L'+O)=&

Ln++
1=

(7)

Equations
(3) and (7) can be used to solve for
V& = Vsc(L +O) at this onset condition.
The
following asymptotic
limits may be deduced from
equation (7):
W+m

for

v,=O

(8)

for

r, = a.

(9)

and
W+$

In the case of equation (8), the diffused region is

infinitesimally
thin, thus the field lines from the
bulk are parallel, and they intersect
the semiconductor surface uniformly at right angles. Therefore
for thin gate-oxide
and r, = 0, the source and drain
junctions will have no two-dimensional
edge-effect
on the threshold voltage provided no d.c. voltage is
applied between the source and drain. In equation
(9), the diffused region forms an infinite wall, and as
L + 0, the two slant sides of the trapezoid intersect
to enclose the effective bulk charge QL inside a 45
triangle as illustrated
in Fig. 2. A problem arises

++

++

n-SUBSTRATE
++

Fig. 2. IGFET with infinite junction

illustrating

when the backgate

condition in equation

the

depth,
model of Fig. 1 as L + 0.

bias exceeds
(7), or

the

limiting

where equation
(6) no longer applies. For longchannel
IGFETs
this point is seldom reached
before pn junction breakdown.
For short channel
IGFETs the backgate bias will help to suppress
punch-through
at L -+ 0, and Vsc > Vk does not
imply punch-through
[2]. Therefore
it is legitimate
to project what model one might use beyond this
point. From geometrical
considerations,
we can
project the triangular area enclosed by QL as equal
to WL/2 for W > W. Geometrically
this appears
to be somewhat
higher than the upper limit of Qh.
The lower limit is to assume that QA saturates for
W > W as can be envisioned
for ri = 50 in Fig. 2.
Therefore for an arbitrary r, and L, QB in equation
(2) is replaced by QB(u, where (Y is bounded by the
two limits above. This gives
Qh = qNWa,

W > W

(10)

where W/2 W < a < l/2. Note that if the upper

limit is used, i.e. CK= l/2, one could still expect an
apparent
substrate
doping four-times
lower than
the actual substrate doping. The 4-fold reduction in
the apparent substrate doping comes from the fact
that W a l/d(ND),
hence ND x l/a.
Experimentally,
the slopes of VT vs d/(21$~+
vBc) curves appear constant for VBG> V&. To fit

1062

L. D.

the data analytically

beyond
V& by assuming
dVr/d[v(2&
+ V,C)] = constant,
equation
(6)
(after some algebra) becomes

V,,-g.-~[w'+2a'(W-W')1

VT=

(11)

01

where
1

(12)

(y = 4(1+ 2r,/L)

W and W are given by equations

(3) and (7),
respectively.
Note that 01 in equation (12) varies
from 0 to I/4. In section
4 where
theory
is
compared with experiment
in the region Ve, > Vkc,
equation (11) is used.
3. THEORETICAL

CURVES

Although equation (6) is relatively simple to use,

a few curves are plotted to demonstrate
explicitly
the threshold
voltage dependence
on the junction
depth, channel length, substrate doping and backgate bias. The dependence
on the oxide thickness is
simple and explicit in equation (6), and therefore no
illustration
is given on the oxide thickness
dependence.
Figure 3 shows the effect of the junction depth on
(V, - VFR( for varying channel length. 1VT - VFB/ is
used as the ordinate
for the theoretical
curves
because the constant,
VFB, depends on the type of
metal gate used and the processing
procedure.
A
backgate bias of 5.0 V is used. As L + 00, all the

01

1
2

I
3

1
4

1
5

I
6

L (mIcronsI

Fig.

4. Theoretical
threshold
voltage
as a function
channel length for various substrate dopings.

of

O-

15.

THEORY

,OEXPERIMENT

,5-

L=74pm

c 04

L=38pm

? 0 4

L=l.4pm

+_ 02

O-

5-

O-

5-

o-

ot
0

50
2

L(microns1

Fig. 3. Theoretical
curves of the threshold
voltage as a
function of channel length, for various junction depths.

Fig. 5. Comparison
of theory and experiment.
(T = 297K,
T,, = 520 A, r, = 0.5 pm,
N, = 1.6 x lOI cm-,
V,, =
0.30 V).

Threshold voltage of IGFETs

curves approach the rj = 0 line as expected. Figure
4 illustrates the effect of the substrate doping on the
threshold voltage for ri = 0.5 pm. Again a backgate
bias is used to increase
the short-channel
effect.
The theoretical
curves in Fig. 5 illustrate the effect
of the backgate
bias on ] VT - VFsl for various
channel
lengths.
This type of plot has been
popularly
used to calculate
the substrate
doping
density[6].
It is clear from this figure that the
doping density obtained from the slope of the VT vs
d(VBG)
is no longer correct
for short channel
lengths.
4. COMPARISON

WITH EXPERIMENTS

The experimental
threshold voltages were measured by a linear extrapolation
of the channel
conductance
in a plot of the conductance
vs VG [S].
This was carried out by using a 10 mV a.c. signal
across the source and drain which were at zero d.c.
potential.
The channel
conductance
was plotted
against
Vc
using
an x-y
recorder,
and the
threshold voltage was determined
by extrapolating
the linear region of the plot to the zero drain
conductance
point.
The devices used in this experimental
comparison were IGFETs on the same chip processed with
electron beam lithography.
Self-aligned
tungstengate technology
was used to define the gates. The
source and drain were implanted with 5 x lO/cm
boron ions at 50 keV. From the IGFET processing
program of Poon[7], the final junction depth was
calculated to be 0.5 pm. The actual channel length
is determined
by the geometric
length minus the
effect of source and drain diffusion under the gate.
Probable
errors
in the channel
lengths
are +0.2 pm for the 1.4 pm gate and i 0.4 pm for the
3.8 pm and the 7.4 Frn gates. The bulk doping,
oxide thickness
and the flatband
voltage
were
measured
with the aid of large MOS capacitor
(MOSC) pads on the same chip.
The theoretical
curves in Fig. 5 were drawn
according
to equation (6) using the independently
measured MOSC data for No, VFB and T,,. For the
1.4 pm channel length, the range of validity of
equation
(6) is only up to 16.3 V. Beyond
this
voltage,
equation
(11) was used to extend
the

1063

theoretical
curve. The discrepancy
between
the
experimental
points and the theoretical
curves is
within the error bounds due to the indeterminacy
of
the actual active channel
length, L. The error
bounds in L are given in Fig. 5. Secondly,
the
flatband voltage variations from device to device is
not taken into account. C-V measurements
on the
large MOSC pads on the same wafer varied by
approximately
kO.05 V. Thirdly, in view of the
imperfect
geometrical
approximation
in deriving
equation
(6), perfect
agreement
is not to be
expected. On the other hand, it should be noted that
the backgate bias dependence
of VT is a sensitive
test for the theory,
and it is evident
that the
agreement between theory and experiment
is close.
5.

CONCLUSION

A simple expression
for the threshold voltage is
derived
from the charge conservation
principle
which geometrically
includes the two-dimensional
edge effects. The model takes into account
the
source and drain junction depth, channel length,
and substrate doping which are shown to substantially affect
the threshold
voltage.
The final
expression
is valid for short channel as well as long
channel IGFETs. A comparison
of the theory with
experiments
on various
short channel
IGFETs
shows a good agreement.
Acknowledgements-The
author would like to thank L. R.
Thibault for the measurements. The discussions with H.
C. Poon, and the use of his IMPFET program were very
helpful. He is grateful to R. C. Henderson for pointing out
this experimental phenomena to the authors attention,
and finally, to R. F. W. Pease for his continuous support.
REFERENCES
1.

2.
3.
4.

5.
6.
7.

G. T. Cheney and R. A. Ketch Proc. IEEE 56, 887

(1968).
H. S. Lee, ECS Semiconductor Silicon, p. 791 (1973).
C. T. Sah and H. C. Pao. IEEE Trans. Electron
Devices, ED-U, 393 (1966).
S. M. Sze, Physics of SemiconductoryDevices, chapter
10, Wiley, New York (1969).
A. S. Grove, Physics and Technology of Semiconductors Devices, chapter 9, Wiley, New York (1967).
R. H. Crawford, MOSFET in Circuit Design, p. 52,
McGraw-Hill, New York (1967).
H. C. Poon, private communication.