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Section 3

The document contains multiple questions and answers related to computer architecture and microprocessors. Some key points: - WR and RD signals are active low in 8085, not active high as stated in one question. - Each SRAM cell contains 4 MOS transistors, not additional capacitors. - The CALL and RET instructions in 8085 are useful for writing and using subroutines.

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0% found this document useful (0 votes)
167 views51 pages

Section 3

The document contains multiple questions and answers related to computer architecture and microprocessors. Some key points: - WR and RD signals are active low in 8085, not active high as stated in one question. - Each SRAM cell contains 4 MOS transistors, not additional capacitors. - The CALL and RET instructions in 8085 are useful for writing and using subroutines.

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harmony0015
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1. Assertion (A): In 8085 WR and RD signals are active high.

Reason (R): LOW WR means write operation and low RD means read operation.
A.Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is correct R is wrong
D.A is wrong R is correct
Answer & Explanation
Answer: Option D
Explanation:
WR and RD are active low.
4. Each cell of static RAM contains
A.4 MOS transistors
B. 4 MOS transistors and 1 capacitor
C. 2 MOS transistors
D.4 MOS transistors and 2 capacitors
Answer & Explanation
Answer: Option A
Explanation:
Each SRAM cell has 4 MOS transistors.
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5. Which group of instructions is used to change sequence of operations in a computer program?
A.Data transfer group
B. Branch group
C. Arithmetic group
D.Logic group
Answer & Explanation
Answer: Option B
Explanation:
No answer description available for this question. Let us discuss.
6. In 8085, which instructions are useful for writing and using subroutines?
A.CALL
B. RET
C. CALL and RET
D.none of the above

Answer & Explanation


Answer: Option C
Explanation:
No answer description available for this question. Let us discuss.
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7. In a RAM chip with a total of 8096 words, the word addresses range from
A.1 to 8096
B. 0 to 8095
C. 1 to 8095
D.0 to 8096
Answer & Explanation
Answer: Option B
Explanation:
The starting word address is 0.

The memory segment registers in 8086 are denoted by


A.AS, BS, CS, DS
B. BS, CS, SS, ES
C. CS, DS, SS, ES
D.DS, ES, FS, SS
Answer & Explanation
Answer: Option C
Explanation:
No answer description available for this question. Let us discuss.

In 8085 eight address and data buses are multiplexed.


A.True
B.False
Answer & Explanation
Answer: Option A
Which is not a software?
A.DOS
B. Windows
C. MS WORD
D.Hard disk
Answer & Explanation

Answer: Option D
21. The signal in 8086 are in minimum mode when
A.MN / Mx pin is tied to Vcc
B. MN / Mx pin is grounded
C. MN / MX pin is left open
D.none of the above
Answer & Explanation
Answer: Option A
26. The number of logic or arithmetic operations with ALU 1C 74181 can carry out is
A.4
B. 8
C. 16
D.32
Answer & Explanation
Answer: Option C
Explanation:
No answer description available for this question. Let us discuss.
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27. 6 bytes means
A.6 bits
B. 24 bits
C. 48 bits
D.96 bits
Answer & Explanation
Answer: Option C

A microprocessor can understand instruction written in


A.machine language only
B. mnemonics operation codes only
C. high language only
D.both machine language and mnemonics operation codes
Answer & Explanation
Answer: Option A
46. The instruction MVI A, 20 in 8085 means
A.contents of memory location 20 are brought into the accumulator

B. the value 20 is brought into accumulator


C. either (a) or (b)
D.neither (a) nor (b)
Answer & Explanation
Answer: Option B
2. If 8085 is required to add two 32 bit numbers, the numbers of addition sequences is
A.1
B. 2
C. 4
D.8
Answer & Explanation
Answer: Option C
Explanation:
No answer description available for this question. Let us discuss.
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3. Incompatibility between memory and I/O device may be due to
A.timing according to which data transfer is to take place
B. electrical characteristics of the two devices
C. format of data transfer
D.all of the above
Answer & Explanation
Answer: Option D
4. When the mains supply is switched off the contents of primary computer memory are lost.
A.True
B.False
Answer & Explanation
Answer: Option A
Explanation:
No answer description available for this question. Let us discuss.
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5. 8255 A is a
A.programmable peripheral interface
B. I/O device
C. memory chip
D.none of the above
Answer & Explanation

Answer: Option A
7. ALE stands for
A.Address Latch Enable
B. Accumulator Latch Enter
C. Address Latch Enter
D.Accumulator Latch Enable
Answer & Explanation
Answer: Option A
13. Assertion (A): If contents of F register in 8085 are 01010001, it means S = 0, Z = 1, AC= 1,
P = 0 and CY = 1.
Reason (R): When an instruction is called from memory, the op. code of instruction is stored
in instruction register.
A.Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is correct R is wrong
D.A is wrong R is correct
Answer & Explanation
Answer: Option B
Explanation:
No answer description available for this question. Let us discuss.
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14. The combination of registers in 8085 is B-C, D-E, H-L only.
A.True
B.False
Answer & Explanation
Answer: Option A
Explanation:
No answer description available for this question. Let us discuss.
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15. An instruction used to set cany flag in a computer is classified as
A.data transfer

B. arithmetic
C. logical
D.program control
Answer & Explanation
Answer: Option B
Explanation:

18. In 8086 the instruction ADD AL, CH means


A.the two 8 bit values in registers AL and CH are added and result placed in register AL
B. the two 8 bit values in registers AL and CH are added and result placed in register CH
C. the two 16 bit values in registers AL and CH are added and result placed in register AL
D.the two 16 bit values in registers AL and CH are added and result placed in register CH
Answer & Explanation
Answer: Option A
Explanation:
No answer description available for this question. Let us discuss.
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19. Almost all high level languages have provision for logical operations.
A.True
B.False
Answer & Explanation
Answer: Option A
Explanation:
No answer description available for this question. Let us discuss.
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20. In which of the following 8085 instructions is the CY flag complemented?
A.CMA
B. CMC
C. STC
D.RRC
Answer & Explanation
Answer: Option B

21. Consider the following mnemonics


1. MOV
2. ADD
3. LXI
Which of the above are valid for 8085?
A.1 and 2 only
B. 1 only
C. 1, 2 and 3
D.1 and 3 only
Answer & Explanation
Answer: Option C
25. Which of the following is also called handshaking programmed data transfer?
A.Synchronous transfer
B. Asynchronous transfer
C. Interrupt driver transfer
D.Both (a) and (c)
Answer & Explanation
Answer: Option B
28. In EPROM integrated dose is defined as
A.UV light intensity x exposure time in seconds
B. UV light intensity / exposure time in seconds
C. exposure time in seconds / UV light intensity
D.none of the above
Answer & Explanation
Answer: Option A
Explanation:
No answer description available for this question. Let us discuss.
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29. MS outlook is a software for DTP.
A.True
Answer & Explanation

B.False

Answer: Option B
Explanation:
No answer description available for this question. Let us discuss.
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30. In 8086 a word OA 50 FH is stored in 02 and 03 memory locations. Then
A.OFH is stored at location 02 and 0 A 5 at location 03 and address of word is 02
B. OFH is stored at location 03 and 0 A 5 at location 02 and address of word in 02
C. OFH is stored at location 02 and 0 A 5 at location 03 and address of word is 03
D.OFH is stored at location 03 and 0 A 5 at location 02 and address of word is 03
Answer & Explanation
Answer: Option A
Explanation:
31. Cache memory size is about
A.a few KB
B. about 500 KB
C. about 1 MB
D.about 50 MB
Answer & Explanation
Answer: Option A
37. Assertion (A): C has 32 keywords like auto, if, do, float etc.
Reason (R): Key words can not be used as variable names in C.
A.Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is correct R is wrong
D.A is wrong R is correct
Answer & Explanation
Answer: Option B
Explanation:
No answer description available for this question. Let us discuss.
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38. Consider the following statements


1.
2.
3.
4.

A total of about 1 million bytes can be directly accessed by 8086 microprocessor.


The 8086 has thirteen 16 bit registers.
The 8086 has eight flags.
Compared to 8086, the 80286 provides a higher degree of memory protection.

Of the above statements


A.1, 2, 3, 4 are correct
B. 1, 3, 4 are correct
C. 1, 2, 4 are correct
D.1, 2, 3 are correct
Answer & Explanation
Answer: Option C
Explanation:
No answer description available for this question. Let us discuss.
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39. Consider the following program for 8085
MVIA, 00H
MVIA, 53H
CMA

The contents of accumulator at the end of this program will be


A.OACH
B. 53 H
C. OADH
D.54 H
Answer & Explanation
Answer: Option A
49. An 8 bit wide 4 word sequential memory has
A.Eight 4 bit shift registers
B. Eight 8 bit shift registers
C. Four 8 bit shift registers
D.Foui 4 bit shift registers
Answer & Explanation
Answer: Option A

1. Assertion (A): A PROM is a user programmable ROM.


Reason (R): After programming PROM behaves like ROM.
A.Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is correct R is wrong
D.A is wrong R is correct
Answer & Explanation
Answer: Option B
4. Read the following statements as regards register pairs in microprocessor 8085
1. B represents B, C pair with B as high order register and C as low order register.
2. D represents D, E pair with D as high order register and E as low order register.
3. H represents H, L pair with H as high order register and L as low order register.
Which of the above statements are correct?
A.All
B. 1 and 3
C. 1 and 2
D.2 and 3 only
Answer & Explanation
Answer: Option A
Explanation:
No answer description available for this question. Let us discuss.
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5. The 8085 instruction 'PUSH PSW' belongs to the group
A.data transfer
B. arithmetic
C. logic
D.none of the above
Answer & Explanation
Answer: Option D
7. In IC 74181 a sum greater than 15 leads to low carry out.
A.True
B.False

Answer & Explanation


Answer: Option A
Explanation:
No answer description available for this question. Let us discuss.
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8. Assertion (A): In 8085, the zero flag is set when ALU operation results in 0. If the result is
not 0, this flag is reset.
Reason (R): In 8085 the S flag is set when the contents of accumulator become negative
during execution of an instruction.
A.Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is correct R is wrong
D.A is wrong R is correct
Answer & Explanation
Answer: Option D
11. The number of primitive string operations in 8086 is
A.3
B. 4
C. 5
D.6
Answer & Explanation
Answer: Option C
13. Which of these are 16 bit microprocessors?
A.80286
C. Z8000
Answer & Explanation

B. MC68000
D.All

Answer: Option D
18. Programs like compilers, assemblers etc. are stored in a mircocomputer in
A.registers
B. cache memory
C. primary memory
D.mass storage
Answer & Explanation

Answer: Option A
20. The number of registers and flags in 8086 are
A.13 and 5 respectively
B. 9 and 5 respectively
C. 13 and 9 respectively
D.9 and 9 respectively
Answer & Explanation
Answer: Option C
21. ALU 1C 74181 can accept two words each having
A.2 bits
B. 4 bits
C. 8 bits
D.16 bits
Answer & Explanation
Answer: Option B
23. The instruction MOV M, r in 8085
causes content of register r to be moved to memory location whose address is in register H,
A.
L and uses register indirect addressing mode
causes the content of memory location whose address is in register H, L to move to register
B.
r and uses register indirect addressing mode
causes the content of register r to be moved to memory location whose address is in
C.
register H, L and uses immediate addressing mode
causes the content of memory location whose address is in register H, L to move to register
D.
r and uses immediate addressing mode
Answer & Explanation
Answer: Option A
26. Consider the following program for 8085
MOV A, D
RAL
MOV D, A

If initial contents of register D is decimal number 20, the final content of register D is
A.decimal 20
B. decimal 40
C. decimal 10

D.none of the above


Answer & Explanation
Answer: Option B
29. Assertion (A): In 8085 when RESET OUT goes low processing begins.
Reason (R): CPU remains reset till RESET IN signal goes high.
A.Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is correct R is wrong
D.A is wrong R is correct
Answer & Explanation
Answer: Option B
Explanation:
No answer description available for this question. Let us discuss.
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30. In microprocessor 8088
A.8 data bits are multiplexed with 8 least significant bits of address bus
B. 8 data bits are multiplexed with 8 most significant bits of address bus
C. 16 data bits are multiplexed with 16 bits of address bus
D.none of the above
Answer & Explanation
Answer: Option A
31. In 8085
A.RST 6.5 and RST 5.5 are high level sensitive interrupts
B. RST 6.5 and RST 5.5 are low level sensitive interrupts
C. RST 5.5 is low level sensitive interrupt but RST 5.5 is high level-sensitive interrupt
D.RST 5.5 is low level sensitive interrupt but RST 6.5 is high level sensitive interrupt
Answer & Explanation
Answer: Option A
Explanation:
No answer description available for this question. Let us discuss.
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32. Assertion (A): Microprocessor 8085 has an 8 bit register called accumulator which stores
intermediate answers during a computer operation.
Reason (R): Accumulator can send or receive data.
A.Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is correct R is wrong
D.A is wrong R is correct
Answer & Explanation
Answer: Option B
Explanation:
No answer description available for this question. Let us discuss.
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33. Assertion (A): Interfacing means synchronisation of digital information transmission
between input output devices and computer.
Reason (R): A computer with higher bit word size executes programs at a faster rate.
A.Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is correct R is wrong
D.A is wrong R is correct
Answer & Explanation
Answer: Option B
Explanation:
No answer description available for this question. Let us discuss.
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34. IC 74181 is a 4 bit device.
A.True
Answer & Explanation

B.False

Answer: Option A
36. Which of the following buses does not exist in 8085?
A.Data bus

B. Address bus
C. Control bus
D.Exchange bus
Answer & Explanation
Answer: Option D
38. Assertion (A): A higher level language is less efficient that machine language but more
efficient than assembly language.
Reason (R): It is easier to learn and use higher level language than machine language.
A.Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is correct R is wrong
D.A is wrong R is correct
Answer & Explanation
Answer: Option D
Explanation:
No answer description available for this question. Let us discuss.
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39. The accumulator drives the ALU.
A.True
Answer & Explanation

B.False

Answer: Option A
Explanation:
No answer description available for this question. Let us discuss.
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40. System bus is the communication channel between microprocessor and peripherals.
A.True
B.False
Answer & Explanation
Answer: Option A
41. Assertion (A): A dynamic RAM chip has much smaller cell than a static RAM chip.

Reason (R): In dynamic RAM one bit of information is stored as the charge on a capacitor.
A.Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is correct R is wrong
D.A is wrong R is correct
Answer & Explanation
Answer: Option A
Explanation:
No answer description available for this question. Let us discuss.
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42. Which of the following produces very wide drifts in clock frequency?
A.Crystal
B. RC circuit
C. LC resonant circuit
D.Crystal and RC circuit
Answer & Explanation
Answer: Option B
Explanation:
44. Read the following statements:
A. A P generally interfaced to several memory chips and I/O devices
B. Address space provided by P is partitioned into sub sets of addresses
C. Address map and address partition refer to different terms in address space
Which of the above are correct?
A.All
B. 1 and 2 only
C. 2 and 3 only
D.1, 3 only
Answer & Explanation
Answer: Option B
Explanation:
No answer description available for this question. Let us discuss.

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45. The register set and instruction set of 8088 is similar to that of
A.8085
B. 8086
C. partly 8085 and partly 8086
D.none of the above
Answer & Explanation
Answer: Option B
46. Assertion (A): In direct addressing the address of operand is specified in the instruction.
Reason (R): Direct addressing is also called absolute addressing.
A.Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is correct R is wrong
D.A is wrong R is correct
Answer & Explanation
Answer: Option B
49. The storage capacity of DSDD disk and DSHD disk are
A.1.2 MB each
B. 360 KB each
C. 1.2 MB and 360 KB respectively
D.360 KB and 1.2 MB respectively
Answer & Explanation
Answer: Option D
Explanation:
No answer description available for this question. Let us discuss.
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50. Which of the following is also called Non volatile RAM?
A.Shadow RAM
B. UVEPROM
C. EEPROM
D.Both (b) and (c)
Answer & Explanation
Answer: Option A

1. In a microprocessor the clock signal


A.is always generated internally
B. is always supplied externally
C. may be generated internally or supplied externally
D.is mostly supplied externally
Answer & Explanation
Answer: Option C
3. Computers 'Basic input output system' is generally stored in RAM chips.
A.True
B.False
Answer & Explanation
Answer: Option A
Explanation:
No answer description available for this question. Let us discuss.
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4. In 8085
A.the upper 8 address bits appear on address bus and lower 8 bits on address data bus
the lower 8 address bits appear on address bus and the upper 8 address bits appear on
B.
address data bus
C. either upper or lower 8 address bits may appear at address bus
D.either upper or lower 8 address bits may appear at address data bus
Answer & Explanation
Answer: Option A
6. The number of select lines in ALU 1C 74181 is
A.2
B. 4
C. 8
D.16
Answer & Explanation
Answer: Option B
Explanation:
No answer description available for this question. Let us discuss.
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7. In a computer MPU is the centre of all operations and control.


A.True
B.False
Answer & Explanation
Answer: Option A
Explanation:
No answer description available for this question. Let us discuss.
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8. Assertion (A): A RAM with access time of the order of hundreds of nano seconds is suitable
for a control memory.
Reason (R): The time taken to execute an operation in a microcomputer is critically de
pendent on access time of control memory.
A.Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is correct R is wrong
D.A is wrong R is correct
Answer & Explanation
Answer: Option C
10. Which data transfer scheme is used when large block of data is to be transferred in a
computer?
A.DMA
B. Programmed data transfer
C. Either (a) or (b)
D.Neither (a) nor (b)
Answer & Explanation
Answer: Option A
13. Assertion (A): 1C 74181 is an ALU in TTL 7400 series.
Reason (R): 1C 74181 can accept two 4 bit words and can perform any one of possible 16
arithmetic or logic operations.
A.Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is correct R is wrong
D.A is wrong R is correct
Answer & Explanation

Answer: Option B
Explanation:
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14. The instruction LDA 20 in 8085 means
A.contents of memory location 20 are fetched into the accumulator
B. the value 20 is fetched into accumulator
C. either (a) or (b)
D.neither (a) nor (b)
Answer & Explanation
Answer: Option A
Explanation:
No answer description available for this question. Let us discuss.
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15. Intel 2004 is a
A.ROM
B. Volatile RAM
C. NV RAM
D.None of the above
Answer & Explanation
Answer: Option C
17. The 8085 instruction LDA FFA is an example of
A.Direct addressing
B. Register addressing
C. Immediate addressing
D.Register indirect addressing
Answer & Explanation
Answer: Option A
Explanation:

No answer description available for this question. Let us discuss.


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18. A mP contains 2 MHz crystal. The time taken to complete instructions with 1000 cycles is
A.2 ms
B. 1 ms
C. 2 nx
D.1 ns
Answer & Explanation
Answer: Option B
25. A blank EPROM has
A.all bits set to logical 0
B. all bits set to logical 1
C. half the total number of bits set to 0 and remaining half to logical 1
D.either (a) or (b)
Answer & Explanation
Answer: Option B
22. In 8085, which of the following registers cannot be paired?
A.A
B. E
C. C
D.both (b) and (c)
Answer & Explanation
Answer: Option A
26. In 8085 the term 'absolute addressing' means
A.Direct addressing
B. Immediate addressing
C. Register addressing
D.Register indirect addressing
Answer & Explanation
Answer: Option A
30. Which of the following statements is written in plain English in 8085?
A.Data definition
B. Assignment

C. Conditional
D.Repetitive
Answer & Explanation
Answer: Option A
31. In 8085 microprocessor with memory mapped I/O which of the following is true?
A.I/O devices have 16 bit addresses
B. I/O devices are accessed during IN and OUT instructions
C. There can be a maximum of 256 input and 256 output devices
D.Logic operations can not be performed
Answer & Explanation
Answer: Option A
Explanation:
No answer description available for this question. Let us discuss.
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32. Which of the following 8 bit microprocessors has maximum addressing modes?
A.8085
B. Z 80
C. 6800
D.6809
Answer & Explanation
Answer: Option D
40. In 8085 stack pointer is
A.4 bit register
B. 8 bit register
C. 16 bit register
D.32 bit register
Answer & Explanation
Answer: Option C
41. Microprocessor 386SX is a 16/32 bit microprocessor. It has
A.16 bit registers and 32 bit data bus
B. 16 bit registers and 16 bit data bus
C. 32 bit registers and 32 bit data bus
D.32 bit register and 16 bit data bus

Answer & Explanation


Answer: Option D
Explanation:
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42. Assertion (A): An instruction cycle consists of fetch and execute cycles.
Reason (R): Fetch cycle has one machine cycle but execute cycle may have one or more
machine cycles depending on length of instruction.
A.Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is correct R is wrong
D.A is wrong R is correct
Answer & Explanation
Answer: Option B
Explanation:
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43. Instruction cycle is the time required to complete the execution of an instruction.
A.True
B.False
Answer & Explanation
Answer: Option A
45. In a microprocessor
A.one machine cycle is equal to one clock cycle
B. one clock cycle consists of several machine cycles
C. one machine cycle consists of several clock cycles
D.one machine cycle is always less than one clock cycle
Answer & Explanation
Answer: Option C
47. Machine cycle is always the same as instruction cycle.
A.True
B.False

Answer & Explanation


Answer: Option B
49. Which addressing mode is suitable only for these instructions in which there is only one
operand?
A.Implicit
B. Register
C. Direct
D.Immediate
Answer & Explanation
Answer: Option A
Explanation:
No answer description available for this question. Let us discuss.
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50. Assertion (A): Microprocesspr 8085 has six 8 bit registers B, C, D, E, H L.
Reason (R): B - C, D - E, H - L may be combined to form register pairs to hold 16 bits data.
A.Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is correct R is wrong
D.A is wrong R is correct
Answer & Explanation
Answer: Option B
3. An advantage of memory interlacing is that
A.a larger memory is obtained
B. effective speed of memory is increased
C. cost of memory is reduced
D.a non-volatile memory is obtained
Answer & Explanation
Answer: Option B
5. The signals in 8086 are classified into
A.minimum mode and maximum mode
B. decrement mode and increment mode
C. low mode and high mode
D.none of the above
Answer & Explanation

Answer: Option A
6. Consider the following statements about constants in 8085
1.
2.
3.
4.

The assembler treats 64 H as hexadecimal constant.


The assembler treats 154 as binary constant.
The assembler treats 540 as octal constant.
The assembler treats 138 as decimal constant.

Which of the above are correct?


A.1, 2 and 3 only
B. 1, 3 and 4 only
C. 1 and 3 only
D.2 and 4 only
Answer & Explanation
Answer: Option B
Explanation:
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7. Internally the two distinct units of 8086 are called
A.bus interface unit and execution unit
B. command unit and follow unit
C. master unit and slave unit
D.memory unit and operation unit
Answer & Explanation
Answer: Option A
9. The chip 8259 is a
A.programmable interrupt controller
B. programmable peripheral interface
C. I/O device
D.memory chip
Answer & Explanation
Answer: Option A
Explanation:

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10. A computer memory is an ordered sequence of storage cells.
A.True
B.False
Answer & Explanation
Answer: Option A
12. In 8085, which of the following is an 8 bit register?
A.A
B. SP
C. PC
D.both (a) and (b)
Answer & Explanation
Answer: Option A
Explanation:
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13. What does the instruction 'PCHL' in 8085 do?
A.Load the program counter with contents of register pair H L
B. Double the contents of register pair H L
C. Shift the contents of register pair H L by one bit to the right
D.Shift the contents of register pair H L by one bit to left
Answer & Explanation
Answer: Option A
14. In a multi-processor configuration two coprocessors are connected to host 8086 processor.
The instruction sets of the two coprocessors
A.must be same
B. may overlap
C. must be disjoint
D.must be the same as that of host
Answer & Explanation
Answer: Option D

18. Assertion (A): In microprocessor 8085 instruction LXIB, 90 FF H means register B and C
are loaded with upper and lower bytes to get B = 90 H and C = FFH.
Reason (R): In 8085 the stack pointer indicates which memory location is to accessed.
A.Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is correct R is wrong
D.A is wrong R is correct
Answer & Explanation
Answer: Option B
Explanation:
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19. To add 8 bit words, two IC 74181 can be cascaded.
A.True
B.False
Answer & Explanation
Answer: Option A
1. A microprocessor needs memory chips and input-output chip to form a microcomputer.
A.True
B.False
Answer & Explanation
Answer: Option A
24. In 8086 the word address is
A.the address of the least significant byte
B. the address of most significant byte
C. either (a) or (b) depending on the word
D.neither (a) nor (b)
Answer & Explanation
Answer: Option A
Explanation:
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25. The instruction MOV r1, r2 in 8085


A.causes contents of registers r2 to be moved to r, and uses register addressing
B. causes contents of registers r1 to be moved to r2 and uses register addressing
C. causes contents of registers r1 to be moved to r2 and uses register immediate addressing
D.causes contents of registers r2 to be moved to r1 and uses register immediate addressing
Answer & Explanation
Answer: Option A
31. Which of the following is not an interrupt line in 8085?
A.TRAP
B. RST 5.5
C. RST 7.5
D.RST 9.5
Answer & Explanation
Answer: Option D
Explanation:
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32. In 8085, F register has 8 bits.
A.True
Answer & Explanation

B.False

Answer: Option A
35. In 8085, high level on INTR line can be recognised only if
A.TRAP and RST lines are high
B. TRAP and RST lines are not high
C. TRAP line is high but not RST line
D.RST line is high but not TRAP line
Answer & Explanation
Answer: Option B
38. Microprocessor 8088 has
A.16 bit registers and 16 bit data bus
B. 8 bit registers and 8 bit data bus
C. 8 bit registers and 16 bit data bus
D.16 bit registers and 8 bit data bus

Answer & Explanation


Answer: Option D
39. Assertion (A): In 8085, P flag is for parity checking.
Reason (R): If the result of ALU has even parity, P flag is set and if the result has odd parity,
P flag is reset.
A.Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is correct R is wrong
D.A is wrong R is correct
Answer & Explanation
Answer: Option A
Explanation:
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40. Which of the following is not a special purpose peripheral?
A.Programmable DMA controller
B. Programmable Floppy disc controller
C. Programmable Hard disc controller
D.Programmable CRT controller
Answer & Explanation
Answer: Option A
44. Assertion (A): Microprocessors 8086 and 8088 are very similar in organisation and have
identical instruction sets.
Reason (R): If clock speed is same the execution time of 8088 and 8086 are exactly equal.
A.Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is correct R is wrong
D.A is wrong R is correct
Answer & Explanation
Answer: Option C
2. In which group of 8085 instructions condition flags are not affected?

A.Data transfer group


B. Arithmetic group
C. Logical group
D.Both (a) and (c)
Answer & Explanation
Answer: Option A
Explanation:
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3. In 8085, the instruction CMA is an example of
A.Implict addressing
B. Direct addressing
C. Register addressing
D.Immediate addressing
Answer & Explanation
Answer: Option A
Explanation:
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4. Assertion (A): Static RAMS are used where speed of operation is of primary concern.
Reason (R): Dynamic RAM has lower cost per bit than static RAM.
A.Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is correct R is wrong
D.A is wrong R is correct
Answer & Explanation
Answer: Option B
Explanation:
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5. In 8085 the time required to add two 32 bit numbers is (if clock frequency is 5 MHz)
A.about 1 ns
B. about 1 s
C. about 30 s
D.about 100 s
Answer & Explanation
Answer: Option C
6. DMA stands for
A.Direct Memory Address
B. Distributed Memory Address
C. Direct Memory Accumulator
D.Decimal Machine Address
Answer & Explanation
Answer: Option A
Explanation:
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7. 8085 data bus has 8 lines and is bidirectional.
A.True
B.False
Answer & Explanation
Answer: Option A
Explanation:
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8. It is difficult to write a program in a machine language.
A.True
B.False
Answer & Explanation
Answer: Option A
20. Which of the following is true?
A.Intel 8080 was the ancestor of Intel 8085
B. Intel 8080 was the ancestor of Intel Z 80

C. Intel 8080 was the ancestor of both Intel 8085 and Z 80


D.Intel 8085 was the ancestor of Intel 8085
Answer & Explanation
Answer: Option C
24. The memory hierarchy in microprocessor based system is
A.register, cache, primary, mass, off line back up
B. cache, register, primary, mass, off line back up
C. cache, register, mass, primary, off line back up
D.register, cache, mass, primary, off line back up
Answer & Explanation
Answer: Option A
Explanation:
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25. When a peripheral device is not ready for data transfer it will send to the microprocessor a
A.low READY bit
B. high READY bit
C. low or high READY bit depending on whether input or output is activated
D.none of the above
Answer & Explanation
Answer: Option A
26. Assertion (A): In microprocessor 8085 DMA allows direct access to memory to speed up
data transfer.
Reason (R): HOLD and HLDA signals are used for DMA operations.
A.Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is correct R is wrong
D.A is wrong R is correct
Answer & Explanation
Answer: Option B
32. In 8085 the address space size is
A.64 kbits

B. 64 k bytes
C. 32 kbits
D.16 k bytes
Answer & Explanation
Answer: Option B
Explanation:
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33. In 8085 the instruction MOV A, B is an example of
A.Direct addressing
B. Immediate addressing
C. Register addressing
D.Register indirect addressing
Answer & Explanation
Answer: Option C
37. The read and write cycle times of cache memory are in the range of
A.1 - 3 ns
B. 25 ns - 45 ns
C. 200 ns - 300 ns
D.1 s
Answer & Explanation
Answer: Option B
Explanation:
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38. In 8086
A.the registers SI and DI are used for string operation
B. the registers CS and DS are used for string operation
C. the registers SS and ES are used for string operation
D.the registers SI and SP are used for string operation
Answer & Explanation
Answer: Option A

41. In 8085 the data is stored in the stack on


A.First in First Out basis
B. Last in First Out basis
C. First in Last Out basis
D.Last in Last Out basis
Answer & Explanation
Answer: Option B
Explanation:
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42. The organisatioion of Intel memory chip 127256 is
A.32 K x 8
B. 16 K x 8
C. 32 K x 4
D.16 K x 4
Answer & Explanation
Answer: Option A
Explanation:
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43. In a micro computer the control bus
A.transmits and receives control signals between processor and other devices
B. transmits and receives control signals, also sends and receives data
transmits and receives control signals, sends and receives data and transmits address of the
C.
device
D.none of the above
Answer & Explanation
Answer: Option A
Explanation:
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44. Read the following statements about time and space requirements of microprocessors
1.
2.
3.
4.

Space requirement is also known as memory requirement.


Space requirement is expressed in terms of bytes.
Time requirement is expressed in terms of states.
Time requirement is expressed in terms of - s.

Which of the above statements are correct?


A.1, 2 and 3 only
B. 1, 2 and 4 only
C. 2 and 3 only
D.1 and 4 only
Answer & Explanation
Answer: Option A
Explanation:
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45. Assertion (A): Microprocessor 8085 has facility of interrupt control.
Reason (R): TRAP, RST 7.5, RST 6.5, RST 5.5 and 1NTR are interrupt signals in 8085.
A.Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is correct R is wrong
D.A is wrong R is correct
Answer & Explanation
Answer: Option C
49. Consider the following statements
1.
2.
3.
4.

In 8085 address and data buses are multiplexed.


In Z 80 address and data buses are multiplexed
In Z 80 address and data buses are not multiplexed.
Z 80 has 16 bit address bus and 8 bit data bus.

Which of the above statements are correct?


A.1 and 2 only
B. 1, 3 and 4 only

C. 1, 2 and 4 only
D.2 and 4 only
Answer & Explanation
Answer: Option C
46. Which characteristics of a memory chip is called dc characteristics?
A.Organisation
B. Timing characteristics
C. Physical dimensions
D.Power consumption and bus loading
Answer & Explanation
Answer: Option D
Explanation:
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47. RAM is a volatile memory device.
A.True
Answer & Explanation

B.False

Answer: Option A
1. Assertion (A): Microprocessor 8085 has 16 address bus lines and 8 data bus lines.
Reason (R): Address bus in 8085 is unidirectional.
A.Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is correct R is wrong
D.A is wrong R is correct
Answer & Explanation
Answer: Option B
Explanation:
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2. IC 74181 has two select lines.

A.True
Answer & Explanation

B.False

Answer: Option B
6. An instruction using immediate addressing mode in 8085 is
A.2 bytes long
B. 3 bytes long
C. 2 or 3 bytes long
D.1 or 2 or 3 bytes long
Answer & Explanation
Answer: Option D
Explanation:
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7. Consider the following statements about 8085
1.
2.
3.
4.

The instruction LDA uses direct addressing mode.


The instruction MVI uses direct addressing mode.
The instruction MVI uses immediate addressing mode.
The instruction LDA uses immediate addressing mode.

Which of the above are correct?


A.1 and 3 only
B. 3 and 4 only
C. 1 and 2 only
D.2 only
Answer & Explanation
Answer: Option A
12. Which characteristic of a memory chip is called ac characteristics?
A.Power consumption
B. Bus loading
C. Timing characteristic
D.All of the above
Answer & Explanation
Answer: Option C

17. In 8085 the instruction MOV A, M is an example of


A.Direct addressing
B. Immediate addressing
C. Register addressing
D.Register indirect addressing
Answer & Explanation
Answer: Option D
Explanation:
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18. Assertion (A): Magnetic tape can be accessed only sequentially.
Reason (R): Magnetic tape consists of magnetised spots or tracks.
A.Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is correct R is wrong
D.A is wrong R is correct
Answer & Explanation
Answer: Option B
Explanation:
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19. Assertion (A): Most PCs use static RAM for main memory.
Reason (R): Static RAM is faster than dynamic RAM.
A.Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is correct R is wrong
D.A is wrong R is correct
Answer & Explanation
Answer: Option D
21. Assertion (A): A two byte instruction of 8085 has an operation code in first byte and

operand / address in the second byte.


Reason (R): If an instruction is too long it is possible to reduce its length by a number of
methods.
A.Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is correct R is wrong
D.A is wrong R is correct
Answer & Explanation
Answer: Option B
Explanation:
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22. In computers the size of secondary memory is usually much larger than that of primary
memory.
A.True
B.False
Answer & Explanation
Answer: Option A
Explanation:
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23. In 8085
A.all operations are on 8 bit data
B. majority of operations are on 8 bit data
C. all operations are on 8 bit or 4 bit data
D.either (a) or (c)
Answer & Explanation
Answer: Option B
30. For most static RAM the write pulse width should be at least
A.10 ns
B. 60 ns
C. 300 ns
D.1 s

Answer & Explanation


Answer: Option B
31. The chip 8257 is a
A.programmable interrupt controller
B. programmable DMA controller
C. programmable peripheral interface
D.none of the above
Answer & Explanation
Answer: Option B
Explanation:
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32. Both ROM and RAM can be accessed randomly.
A.True
B.False
Answer & Explanation
Answer: Option A
34. The number of pins in microprocessor 8086 is
A.30
B. 40
C. 50
D.60
Answer & Explanation
Answer: Option B
Explanation:
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35. The input to ALU are the contents of accumulator and temporary register.
A.True
B.False
Answer & Explanation
Answer: Option A

36. In super computers the extra level of primary memory is generally called
A.Solid state device
B. Single stage device
C. Digital state device
D.Surface stage device
Answer & Explanation
Answer: Option A
38. In memory mapped I/O means that
A.an input or output device is treated by the microprocessor as one memory location
B. input or output devices are treated as distinct
C. an address on the address bus may refer either to a memory location or to an I/O device
D.none of the above
Answer & Explanation
Answer: Option A
42. 8255 A has three 8 bit ports A, B, C for peripheral data transfer. For programming 8255 A,
these ports are grouped as
A.Port A with Port B
B. Port A with 4 most significant ports of C, port B with 4 least significant ports of C
C. Port A with Port C
D.none of the above
Answer & Explanation
Answer: Option B
46. Assertion (A): In register indirect addressing mode of 8085, the address of operand is in the
specified register.
Reason (R): An example of register indirect addressing mode is MOV, A, M..
A.Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is correct R is wrong
D.A is wrong R is correct
Answer & Explanation
Answer: Option B
Explanation:
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47. A high level language is less efficient than machine language.
A.True
B.False
Answer & Explanation
Answer: Option A

2. The five flags in 8085 are designated as


A.Z, CY, S, P and AC
B. D, Z, S, P, AC
C. Z, C, S, P, AC
D.Z, CY, S, D, AC
Answer & Explanation
Answer: Option A
4. In 8085 which addressing mode is also called inherent addressing?
A.Direct
B. Register
C. Implicit
D.Immediate
Answer & Explanation
Answer: Option C
Explanation:
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5. Consider the following statements for 8085
1. The most significant 8 bits of address are transmitted on the 8 lines on which data is
transmitted.
2. Eight pins are dedicated to transmit the most significant 8 bits of memory address.
3. The least significant 8 bits of address are transmitted on the lines on which data is
transmitted.
4. The data and leass significant 8 bits are transmitted at different points in time.
Which of the above statements are correct?
A.all
B. 1, 2 and 3 only
C. 2, 3 and 4 only
D.1, 3 and 4 only
Answer & Explanation
Answer: Option C
11. The timing difference between a slow memory and fast processor can be resolved if
A.processor is capable of waiting
B. external buffer is used
C. either (a) or (b)
D.neither (a) nor (b)

Answer & Explanation


Answer: Option C
Explanation:
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12. In 8086 the number of bytes which can be addressed directly is about
A.1000
B. 10000
C. 100000
D.one million
Answer & Explanation
Answer: Option D

13. Consider the following statements about DRAM


1. Page mode read operation is faster than RAS read
2. RAS input remains active during column address strobe
3. The row and column addresses are strobed into the internal buffers using RAS and
CAS inputs respectively
Which of the above statements are correct?
A.1 and 3 only
B. All
C. 1 and 2 only
D.2 and 3 only
Answer & Explanation
Answer: Option B
15. Consider the following statements
1. EEPROM has the problem of high write time.
2. EEPROM has the problem of limited number of write cycles.
3. Shadow RAM has the problem of high write time.
Which of the above statements are correct?
A.All

B. 1 and 2 only
C. 1 and 3 only
D.2 and 3 only
Answer & Explanation
Answer: Option B
16. Which of the following is not a general purpose peripheral?
A.I/O port
B. Programmable interrupt controller
C. Programmable CRT controller
D.Programmable interval timer
Answer & Explanation
Answer: Option C
25. Assertion (A): Each memory chip has its own address latch.
Reason (R): ALE signal comes out of microprocessor 8085 and goes to memory chip.
A.Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is correct R is wrong
D.A is wrong R is correct
Answer & Explanation
Answer: Option D
30. Read the following statements about address space in microprocessors
1. An address space is a set of all possible addresses which can be generated by a
microprocessor.
2. Each address in the address space allows a designer to provide at least one memory or
I/O location in the system.
3. Two types of address spaces are memory and I/O address space.
4. Some micro processors have only one type of address space.
Which of the above are correct?
A.All
B. 1, 2, 3 only
C. 1, 2, 4 only
D.1, 3, 4 only
Answer & Explanation
Answer: Option A

37. Which memory has read operation, byte erase, byte write and chip erase?
A.RAM
B. UVEPROM
C. EEPROM
D.both (b) and (c)
Answer & Explanation
Answer: Option C
40. The signals in 8086 are in maximum mode when
A.MN / MX pin is tied to Vcc
B. MN / MX Pin is grounded
C. MN / Mx pin is left open
D.none of the above
Answer & Explanation
Answer: Option B
41. In 8085
A.P flag is set when the result has even parity
B. P flag is set when the result has odd parity
C. P flag is reset when the result has odd parity
D.P flag is reset when the result has even parity
Answer & Explanation
Answer: Option A
45. In 8085, the pairing of registers B, C, D, E, H, L is
A.B - C, D - E, H - L
B. B - D, C - E, H - L
C. B - C, D - L, H - E
D.B - H, D - E, C - L
Answer & Explanation
Answer: Option A
46. Assertion (A): PC-XT is a personal computer.
Reason (R): PC-XT uses a floppy drive and has a medium sized hard disc.
A.Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A

C. A is correct R is wrong
D.A is wrong R is correct
Answer & Explanation
Answer: Option A
Explanation:
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47. In Intel 8085, the integer range per word length is
A.-128 to 127
B. -127 and 128
C. -64 and 63
D.-63 and 64
Answer & Explanation
Answer: Option A
Explanation:
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48. Assertion (A): Structures are useful in DBMS.
Reason (R): Structures are very large numbers of applications besides DBMS.
A.Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is correct R is wrong
D.A is wrong R is correct
Answer & Explanation
Answer: Option B
2. In a typical microcomputer data transfer takes place between
A.P and memory
B. P and I/O devices
C. memory and I/O devices
D.all of the above
Answer & Explanation

Answer: Option D
Explanation:
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3. In 8085 the pins for + 5 V input and ground are
A.20 and 40 respectively
B. 40 and 20 respectively
C. 1 and 2 respectively
D.1 and 1 respectively
Answer & Explanation
Answer: Option B
5. 'Burst refresh' in DRAM is also called
A.Concentrated refresh
B. Distributed refresh
C. Hidden refresh
D.None of the above
Answer & Explanation
Answer: Option A
6. The number of interrupt lines in 8085 is
A.2
C. 4
Answer & Explanation

B. 3
D.5

Answer: Option D
11. Which of the following is not treated as hexadecimal constant by assembler in 8085?
A.45 H
B. 6 AFH
C. 234
D.64 H
Answer & Explanation
Answer: Option C

16. IC 7485 cannot be cascaded.


A.True
Answer & Explanation

B.False

Answer: Option B
Explanation:
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17. An I/O processor controls the flow of information between
A.cache memory and I/O devices
B. main memory and I/O devices
C. two I/O devices
D.cache and main memory
Answer & Explanation
Answer: Option B
23. The total number of pins in 8085 are
A.20
C. 40
Answer & Explanation

B. 30
D.50

Answer: Option C
25. In static RAM 6264 the number of address inputs are
A.10
B. 12
C. 13
D.15
Answer & Explanation
Answer: Option C
27. For most static RAM the maximum access time is about
A.1 ns
B. 10 ns
C. 100 ns
D.1 s
Answer & Explanation
Answer: Option C

Explanation:
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28. In direct addressing mode of 8085
A.All instructions are 3 bytes long
B. All instructions are 3 bytes long except IN instruction which is 2 bytes long
C. All instructions are 3 bytes long except IN and OUT instructions which are 2 bytes long
D.All instructions are 2 bytes long
Answer & Explanation
Answer: Option C
31. Which of the following is not an assembler directive in 8085?
A.D S
B. D B
C. D Q
D.E Q U
Answer & Explanation
Answer: Option C
35. In 8086 the number of lines on which data and address is multiplexed is
A.8
B. 16
C. 20
D.32
Answer & Explanation
Answer: Option C
40. The chip 8254 is a 40 pin programmable interval timer. The number of its independent 16 bit
counters is
A.2
B. 3
C. 4
D.5
Answer & Explanation
Answer: Option D
41. A PC can be upgraded to a multimedia PC by adding CD ROM drive, sound card etc.
A.True
B.False
Answer & Explanation

Answer: Option A

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