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Emitter Coupled Logic

1) An experiment was conducted to demonstrate the operation of an Emitter Coupled Logic (ECL) gate made using discrete components. 2) A simplified two-input ECL gate was constructed excluding the output stages. Voltages were measured at the inputs and outputs for different combinations of input voltages. 3) The voltage transfer characteristic of the ECL gate was determined by plotting the output voltage versus the input voltage. Noise margins were then calculated from these characteristics.

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0% found this document useful (0 votes)
295 views3 pages

Emitter Coupled Logic

1) An experiment was conducted to demonstrate the operation of an Emitter Coupled Logic (ECL) gate made using discrete components. 2) A simplified two-input ECL gate was constructed excluding the output stages. Voltages were measured at the inputs and outputs for different combinations of input voltages. 3) The voltage transfer characteristic of the ECL gate was determined by plotting the output voltage versus the input voltage. Noise margins were then calculated from these characteristics.

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foggybluue
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EXPERIMENT

#

7
EMITTER COUPLED LOGIC (ECL)


OBJECTIVE:
To demonstrate the operation of an ECL gate made by using discrete components.


EQUIPMENTS:
Power supply, digital multimeter, potentiometer (100 k), diodes (1N4007), transistors
(BC550), and resistors.

BACKGROUND:
The experimentally measured value will be compared with the theoretically calculated value. In
the second part, a two
input ECL gate will be made excluding the emitter
follower output stages.


PROCEDURE:
1- Construct the circuit as shown in figure1. Adjust the potentiometer to get -5V at V
EE
.
2- Measure the reference voltage V
R
.
V
R
=
____________________
3- Construct the simplified ECL gate excluding the output stages as shown in Figure 2.
4- Let V(1) =-0.75 V and V(0) =-1.75 V. For different combinations of voltages, measure
the two output voltages and record their values in Table I. Also, measure the voltage at
point E in the circuit shown in Figure 2.

Table I: Measurements of voltages for the ECL gate
V
A
(Volts) V
B
(Volts) V
O1
(Volts) V
O2
(Volts) V
E
(Volts)
- 1.75 - 1.75
- 1.75 - 0.75
- 0.75 - 1.75
- 0.75 - 0.75



Figure 1 : Circuit for obtaining reference voltage.



Figure 2 : Simplified ECL gate.




Table II : Output voltage V
O2
versus the input voltage V
A
for V
B
set to logic '0'
V
A
(V) 0.0 - 0.2 - 0.3 - 0.4 - 0.5 - 0.6 - 0.7 - 0.8 - 0.9
V
02
(V)
V
A
(V) - 1.0 - 1.1 - 1.2 - 1.3 - 1.4 - 1.5 - 1.6 - 1.8 - 2.0
V
02
(V)
6- Using the results obtained in step 4 above , plot the voltage transfer characteristics (V
O2

versus V
A
). From these characteristics determine the noise margins by completing the
entries in Table III.
Table III: Determination of the noise margins for the ECL gate.
V
OH
(V) V
IH
(V) NM
H
(V) V
IL
(V) V
OL
(V) NM
L
(V)

7- Disconnect the circuit and measure the resistances of all the resistors used in the
experiment. Record their values.







1- Compare the experimentally obtained value of reference voltage V
R
with the theoretically
calculated value. Explain the difference between the two values.
2- On the basis of measured voltages in Table I, identify which output is for OR operation
and which output is for NOR operation .
3- Using the measured voltages in Table I, determine the mode of operation of each
transistor for various combinations of input voltages.
4- Why the two levels of output voltage are not the same as the logic '0' and logic '1'
voltages used in the experiment. Explain

Tasks

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