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THE MEMORY SYSTEMS

BASIC CONCEPTS
The memory is usually designed to store and retrieve data. The maximum size of the
memory that can be used in any computer is determined by the addressing scheme. For
example, a 16-bit computer that generates 16-bit addresses is capable of addressing up to
2
16
=64K memory locations. Similarly, machines whose instructions generate 32-bit
addresses can utilize a memory that contains up to 2
32
=4G memory locations. Most modern
computers are byte addressable. A memory unit is called random-access memory (RAM) if
any location can be accessed for a read or write operation in some fixed amount of time
that is independent of locations address. A useful measure of the speed of the memory
units is the time that elapses between the initiation of an operation and the completion off
that operation. This is called memory access time. The memory cycle time is the minimum
time delay required between the initiations of two successive memory operations. The
memory cycle time is the bottleneck in the system. The basic technology for implementing
the memory uses semiconductor integrated circuits.
SEMICONDUCTOR RAM
Semiconductor memories are available in a wide range of speeds. Their cycle time ranges
from 100ns to less than 10ns. Semiconductor memories are fabricated using VLSI (Very
Large Scale Integration) technology.
Internal Organization of Memory chips:
Memory cells are usually organized in the form of an array, in which each cell is capable of
storing one byte of information. A possible organization is as shown. Each row of cells
constitutes a memory word, and all cells of a row are connected to a common line, word
line, which is driven by an address decoder in a chip. The cells in each column are connected
to a Sense/Write circuit by two bit lines. The Sense/Write circuits are connected to the data
i/o lines of the chip. During a Read operation, these circuits sense, or read, the information
stored in the cells selected by a word line and transmit this information to the output data
lines. During Write operation, the Sense/Write circuits receive input information and store it
in the cells of the selected word.
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STATIC MEMORIES
Memories that consist of circuits capable of retaining their state as long as power is applied
are known as static memories. Fig. shows a static RAM (SRAM) cell.

Two inverters are cross-connected to form a latch. The latch is connected to two bit lines by
transistors T
1
and T
2
. These transistors act as switches that can be opened or closed under
control of the word line. When the word line is at ground level, the transistors are turned off
and the latch retains its state. For example, let us assume that the cell is in state 1 if the
logic value at point X is 1 and at point Y is 0. This state is maintained as long as the signal on
the word line is at ground level. In order to read the state of SRAM cell, the word line is
activated to close switches T1 and T2. If the cell is in state 1, the signal on bit line bit is high
and the signal on bit line t is low. The opposite is true if the cell is in state 0. Thus, bit and
t are compliments of each other. Sense/Write circuits at the end of the bit lines monitor
the state bit and t and set the output accordingly. In write operation the state of the cell is
set by placing the appropriate value on bit line bit and its complement t , and then
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activating the word line. This forces the cell into corresponding state. The required signals
on the bit lines are generated by Sense/Write circuit.
SRAM can be accessed very quickly. Access times of just a few nanoseconds are found in
commercially available chips. SRAMs are used in applications where speed is of critical
concern.
ASYNCHRONOUS DRAM
The cells which do not retain their state indefinitely are called dynamic RAMs (DRAM).
Information is stored in dynamic memory cell in the form of a charge on a capacitor, and
this charge can be maintained for only tens of milliseconds. Since the cell is required to
store information for a much longer time, its contents must be periodically refreshed by
restoring the capacitor charge to its full value. If the timing of the memory device is
controlled asynchronously then such memories are referred to as asynchronous DRAM.

An asynchronous DRAM chip has power connections, some number of address inputs
(typically 21) and a few (typically 8) bidirectional data lines. There control signals are:
, the Row Address Strobe. The address inputs are captured on the falling edge of
, and select a row to open. The row is held open as long as is low.
, the Column Address Strobe. The address inputs are captured on the falling edge
of , and select a column from the currently open row to read or write.
, Read/Write Enable. This signal determines whether a ien fallin ede of is
a read (if high) or writes (if low). If low, the data inputs are also captured on the falling
edge of .
This interface provides direct control of internal timin. hen is drien low, a cycle
must not be attempted until the sense amplifiers have sensed the memory state, and
must not be returned high until the storage cells have been refreshed. When is driven
high, it must be held high long enough for pre-charging to complete.
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When the DRAM shown above is accessed, the contents of all 4096 cells in the selected row
are sensed, but only 8 bits are placed on the data lines D
7-0
. This byte is selected by the
column address bits A
8-0
. A simple modification can make it possible to access the other
bytes in the same row without having to reselect the row. A latch can be added at the
output of the sense amplifier in each column. Transfer of successive bytes is achieved by
applying a consecutive sequence of column address under the control of successive CAS
signals. This block transfer capability is referred to as the fast page mode feature.
SYNCHRONOUS DRAM
The DRAMs whose operation is directly synchronized with clock signal are known as
synchronous DRAM (SDRAM). The fig shows the structure of SDRAM. The address and data
connections are buffered by means of registers. SDRAMs have several different modes of
operation, which can be selected by writing control information into a mode register. The
burst operations use the block transfer capability described above as the fast page mode
feature. In SDRAMs, it is not necessary to provide externally generated pulses on the CAS
line to select successive columns. The necessary control signals are provided internally using
a column counter and the clock signal.

SDRAMs have built-in refresh circuitry. A part of this circuitry is a refresh counter, which
provides the addresses of the rows that are selected for refreshing. In a typical SDRAM, each
row must be refreshed at least every 64ms.
Transfers between the memory and the processor involve single words of data or small
blocks of words. The speed and efficiency of these transfers have a large impact on the
performance of a computer system. A good indication of the performance is given by two
parameters: latency and bandwidth. The term memory latency is used to refer to the
amount of time it takes to transfer a word of data to or from the memory. In block
transfers, the term latency is used to denote the time it takes to transfer first word of data.
When transferring blocks of data, it is of interest to know how much time is needed to
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transfer an entire block. Since blocks can be variable in size, it is useful to define a
performance measure in terms of the number of bits or bytes that can be transferred in one
second. This measure is often referred to as the memory bandwidth. The bandwidth of a
memory unit depends on the speed of access to the stored data and on the number of bits
that can be accessed in parallel. Thus, the bandwidth is the product of the rate at which
data are transferred and the width of the data bus.
ROM
Read-only memory (ROM) is a class of storage medium used in computers and other
electronic devices. ROM is a non volatile memory as the data stored cannot be modified.
Since its normal operation involves only reading of stored data, it is called read- only
memory. The ROM cell usually consists of a single transistor. A logic value of 0 is stored in
the cell if the transistor is connected to the ground; otherwise 1 is stored. The bit line is
connected through a resistor to the power supply. To read the state of the cell, the word
line is activated. Thus, the transistor switch is closed and the voltage on the bit line drops to
near zero if there is a connection between the transistor and ground. If there is no
connection to ground, the bit line remains at the high voltage, indicating a 1. A sense circuit
at the end of the bit line generates the proper output value. Data are written in ROM when
it is manufactured.

PROM
Some ROM allows the data to be loaded by the user, thus providing programmable ROM
(PROM). A typical PROM comes with all bits reading as "1". Burning a fuse bit during
programming causes the bit to read as "0". The memory can be programmed just once after
manufacturing by "blowing" the fuses, which is an irreversible process. PROMs provide
flexibility and convenience not available with ROMs. The latter are economically attractive
for storing fixed programs and data when high volumes of ROMs are produced. However,
the cost of preparing the masks needed for storing a particular information patter in ROMs
makes then very expensive when only a small number are required. In this case, PROMs
provide a faster and considerably less expensive approach because they can be
programmed directly by the user.
EPROM
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Another type of ROM which allows the stored data to be erased and new data can be
loaded is called erasable programmable ROM (EPROM). EPROMs are capable of retaining
stored information for a long time. In an EPROM cell a special transistor is used which has
the ability to function either as a normal transistor or as a disabled transistor that is always
turned off. This transistor can be programmed to behave as a permanently open switch, by
injecting charge into it that becomes trapped inside. The important advantage of EPROM
chips is that their contents can be erased and reprogrammed. Erasure requires dissipating
the charges trapped in the transistor of memory cells; this can be done by exposing the chip
to UV light. Thus EPROM chips are mounted in packages that have transparent windows.
EEPROM
EEPROM stands for Electrically Erasable Programmable Read-Only Memory and is a type
of non-volatile memory. A significant disadvantage of EPROMs is that a chip must be
physically removed from the circuit for reprogramming and that its entire contents are
erased by the UV light. It is possible to implement another version of erasable PROMs that
can be both programmed and erased electrically. Moreover, it is possible to erase the cell
contents selectively. The only disadvantage of EEPROMs is that different voltages are
needed for erasing, writing, and reading the stored data.
FLASH MEMORY
Flash memory is an electronic non-volatile computer storage medium that can be
electrically erased and reprogrammed like EEPROM. In EEPROM it is possible to read and
write the contents of a single cell. In a flash device it is possible to read the contents of a
single cell, but is only possible to write an entire block of cells. Prior to writing, the previous
contents of the block are erased. Flash devices have great density which leads to higher
capacity and a lower cost per bit. They require single power supply voltage, and consume
less power in their operation. There are two popular choices of implementation of large
memory modules: flash cards and flash drives.
CACHE MEMORY
The speed of the main memory is very low in comparison with the speed of modern
processors. Hence, it is important to devise a scheme that reduces the time needed to
access the necessary information. Since the speed of main memory unit is limited by
electronic and packaging constraints, the solution must be sought in a different architectural
arrangement. An efficient solution is to use a fast cache memory which essentially makes
the main memory appear to the processor to be faster than it really is. The effectiveness of
the cache mechanism is based on a property of computer programs called locality of
reference. Analysis of programs shows that most of their execution time is spent on routines
in which many instructions are executed repeatedly. These instructions may constitute a
simple loop, nested loops, or a few procedures that repeatedly call each other. Memory
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instructions in localized areas of the program are executed repeatedly during some time
period, and the remainder of the program is accessed relatively infrequently. This is referred
to as locality of reference. It manifests itself in two ways: temporal and spatial. The
temporal aspect of the locality of reference suggests that whenever an information item
(instruction or data) is first needed, this item should be brought into the cache where it will
hopefully remain until it is needed again. The spatial aspect of the locality of reference
suggests that instead of fetching just one item from the main memory to the cache, it is
useful to fetch several items that reside at adjacent addresses as well. We will use the term
block to refer to a set of continuous address locations of some size. Another item that is
often used to refer to a cache block is cache line. When the cache is full and a memory word
that is not in the cache is referenced, the cache control hardware must decide which block
should be removed to create space for the new block that contains the referenced word.
The collection of rules for making this decision constitutes the replacement algorithm.

VIRTUAL MEMORY
Techniques that automatically move program and data blocks into the physical main
memory when they are required for execution are called virtual-memory techniques.
Programs, and hence the processor, reference an instruction and data space that is
independent of the available physical main memory space. The binary addresses that the
processor issues for either instructions or data are called virtual or logical addresses. These
addresses are translated into physical addresses by a combination of hardware and
software components. If a virtual address refers to a part of the program or data space that
is currently n the physical memory, then the contents of the appropriate location in the
main memory are accessed immediately. On the other hand, if the referenced address is not
in main memory, its contents must be brought into a suitable location before they can be
used.
A typical organization that implements virtual memory is shown. A special hardware unit,
called Memory Management Unit (MMU) translates virtual addresses into physical
addresses. When the desired data are in the main memory, these data are fetched as
described in our presentation of the cache mechanism. If the data are not in the main
memory, the MMU causes the operating system to bring the data into the memory from the
disk. Transfer of data between the disk and the main memory is performed using the DMA
scheme. The virtual-memory mechanism bridges the size and speed gaps between the main
memory and secondary storage and is usually implemented in part by software techniques.
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SECONDARY STORAGE
Large storage requirements of most computer system are economically realized in the form
of magnetic disks, optical disks and magnetic tapes, which are usually referred to as
secondary storage devices.
MAGNETIC HARD DISKS
The storage medium in a magnetic disk system consists of one or more disks mounted on a
common spindle. A thin magnetic film is deposited on each disk, usually on both sides. The
disks are placed in a rotary drive so that the magnetized surfaces move in close proximity to
read/write heads. The disks rotate at a uniform speed. Each head consists of magnetic yoke
and magnetizing coil. Digital information can be stored on the magnetic film by applying
current pulses of suitable polarity to the magnetization coil. This causes the magnetization
of the film in the area immediately underneath the head to switch to a direction parallel to
the applied field. The same head can be used for reading the stored information. In this
case, changes in the magnetic field in the vicinity of the head caused by the movement of
the film relative to the yoke induce a voltage in the coil, which now serves as a sense coil.
The polarity of this voltage is monitored by the control circuitry to determine the state of
magnetization of the film. Only charges in the magnetic field under the head can be sensed
during read operation. The read/write heads of a disk system are movable. There is one
head per surface. All heads are mounted on a comb-like arm that can move radially across
the stack of disks provide access to individual tracks. To read or write data on a given track,
the arm holding the read/write heads must first be positioned to that track.
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The disk system consists of three key parts. One part is the assemble of the disk platters,
which is usually referred to as disk. The second part comprises the electromechanical
mechanism that spins the disks and moves the read/write heads; it is called the disk drive.
The third part is the electronic circuitry that controls the operation of the system, which is
called disk controller. The disk controller may be implemented as a separate module or it
may be incorporated into the enclosure that contains the entire disk system. Eg: floppy disk.
OPTICAL DISKS
Large storage devices can also be implemented using optical means. The optical disks uses a
technology based on a laser light source. A laser beam is directed onto the surface of the
spinning disk. Physical indentations in the surface are arranged along the tracks of the disk.
They reflect the focussed beam toward a photodetector, which detects the stored binary
pattern. The laser emits a coherent light beam that is sharply focussed on the surface of the
disk. Coherent light consists of synchronized wave that have the same wavelength. If a
coherent light beam is combined with another beam of the same kind, and the two beams
are in phase, then the result will be a brighter beam. But, if the waes of the to eams are
out of phase, they will cancel each other. Thus, if a photodetector is used to detect the
beams, it will detect a bright spot in the first case and a dark spot in the second case. Eg:
Compact disk (CD), Digital Versatile Disk (DVD).
A cross-section of a small portion of CD is shown. The bottom layer is polycarbonate plastic,
which functions as a clear glass base. The surface of this plastic is programmed to store data
by indenting it with pits. The unindented parts are called lands. A thin layer of reflecting
aluminium material is placed on the top of a programmed disk. The aluminium is then
covered by a protective acrylic. Finally the topmost layer is deposited and stamped with a
label. The total thickness of the disk is 1.2mm. Almost all of it is contributed by the
polycarbonate plastic. The other layers are very thin.
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The laser source and the photodetector are positioned below the polycarbonate plastic. The
emitted beam travels through this plastic, reflects off the aluminium layer, and travels back
toward the photodetector. The CD is 120mm in diameter and there is a 15mm hole in the
center. Data are stored on a track that covers the area from 25mm radius to 58mm radius.
The space between the tracks is 1.6microns. Pits are 0.5microns wide and 0.8 to 3 microns
long.
The first DVD standard was defined in 1996 by a consortium of companies. The objective is
to be able to store a full-length movie on one side of a DVD disk. The physical size of a DVD
disk is same as for CDs. The disk is 1.2mm thick and 120mm in diameter. Its storage is made
much larger than CDs by several design changes:
1. A red light laser with wavelength of 635nm is used instead of the infrared light laser
used in CDs, which has a wavelength of 780nm. The shorter wavelength makes it
possible to focus the light to a smaller spot.
2. Pits are smaller, having a minimum length of 0.4micron.
3. Tracks are placed closer together; the distance between tracks is 0.74 micron.
Using these improvements leads to a DVD capacity of 4.7 GB. Access times for DVD drives
are similar to CD drives. However, when the DVD disks rotate at the same speed, the data
transfer rates are much higher because of the higher density of pits.
MAGNETIC TAPE SYSTEMS
Magnetic tapes are suited for off-line storage of large amounts of data. They are typically
used for hard disk backup purposes and for archival storage. Magnetic tape recording uses
the same principle as used in magnetic disk recording. The main difference is that the
magnetic film is deposited on a very thin 0.5 or 0.25 inch wide plastic tape. Seven or 9 bits
are recorded in parallel across the width of the tape, perpendicular to the direction of
motion. A separate read/write head is provided for each bit position on the tape, so that all
bits of a character can be read or written in parallel. One character bits is used as a parity
bit.
Data on the tape are organized in the form of records separated by gaps. Tapped motion is
stopped only when a record gap is underneath the read/write heads. The record gaps are
long enough to allow the tape to attain its normal speed before the beginning of the next
record is reached. To help users organize large amounts of data, a group of related records
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is called a file. The beginning of the file is identified by file mark. The first record following a
file mark can be used as a header or identifier for this file. This allows user to search a tape
containing a large number of files for a particular file. The controller of a magnetic tape
drive enables the execution of a number of control commands like rewind, erase, write,
forward etc.

Two methods of formatting and using tapes are available. In the first methods, the records
are variable in length. This allows efficient use of the tape, but it does not permit updating
or overwriting of records in place. The second method is to use fixed- length records. In this
case, it is possible to update records in place.