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Appnote PCB FPGA Power Architectures 1

Power Architectures

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63 views2 pages

Appnote PCB FPGA Power Architectures 1

Power Architectures

Uploaded by

arunsrl
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Adam Taylor, Head of Engineering

Systems at E2V
1/27/2014 05:20 PM EST
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Blog
PCB/FPGA Power Architectures, Part 1
Based on the wealth of
comments garnered by
my recent article on
becoming a decoupling
capacitor guru, I thought I would write a little more on the hardware/system aspects of
designing a FPGA and using a FPGA in your system. Of course, a lot of this is applicable to
non-FPGA-based systems.
One of the more interesting aspects to start looking at is the power architecture of the design.
How do we go about powering the FPGA (and other devices) on the board? Normally, the
system will have an intermediate voltage, which comes from an AC/DC convertor or another
form of DC supply that powers the system. The first stage of the design is to specify this
interface correctly in terms of the design's voltage and current requirements. Determining this
intermediate voltage is the easier task of the two, as the required current will have to account
for any inefficiencies in the downstream convertor(s).
The first stage in defining the power architecture is a determination of all the voltage rails and
the currents drawn by each of these rails. For example, consider the FPGA-based imaging
system as shown below:
In the case of such a system, you may have a number of voltage rails, such as the ones
shown in the following table:
For this particular example, let's assume that all of the power supplies have a requirement to
be within 5%. As can be seen from the above table, the highest voltage is 3.465 V, which is
the nominal 3.3 V at its maximum acceptable tolerance. Knowing this value allows us to
determine the voltage supplied by the AC/DC or other DC supply within the system. The
sensible thing to do here is to select a convertor that has an output compatible with the 3.3 V
required, thereby saving a conversion stage and increasing the overall efficiency.
The next stage is to determine the power required by each of the rails. This requires that you
use power estimation tools such as Xilinx XPE and read the datasheets for other devices to
ensure you can determine the total amount of power required. I tend to collate all of this in a
spreadsheet, as this comes in useful later on when we are determining the conversion
architectures.
Click here to see a larger image.
As you can see above, when I calculated the power required by the board, I performed two
calculations -- one for the nominal and one for the maximum power. This is because, at this
point in time, I have not yet calculated the maximum rail voltages provided in the worst case
by the convertors. Therefore, I have assumed they will be at maximum voltage. This is
important, since it is needed to determine the power required in the worst case by the AC/DC
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convertor (you should always design to address worst case requirements). While the
difference (146.5 mW in the example above) is not large in this case, it could be in a larger
system.
Having determined the load power, we need to determine the overall power requirements --
including loses in the power convertors -- before we can specify the power required from the
AC/DC convertor or DC supply.
Having determined the power required by each device, the next step is to determine the
power required by each rail. This can subsequently be used to determine the conversion
architecture, although -- of course -- other requirements also come into play when
determining this.
When it comes to the power architecture itself, there are two main types of convertors as
follows:
Switching regulators generate the regulated output voltage by switching storage inductors
into, and out of, the circuit to maintain a regulated output voltage. This switching is controlled
via either an analog or digital control loop. With a switching regulator, 100% efficiency is
theoretically achievable. In the real world, however, components are not ideal, but
efficiencies greater than 90% can be achieved and Gallium Nitride (GaN) power FETs
promise even better performance.
Linear regulators generate the regulated voltage by dissipating the excess power across a
pass transistor. This dissipation is managed via a control loop to adjust for fluctuations. Since
there is no switching involved, the linear regulator is often used where quieter power supplies
are required. However, this does not mean that all ripple on the voltage rail is rejected. As
can be seen in the image below, the ripple rejection decreases as the frequency increases:
In my next column on this topic, I will consider the advantages and disadvantages of
switching regulators versus their linear counterparts, along with other considerations that
must be taken into account to obtain a good, efficient, and reliable power architecture. In the
meantime, I welcome your questions and comments.
Related posts:
6 Things to Consider When Designing Your PCB
Wrapping One's Brain Around Metastability
So We Just Consider the Resistor's Tolerance, Right?
Become a Decoupling Capacitor Network Guru, Part 1
Mining Litecoins: ZedBoard vs. Raspberry Pi Faceoff
Become a Decoupling Capacitor Network Guru, Part 2
Using a ZedBoard, Part 1 (Opening the Box)
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