4 3 2 1

The above circuit(s)continue atthe address show n (#-XY).

# = SheetN um ber(1-5),X = C olum n G rid,Y = R ow G rid

D D

C C

B B

A A
Schem atic Set
Sheet1 of5
SIZE REV.

N O TES: D E

ALL R ESISTO R VALUES AR E IN O H M S (Ω ),1/4W ,5% ,U N LESS O TH ER W ISE SPEC IFIED .

ALL C APAC ITO R VALUES AR E IN M IC R O FAR AD S (µF ),U N LESS O TH ER W ISE SPEC IFIED . SPII/O Pow erD riverBoard

0.1 M IC R O FAR AD S (µF )BYPASS C APAC ITO R O N ALL IC ’S. SPIPartN º: 520-5137-01
Prepared By: C ES Inc.Edited By: SPIInc.
N on-TextD ocum ent
M odel: 237-0161-00 D ated: 09/05/97

4 3 2 1
 4 3 2 1
N O TES:

ALL R ESISTO R VALU ES AR E IN O H M S (Ω ),1/4W ,5% ,U N LESS O TH ER W ISE SPEC IFIED .

ALL C APAC ITO R VALU ES AR E IN M IC R O FAR AD S (µF ),U N LESS O TH ER W ISE SPEC IFIED .

0.1 M IC R O FAR AD S (µF )BYPASS C APAC ITO R O N ALL IC ’S.

D D

C C

B B

A A
Schem atic Set
Sheet2 of5
SIZE REV.
D E
SPII/O Pow erD riverBoard
SPIPartN º: 520-5137-01
The above circuit(s)continue atthe address show n (#-XY).
# = SheetN um ber(1-5),X = C olum n G rid,Y = R ow G rid Prepared By: C ES Inc.Edited By: SPIInc.
N on-TextD ocum ent
M odel: 237-0161-00 D ated: 09/05/97

4 3 2 1
 4 3 2 1
N O TES:

ALL R ESISTO R VALUES AR E IN O H M S (Ω ),1/4W ,5% ,U N LESS O TH ER W ISE SPEC IFIED .

ALL C APAC ITO R VALU ES AR E IN M IC R O FAR AD S (µF ),U N LESS O TH ER W ISE SPEC IFIED .

0.1 M IC R O FAR AD S (µF )BYPASS C APAC ITO R O N ALL IC ’S. JAN 2001 C uttrace on solderside atAux.O utPortJ2-PIN 1 thru J2-PIN 3 & J2-PIN 5 TS JET
thru J2-PIN 9; Soldered R esistor100Ω 1/4W 5% (SPIN º:121-5007-00). This
is an in-house m odification forgam es produced afterJan.1,2001.
M odification highlighted below atJ2 w ith a dotted-line box.

D D

C C

The below circuit(s)continue atthe address show n (#-XY).

# = SheetN um ber(1-5),X = C olum n G rid,Y = R ow G rid

B B

A A
Schem atic Set
Sheet3 of5
SIZE REV.
D E
SPII/O Pow erD riverBoard
SPIPartN º: 520-5137-01
Prepared By: C ES Inc.Edited By: SPIInc.
N on-TextD ocum ent
M odel: 237-0161-00 D ated: 09/05/97

4 3 2 1
 4 3 2 1

05-25-99 C U T PIN -3 TO G N D O N U 210 (4-3D )

N O TES:

ALL R ESISTO R VALU ES AR E IN O H M S (Ω ),1/4W ,5% ,U N LESS O TH ER W ISE SPEC IFIED .

ALL C APAC ITO R VALU ES AR E IN M IC R O FAR AD S (µF ),U N LESS O TH ER W ISE SPEC IFIED .

0.1 M IC R O FAR AD S (µF )BYPASS C APAC ITO R O N ALL IC ’S.

D D
The below circuit(s)continue atthe address show n (#-XY).
# = SheetN um ber(1-5),X = C olum n G rid,Y = R ow G rid

The above circuit(s)continue atthe address show n (#-XY).

# = SheetN um ber(1-5),X = C olum n G rid,Y = R ow G rid

The below circuit(s)continue atthe address show n (#-XY).

# = SheetN um ber(1-5),X = C olum n G rid,Y = R ow G rid

C C

The above circuit(s)continue atthe address show n (#-XY).

# = SheetN um ber(1-5),X = C olum n G rid,Y = R ow G rid

B B

A A
Schem atic Set
Sheet4 of5
SIZE REV.
D E
SPII/O Pow erD riverBoard
SPIPartN º: 520-5137-01
Prepared By: C ES Inc.Edited By: SPIInc.
N on-TextD ocum ent
M odel: 237-0161-00 D ated: 09/05/97

4 3 2 1
 4 3 2 1

D D

C C
The above circuit(s)continue atthe address show n (#-XY).
# = SheetN um ber(1-5),X = C olum n G rid,Y = R ow G rid

B B

N O TES:

ALL R ESISTO R VALU ES AR E IN O H M S (Ω ),1/4W ,5% ,U N LESS O TH ER W ISE SPEC IFIED .
A
ALL C APAC ITO R VALU ES AR E IN M IC R O FAR AD S (µF ),U N LESS O TH ER W ISE SPEC IFIED .

0.1 M IC R O FAR AD S (µF )BYPASS C APAC ITO R O N ALL IC ’S.
A
Schem atic Set
Sheet5 of5
SIZE REV.
D E
SPII/O Pow erD riverBoard
SPIPartN º: 520-5137-01
Prepared By: C ES Inc.Edited By: SPIInc.
N on-TextD ocum ent
M odel: 237-0161-00 D ated: 09/05/97

4 3 2 1
LED

LED

TEST •

TEST • LED s
I/O Power Driver Board Parts
ITEM Q TY PA R T N U M B ER R EF-D ESIG N A TO R D ESC R IPTIO N (NS = Not Stuffed)
---- 1 520-5137-64 I/O Pow er D river B oard (IT M odified, See N ote B elow ) C om plete PC B A ssem bly
1 0 125-5027-00 C 255>C 262,C 271>C 278 N otStuffed 0.1uF,(104),100v,Cap.
2 22 125-5028-00 C 212>C 219,C 228>C 237,C 243>C 246 (C 204-C 211 N S) 470pF,(471),AxialC ap.
3 16 125-5029-00 C 247>C 254,C 263>C 270 0.01uF,(103),100v C ap.
4 13 125-5030-00 C 7 C 8 C 9 C 10 C 11 C 12 C 13 C 1 C 2 C 3 C 4 C 5 C 6 220pF,(221),C ap.
5 0 n/a (C 220>C 227 N S)
6 17 125-5031-00 C 35>C 43,C 45,C 46,C 200,C 238>C 242 0.1uF,(104),C ap.
7 16 110-0106-00 Q 1>Q 16 20N10L STP,Transistor
8 32 121-5042-00 R 1>R 16,R 200>R 215 22K Ω 1/4W R es.
9 16 121-5003-00 R 17>R 32 620 Ω 1/4W R es.
10 17 121-5045-00 R 33>R 42,R 236>R 242 39K Ω 1/4W R es.
11 13 121-5007-00 R 64>R 76 J2-P1>J2-P3,J2-P5>J2-P9 100 Ω 1/4W R es.
12 8 121-5029-00 R 90,R 92,R 94,R 96,R 98,R 100,R 102,R 104 6.8K Ω 1/4W R es.
13 1 121-5030-00 R 115 120 Ω 1/4W R es.
14 0 n/a R 220>R 227
15 9 121-5009-00 (R 228>R 235 N S)R 245>R 251,R 254,R 302 1K Ω 1/4W R es.
16 8 121-5032-00 R 261>R 268 47K Ω 1/4W R es.
17 2 121-5033-00 R 114,R 269 220 Ω 1/4W R es.
18 8 121-5021-00 R 49,R 57>R 61,R 252,R 253,R 256,R 270 4.7K Ω 1/4W R es.
19 11 121-5011-00 R 50>R 56,R 255,R 271,R 300 (R 252 N S) 10K Ω 1/4W R es.
20 2 121-5036-00 R 117,R 272 330 Ω 1/4W R es.
21 8 100-5012-00 U 1>U 4,U 6,U 18,U 201,U 206 (U 200:N S) 74H C T273
22 1 n/a R ESET n/a
23 1 121-5009-00 R 219 1K Ω 1/4W R es.
24 2 121-5038-00 R 216,R 218 1.5K Ω 1/2W R es.
25 7 200-5000-01 F7>F9,F24>F27 5A 250v S.B.Fuse
26 1 200-5000-03 F6 7A 250v S.B.Fuse
27 1 200-5000-06 F23 4A 250v S.B.Fuse
28 1 200-5000-05 F22 8A 250v S.B.Fuse
29 3 200-5000-08 F20,F21,F28 3A 250v S.B.Fuse
30 1 045-5013-00 J15 9PKK156 (PIN 5=KEY)
31 1 045-5016-00 J16 15PKK156
32 1 100-5023-00 U 210 D S1232
33 1 110-0069-00 Q 200 2N 3904,Transistor.
34 1 125-5032-00 C 32 100uF,25v,R adialLytic C ap.
35 1 045-5015-01 J1 20-Pin,0.1 D ualR ow H eader
36 1 100-0338-00 U 203 (U 202:N S) 74H C 245
37 10 110-0088-00 Q 33>Q 42 19N06L STP,Transistor
38 6 165-5099-00 L2,L200>L204 LED T1-3/4 D IFFU SER LED
39 1 045-5014-01 J2 10PKK156 (PIN 4=KEY)
40 1 121-5039-00 R 116 50 Ω Pot
41 16 110-0067-00 Q 17>Q 32 TIP122
42 1 125-5033-00 C 25 100uF,150v,R adialLytic C ap.
43 1 110-0058-00 U9 74LS245
44 1 125-5034-00 C 29 4700uF,35v,R adialLytic C ap.
45 1 190-5002-00 R ELAY FR L264D 024/02C K R elay
46 0 n/a J5 (J5:N S)
47 1 100-0037-00 U 209 74LS74
48 0 n/a J4 (J4:N S)
49 2 100-0148-00 U 204,U 205 74LS138
50 1 125-5035-00 C 26 .1U F,500v,C eram ic D isk C ap.
51 1 100-0356-00 U 19 LM 338K
52 5 112-5000-00 BR D G 1,BR D G 2,BR D G 3,BR D G 20,BR D G 21 D B3501
53 5 125-5036-00 C 27,C 30,C 201>C 203 15000uF,25v,R adialLytic C ap.
54 25 112-0054-00 D 200>D 215,D 220>D 227 1N 4148,D iode
55 2 112-5003-00 D 217,D 229 (D 216:N S) 1N 4004,D iode
56 2 n/a TPL1,TPL3 TestPointW ire (24ga.)Loops
57 1 045-5014-01 J7 10PKK156 (PIN 5=KEY)
58 1 045-5014-01 J6 10PKK156 (PIN 9=KEY)
59 8 110-0089-00 U 10>U 17 VN 02N
60 1 045-0014-03 J11 10-84-4030 (3 PIN M O LEX)
61 1 045-5015-00 J12 12PKK156 (PIN 7=KEY)
62 1 045-0014-09 J17 10-84-4090 (9 PIN M O LEX)
63 1 n/a BLAN KIN G TestPoint-D o N otStuff
64 1 121-5050-00 R 217 4.7K Ω 2W R es.(SAN D BAR )
65 1 045-5014-01 J13 10PKK156 (PIN 2=KEY)
66 1 045-0014-06 J14 10-84-4060 (6 PIN M O LEX)
67 1 045-5014-01 J10 10PKK156 (PIN 6=KEY)
68 1 045-5015-00 J3 12PKK156 (PIN 8=KEY)
69 1 045-5013-00 J9 9PKK156 (PIN 3=KEY)
70 1 045-5013-00 J8 9PKK156 (PIN 2=KEY)
71 26 205-0004-00 F6>F9,F20>F28 Fuse C lips
72 1 n/a U 19 H eatsink (5v R eg.)
I/O Power Driver Board Theory of Operation

5v Supply:
An AC voltage ofapproxim ately 9v com es into the board at[J17-(1-4)]this AC voltage is then full-w ave rectified
by bridge B R D G 21 and filtered by C apacitor C 203. The resulting voltage is 11v D C w hich is inserted into a linear
voltage regulator for the outputof5v D C . This 5v regulated voltage can be adjusted by potentiom eterR 116 the
voltage should be setto 5.00v. Besides pow ering the I/O Board the regulated 5 volts supplies pow er to the C PU /
Sound Board, G as Plasm a (D ot M atrix) D isplay and Plasm a (D isplay) C ontroller Board. Pow er for these devices
com es offthe I/O Board on [J16-(4-8)].

+5v,+20v,+50v,+18v,& +12v LED Indicators:

These D C voltages are derived on the I/O Board by LED SUPPLY VOLTAGE
rectification and filtering. Each has a LED indicating that L2 +5
pow er is being supplied to each of these voltage sources. L200 +20v
The -12v supply com es from the sam e transform er w inding
as the +12v thus itdoes nothave a LED indicator. L201 +50v
L202 +18v
** N ote thatthe +50v & +20v pow ersources are turned off L203 +12v
by the Interlock Sw itches w hen the C oin D ooris O PEN .
R eset C ircuitry:
The I/O w illresetin three (3)cases:
1. The C PU is in reset. The C PU ’s resetsignalis fed into the I/O through connector J1 and forces
the I/O into reset.
2. The 5v supply has fallen below 4.75v.
3. The w atchdog is notbeing fed by the scanning ofthe lightm atrix. M ore specifically Pin-19 ofU 6
m ust be toggling once every 50m s to prevent the w atchdog from resetting. The scanning ofthe
light m atrix is controlled by the C PU through J1.
LED L204 show s the resetstate ofthe I/O Board. Ifthis LED is notliteither the 5v D C is below 4.75v or the
C PU /Sound Board is holding the I/O in reset. Ifthe LED is flashing this m eans thatthe w atchdog is notbeing feed
by the C PU /Sound Board and the I/O is oscillating into and out of reset. Ifthe LED is continuously on the board is
out of reset and com m unication from the C PU to the lam p m atrix is confirm ed. TestpointBlanking is the actual
reset signalon the I/O Board.A low voltage indicates thatitis in resetthis w illturn offallSolenoid (C oil) D rivers,
Flash Lam ps, Lam p M atrix D rivers, Auxiliary O utputs and Flipper O utputs. A high voltage indicates thatitis outof
reset and norm aloperation can take place.

A ddress D ecoding:
AllAddress decoding is done by tw o 74LS138 (3 of8 decoder). Both ofthese m ustbe in operation for the I/O
Board to function properly.

Solenoid (C oil) D rivers & Flash Lam ps:

J8 & J9 are high side drivers for driving solenoids and other heavy loads. Each connector has its ow n buffer
driving 8 drivers. J8 & J9 consist of M O SFET D rivers 20N 10L w hich can easily & safely be tested by clipping one
end ofa clip-lead to testpointFET TPL1 and then the other to the corresponding gate resistor R 1-R 16 (see N ote
1).This w illapply 3.4v to the gate ofthe M O SFET Transistor thus sw itching iton. J7 & J6 each are a bank of8
low side driver for driving lam ps or other low er current solenoids (coils). They use a Bipolar Pow erTransistor
TIP122 w hich can also be tested by using TEST PO IN T TIP TPL3 and the corresponding resistors R 17-R 32*
(see N ote 1).

N ote 1 * C lip on the resistorside w ith the w hite stripe. ** R 1 controls Q 1 and R 2 controls Q etc...

A uxiliary In & O ut:

J2-8 C M O S O utputs som etim es used for a printer interface.
J3-8 C M O S Inputs general purpose inputs.

Lam p M atrix:
J12 has 10 low side drivers for the lam p strobes w hich consist of 19N 06L M O SFETS. O nly one lam p strobe
should be low atany tim e. Again the scanning of the lam p strobes keeps the I/O from resetting.J13 has 8 high
side drivers w ith each having a status indicator. Allthe status indicators are logically ’O R ’ed together and fed back
to the C PU /Sound Board. The status can identify open loads (for exam ple open lam p filam ents or interm ittent
connections) and short circuits. These drivers are also short-circuit protected.

G eneral Illum ination (G .I.) Lights:

J15 has 6v AC sw itched on & offby a relay on the I/O Board. The relay is controlled by Q 200 w hich supplies
pow er to the 24v coilw inding to activate the relay.There are 4 taps on J15 each fused at5A for this 6v AC source.