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CE802: Advance Computer Architecture

This document provides information about the course CE802: Advance Computer Architecture. It includes details like the teaching scheme, examination scheme, topics to be covered, reference books, and practical list. The topics include fundamentals of digital systems, instruction pipelining techniques, computer arithmetic principles, storage and memory hierarchies, instruction level parallelism, vector processors, parallel computer models, multiprocessor architectures and programming. The reference books listed are by authors like Hennessy and Patterson, Flynn, Jain and Briggs, Rajaraman, and Sima. The practical list involves implementing algorithms like Booth multiplication, addition/subtraction with signed magnitude, division for fixed point and floating point numbers. It also includes sim

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pavan_25
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66 views

CE802: Advance Computer Architecture

This document provides information about the course CE802: Advance Computer Architecture. It includes details like the teaching scheme, examination scheme, topics to be covered, reference books, and practical list. The topics include fundamentals of digital systems, instruction pipelining techniques, computer arithmetic principles, storage and memory hierarchies, instruction level parallelism, vector processors, parallel computer models, multiprocessor architectures and programming. The reference books listed are by authors like Hennessy and Patterson, Flynn, Jain and Briggs, Rajaraman, and Sima. The practical list involves implementing algorithms like Booth multiplication, addition/subtraction with signed magnitude, division for fixed point and floating point numbers. It also includes sim

Uploaded by

pavan_25
Copyright
© © All Rights Reserved
Available Formats
Download as DOC, PDF, TXT or read online on Scribd
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CE802: Advance Computer Architecture

Subject Code Teaching


Scheme
Examination Scheme
Elective
CE
802
Theory Lab/
Pract
Exam Theory
Paper
Theory
ar!"
Pract T# Total
0$ 02 %niver"ity & 'r (00 2) 2) ()0
Sr. No. Topic Name Book
Reference
Chapter*
!ntroduction and revie" #. #orri$
#ano %Refer
'enne""ey *
+,-,
Patter"on.
Chpater&
/undamental" o0 digital "y"tem and 1evie2
2 'ipe(inin)
Linear Pipeline proce""or3 4onlinear pipeline proce""or5
in"truction pipeline de"ign5 echani"m" 0or in"truction
pipelining5 dynamic in"truction "cheduling5 6ranch
handling techni7ue"5 arithmetic pipelining de"ign3
Computer arithmetic principle"5 "tatic arithmetic pipeline"5
multi0unction arithmetic pipeline"
*ai +"an)
ACA
Chapter & ,
- Stora)e and memor. hierarch.
1egi"ter 0ile5 8irtual 0ile5 Cache memorie"5 cache memory
2or!ing principle"5 cache coherence i""ue"5 cache
per0ormance analy"i",
/anie( Ta0ak Chpater&1
'igh band2idth memorie",
1 !n$truction (eve( para((e(i$m
Super9"calar proce""or" 2.
Ra3araman
Chpater&-
8L:# architecture /. Sima
4 'ara((e( computer mode($ and pro)ram para((e(i$m
Cla""i0ication o0 machine"5 S:S+5 S:+ and :+ !nternet !nternet
Condition" o0 paralleli"m5 data and re"ource dependencie"5
hard2are and "o0t2are paralleli"m5 program partitioning
and "cheduling5 grain "i;e latency5 program 0lo2
mechani"m5 control 0lo2 ver"u" data 0lo25 data 0lo2
architecture5 demand driven mechani"m"5 compari"on o0
0lo2 mechani"m"
*ai +"an)
ACA
Chapter&2
, 2ector 'roce$$or and $.nchronou$ para((e( proce$$in)
8ector in"truction type"5 vector9acce"" memory "cheme" *ai +"an)
ACA
Chpater&8
vector and "ymbolic proce""or"
S:+ architecture and programming principle"3 S:+
parallel algorithm"5 S:+ computer" and per0ormance
enhancement
5 S.$tem !nterconnect architecture
4et2or! propertie" and routing5 "tatic interconnection
net2or!"5 +ynamic interconnection net2or!"
*ai +"an)
ACA
Chpater&2
multiproce""or "y"tem interconnect"3 'ierarchical bu"
"y"tem5 cro""bar "2itch and multi9port memory5
multi"tage and combining net2or!
2.
Ra3araman
Chapter&1
0 #u(tiproce$$or architecture and pro)rammin)
/unctional "tructure5 :nterconnection net2or!5 Parallel
memory organi;ation5 ultiproce""or operating "y"tem5
Exploiting concurrency 0or multiproce""or
*ai +"na)
Comp Arch
6 ''
Chapter&7
* #entioned chapter num0er i$ in "hich one can )et topic$ a$ per $.((a0u$. !t doe$n8t mean
fu(( chapter.
TE9T B::*:
(, 'enne""ey * +,-, Patter"on5 <Computer architecture3 - 7uantitative approach=5
:nternational "tudent edition5 &
rd
edition5 20025 organ !au0maan publi"her,
2, ichael >, /lynn5= Computer -rchitecture3 Pipelined and parallel proce""or de"ign=5
(??)5 >one" and barlett5 6o"ton,
&, @ai 'a2ang and /aye -, 6rigg"5 < Computer architecture and parallel proce""ing=5
:nternational edition5 (??&5 T'
Reference Book:
(, 1,@, Aho"e5 1ajan oona * Phal0ui Aupta5 </oundation o0 parallel proce""ing=B 4aro"a
publication
2, +, Sima5 T, /ountain5 P, @a"u!5 < -dvanced computer architecture C - de"ign "pace
approach=5 (??D5 -ddi"on #e"ley
:ther Su))e$ted Book
(, 8, 1ajaraman5 Siva 1am urthyB <Parallel Computer"3 -rchitecture and Programming=B
P': Publiciation, 200
2, @ai 'a2angB= -dvanced Computer -rchitecture3 Paralleli"m5 Scalability5
Programmability= B T'B :nternaational Edition (??&
&, +enial Taba!B <-dvanced icroproce""or"=
$, , orri" ano5 <Computer Sy"tem -rchitecture=5 Third EditionB P': Publication5 (??&
CE802: Advance Computer Architecture
'ractica( ;i$t: 8
th
Seme$ter
Sr. No. Tit(e
!mp(ement Booth mu(tip(ication a()orithm. %<i=ed point>
2 !mp(ement addition and $u0traction "ith Si)ned ma)nitude data. %<i=ed point>
- !mp(ement /ivi$ion a()orithm for fi=ed point 0inar. num0er$. %<i=ed point>
1 !mp(ement Booth mu(tip(ication a()orithm. %<(oatin) 'oint>
4 !mp(ement addition and $u0traction "ith Si)ned ma)nitude data. %<(oatin) 'oint>
, !mp(ement /ivi$ion a()orithm for fi=ed point 0inar. num0er$. %<(oatin) 'oint>
7 Simu(ate inte)er addition in ?in/;9.
8 Simu(ate f(oatin) point mu(tip(ication in ?in/;9.
5 Simu(ate inter)er num0er to f(oatin) point num0er and perform arithmetic
operation in ?in/;9.
0 Simu(ate (oopin) operation in ?in/;9

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