Application Report

SPNA123July 2010
Generating Operating System Tick Using RTI on a
Hercules ARM Safety Microcontroller
Hari Udayakumar ............................................................................................................................
ABSTRACT
The purpose of this application report is to provide help for setting up the RTI Module of Hercules Safety
Microcontrollers. The Hercules family of microcontrollers from Texas Instruments is a family of 32-bit RISC
microcontrollers with an advanced safety architecture and a rich peripheral set.
Contents
1 Introduction .................................................................................................................. 2
2 Operating System Tick Generation ....................................................................................... 3
Appendix A Software Listing .................................................................................................... 9
List of Figures
1 RTI Module Block Diagram................................................................................................ 2
2 RTI Counter Block (x) Diagram ........................................................................................... 3
3 Operating System Tick Generation Block Diagram .................................................................... 3
4 RTI Clock Source Selection and Pre-Scaling ........................................................................... 4
5 Operating System Tick Output Waveform............................................................................... 5
6 Software Flow Diagram .................................................................................................... 6
7 Output Waveform ........................................................................................................... 7
Hercules is a trademark of Texas Instruments.
ARM is a trademark of ARM Limited.
All other trademarks are the property of their respective owners.
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RTICLK
RTICLK
FlexRay Macrotick (NTU0)
FlexRay Start of Cycle (NTU1)
Counter Block 0
64-bit
incl. FlexRay Feature
Counter Block 1
64-bit
Event0
VIM REQ[2]
DMA REQ[12]
Event1
VIM REQ[3]
DMA REQ[13]
Event2
VIM REQ[4]
DMA REQ[18]
Event3
VIM REQ[5]
DMA REQ[19]
32
32
32
32
32
32
Compare Unit
Capture Feature
Capture Feature
NTU2
NTU3
Introduction www.ti.com
1 Introduction
1.1 Real Time Interrupt
The Real Time Interrupt Module (RTI) provides timer functionality for operating systems and for
benchmarking code. The module incorporates multiple counters, which define the timebases needed for
scheduling in the operating system.
This document needs to be referenced along with the Hercules Safety MCU (RM4x, TMS570LS31x/21x,
TMS570LS20x/10x, TMS470M) RTI Users Guide found in the the appropriate Technical Reference
Manual.
Main Features
Up to two independent counter blocks for generating different timebases. Each block consists of:
One 32-bit prescale counter
One 32-bit free running counter
Up to two time stamp (capture) functions for system or peripheral interrupts, one for each counter block
Free running counter 0 can be incremented by either the internal prescale counter or by an external
event (for application synchronization to FlexRay network including clock supervision)
Optional External Clock supervising circuit to switch to internal prescale counter 0, if external clock
source fails to increment in a predefined window
Four configurable compare registers for generating operating system ticks or DMA requests. Each
event can be driven by either counter block 0 or counter block 1
Automatic update of all compare registers on compare match to generate periodic interrupts
Fast enabling/disabling of interrupts
RTI clock input derived from any of the available clock sources, selectable in the System Module
1.2 RTI Module Block Diagram
Figure 1. RTI Module Block Diagram
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0 :
32
2
! 0 :
1
RTICLK
If CPUx FRCx
RTICLK
If CPUx FRCx
CPUCx
= =
= =
+
INT_Req
or
DMA_Req
RTICLK
RTIUPCx
RTICPUCx
RTIFRCx
RTICOMPx
RTI 64-Bit Counter Block (x)
RTICAUCx RTICAFRCx
GIOA [ 2]
GIOA [1]
GIOA [ 0]
1ms
10ms
5ms
OS
Task 1
control block
Task 2
control block
Task 3
control block
Real Time
Interrupt
www.ti.com Operating System Tick Generation
1.3 RTI Counter Block (x) Diagram
Figure 2 shows the simplified block diagram of the RTI Counter Block (x). The RTICLK is prescaled by 32
bit RTIUPCx Counter. The RTIUPCx Counter counts up until the compare value in the RTICPUCx register
is reached. When the compare matches, RTIFRCx counter is incremented.
(1)
Figure 2. RTI Counter Block (x) Diagram
2 Operating System Tick Generation
This section describes how to use the RTI Module to generate Operating system tick interrupts with
tunable period. Three compare interrupts are used to generate the required Operating system tick and the
corresponding task is carried out. To visualize the task call, individual I/O pins are toggled in the example
code. This application report shows how to configure three different interrupts to trigger tasks with different
timebases.
2.1 Flow Diagram
Figure 3 shows how the RTI Module triggers tasks with different timebases using interrupts.
Compare 0 Interrupt Task1 (GIO- PortA [0] Pin Toggle) - 10mS.
Compare 1 Interrupt Task2 (GIO- PortA [1] Pin Toggle) - 5mS.
Compare 2 Interrupt Task3 (GIO- PortA [2] Pin Toggle) - 1mS.
Figure 3. Operating System Tick Generation Block Diagram
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RTICLK
RTIx
SRC
[3:0]
RTICLKSRC Reg
RTIxDIV [3:0] RTIUPCx RTIFRCx
RTICPUC
DiffClk
Sources
8
8
0 4
0 1 1 1
1 1
0.25
0 4
RITCLK VCLK MHz
RTICLK MHz
FRC CLK MHz
CPUC
Tcount s
FRC CLK MHz
m
= =
= = =
+ +
= = =
1 10
0 ( 1) 40000
0.25
2 5
1 ( 2) 20000
0.25
3 1
2 ( 3) 4000
0.25
T period ms
Compare Count Value Task
Tcount s
T period ms
Compare Count Value Task
Tcount S
T period ms
Compare Count Value Task
Tcount S
m
m
m
= = =
= = =
= = =
Operating System Tick Generation www.ti.com
2.2 Frequency and Tcount Calculation
The RTICLK to the counter block can be programmed using the RTICLKSRC register in the system
module according to the application requirements. If RTICLK source is anything other than VCLK, then it
needs to be at least three times slower than the VCLK. This can be achieved by configuring the RTIxDIV
bits in RTICLKSRC register. Figure 4 shows RTICLK selection and pre-scaling using RTICLKSRC register
and RTICPUCx register.
Figure 4. RTI Clock Source Selection and Pre-Scaling
In the following example, the RTICLK is pre-scaledby 2 using the RTICPUCx Register. For more
information, see Section 1.3.
(2)
2.3 Compare Count Value Calculation
The Count values for the Compare register to generate Periodic Operating system tick is calculated with
the knowledge of Tcount Period. The RTICLK is pre-scaled by the UP Counter (x) Register and fed to the
respective Free Running (x) counter.
Task1 = T1period = 10ms
Task2 = T2period = 5ms
Task3 = T3period = 1ms
In the following example, interrupts (INT0, INT1, and INT2) are used for the generation for period system
tick.
(3)
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www.ti.com Operating System Tick Generation
2.4 Operating System Tick Output Waveform
Figure 5. Operating System Tick Output Waveform
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2
HCLK OSCIN
HCLK
VCLK
RTICLK VCLK
=
=
=
o
o
o
Start
Select RTI CLK
source
Configure UCx,
CPUCx, FRCx
Configure GIOA,
COMPx Reg and
UDCOMPx Reg
Enable the interrupt
Enable RTI
Counter Block
Check for Interrupt
Task 1 ISR Task 2 ISR Task 3 ISR
Clear INT0
interrupt
Clear INT1
interrupt
Clear INT2
interrupt
Toggle GIOA
[0]
Toggle GIOA
[1]
Toggle GIOA
[2]
Operating System Tick Generation www.ti.com
2.5 Configuration for Generating Operating System Tick
Select VCLK using RTI clock source using RTICLKSRC register in system module.
Select the following Clock Configurations.
(4)
Configure RTICOMP(x) register and the respective Update RTIUDCP(x) Register to initialize with the
Compare (x) count Values.
Configure the GIO Port A as output port.
Configure RTI module Interrupt i.e. RTISETINT and Status Register i.e. RTIINTFLAG.
Pending interrupts are cleared.
Compare 0, Compare 1 and Compare 2 interrupt are enabled.
Configure Compare 0 Interrupt ISR to do the following:
Comp0 interrupt flag is cleared by writing 1 to INT0 bit in RTIINTFLAG register.
Toggle GIO Port A Pin 0
Configure Compare 1 Interrupt ISR to do the following:
Comp1 interrupt flag is cleared by writing 1 to INT1 bit in RTIINTFLAG register.
Toggle GIO Port A Pin 1
Configure Compare 2 Interrupt ISR to do the following:
Comp2 interrupt flag is cleared by writing 1 to INT2 bit in RTIINTFLAG register.
Toggle GIO Port A Pin 2
2.6 Software Flow
Figure 6. Software Flow Diagram
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www.ti.com Operating System Tick Generation
2.7 Captured Output Waveform
Figure 7. Output Waveform
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www.ti.com Appendix A
Appendix A Software Listing
/***********************************************************************************************
***/
/* file:RTI1_OST.c */
/* */
/* RTI generates Periodic operating system tick using compare interrupts */
/* */
/* Purposes: Generate periodic operating system tick using compare interrupts */
/* Conditions: PowerOnReset must be applied prior to run test */
/* */
/***********************************************************************************************
***/
#include "rti.h"
#include "vim.h"
#include "pcr.h"
#include "system.h"
#include "swi_util.h"
#include "device.h"
#include "module.h"
#include "gio470.h"
SYSTEM_ST *SYS_Ptr = (SYSTEM_ST *) SYSTEM ;
PCR_ST *PCR_Ptr = (PCR_ST *) PCR;
VIM_ST *VIM_Ptr = (VIM_ST *) VIM;
VIM_RAM_ST *VIM_RAM_Ptr = (VIM_RAM_ST *) VIM_RAM;
RTI_ST *RTI_Ptr = (RTI_ST *) RTI;
GIO_ST *GIO_Ptr = (GIO_ST *) GIO1;
#define TASK1 40000
#define TASK2 20000
#define TASK3 4000
#define END_VALUE 5000
main()
{
/*********************************** VIM
Initialization******************************************/
VIM_RAM_Init(); //VIM initialization
RTI_irq_int_enable(); //Enabling the RTI Interrupts in VIM
swi_enable_irq() ; //Int_irq_enable Enable only IRQ
/*********************************** GIO PortA
Initialization*************************************/
GIO_Ptr->Gcr0_UN.Gcr0_ST.Reset_B1=1; //enabling GIO
GIO_Ptr->Port_ST[0].Dir_UL=0x07; //PortA.0,1,2 has output
GIO_Ptr->Port_ST[0].Dout_UL=0x00;
/**********************************RTI Clk Source
Initialization**********************************/
SYS_Ptr->RCLKSRC_UN.RCLKSRC_ST.RTI1SRC_B4 = 8; //clock source 8 i.e VClk
SYS_Ptr->RCLKSRC_UN.RCLKSRC_ST.RTI1DIV_B2 = 0; //div the clk source 0 by 1
/***********************************RTI
Initialization********************************************/
RTI_Ptr->RTIGCTRL_UN.RTIGCTRL_UL= 0x00000000; //Disable RTIUC0 and RTIUC1
RTI_Ptr->RTIUC0_UL= 0x00000000; //Initialize up Counter
RTI_Ptr->RTIFRC0_UL= 0x00000000; //Initialize Free Running Counter
RTI_Ptr->RTICPUC0_UL= 0x00000001; //Set Compare Up Counter value to Prescale RTICLK.
/**********************************TASK
Initialization********************************************/
RTI_Ptr->RTICOMP0_UL = TASK1;
RTI_Ptr->RTIUDCP0_UL = TASK1;
RTI_Ptr->RTICOMP1_UL = TASK2;
RTI_Ptr->RTIUDCP1_UL = TASK2;
RTI_Ptr->RTICOMP2_UL = TASK3;
RTI_Ptr->RTIUDCP2_UL = TASK3;
RTI_Ptr->RTIINTFLAG_UN.RTIINTFLAG_UL = 0x0000000F; //Clearing the pending Interrupts Flags
RTI_Ptr->RTICOMPCTRL_UN.RTICOMPCTRL_UL = 0x00000000; //Initializing the Compare Counter
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Appendix A www.ti.com
register
RTI_Ptr->RTISETINT_UN.RTISETINT_UL = 0x00000007; //enabling RTI Interrupt in RTI
RTI_Ptr->RTIGCTRL_UN.RTIGCTRL_UL = 0x00000001; //Enable the RTIUC0
/********************************************Infinite
loop***************************************/
while(1);
}
/***********************************************ISR.c*******************************************
****/
#include "rti.h"
#include "vim.h"
#include "gio470.h"
#pragma INTERRUPT (Compare0_Handler, IRQ)
#pragma INTERRUPT (Compare1_Handler, IRQ)
#pragma INTERRUPT (Compare2_Handler, IRQ)
void Compare0_Handler(void);
void Compare1_Handler(void);
void Compare2_Handler(void);
void Compare0_Handler(void)
{
RTI_Ptr->RTIINTFLAG_UN.RTIINTFLAG_UL= 0x00000001; //Clearing the Interrupt Flag 0
GIO_Ptr->Port_ST[0].Dout_UL ^= 0x01; //Toggling the GIOA[0] Port
}
void Compare1_Handler(void)
{
RTI_Ptr->RTIINTFLAG_UN.RTIINTFLAG_UL= 0x00000002; //Clearing the Interrupt Flag 1
GIO_Ptr->Port_ST[0].Dout_UL ^= 0x02; //Toggling the GIOA[1] Port
}
void Compare2_Handler(void)
{
RTI_Ptr->RTIINTFLAG_UN.RTIINTFLAG_UL= 0x00000004; //Clearing the Interrupt Flag 2
GIO_Ptr->Port_ST[0].Dout_UL ^= 0x04; //Toggling the GIOA[2] Port
}
/***********************************************END*********************************************
**/
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