Ramakrishna Venigalla

G/2, Rajendra Apts,

#5, Vathiar Thottam Main Rd,
Kodambakkam, Chennai 600024, TN, INDIA
Email: [email protected]
Phone (Mobile): (091)988402-6407

Objective
Seeking a full time position in the field of Analog / Mixed Signal IC Design

Profile
Experience in RF & Microwave IC Design and Analog/Mixed Signal VLSI Design using CADENCE tools
Hands on experience using MATLAB and other software packages and also with programming languages
Good team player with excellent communication skills. Flexibility to adapt to new situations

Education
Master of Science in Electrical & Computer Engineering,
University Of Florida, Gainesville.
May 2003
G.P.A: 3.81 / 4.00
Bachelor of Engineering in Electronics and Communication Engineering,
Bharathidasan University, Tiruchirapalli, INDIA.
Jun 2000
G.P.A: 3.85 / 4.00


Research & Industrial Experience
Graduate Research Assistant, Univ. of Florida, Gainesville, FL (Jan01-May03)
o Design of Externally Digital CMOS Potentiostats and A / D Converters
Intern, IBM Microelectronics, East Fishkill, NY (May01-Aug01)
o Delta-Sigma A/D Converter for a RF Transceiver
Intern, American Megatrends, Chennai, India (Jan00May00)
o Developed software for local intranet AMI Netz, using HTML, Javascript, JSP, JDBC & SQL
Intern, Indian Institute of Science , Bangalore, India (Nov98Dec98)
o Implemented a 32-bit ALU processor using VHDL

Relevant Design experience
Low Noise Amplifier
3GPP Standard Turbo Encoder
32-bit SRAM
Digital Counters
Op-Amp with Wide Swing Current Mirrors
Second Order Gm-C Band-Pass filter
All-Pass Switched Capacitor filter

Relevant Course Work
VLSI Circuits & Tech. (Dr. Kenneth. K. O) RF Microelectronics (Dr. Kenneth. K. O)
Advanced VLSI (Dr. W.R. Eisenstadt) Microwave IC Design (Dr. Kenneth. K. O)
MOS Analog IC Design (Dr. R.M.Fox) Bipolar Circuits (Dr. W.R. Eisenstadt)
Analog Signal Processing (Dr. John G. Harris) Digital Signal Processing (Dr. Fred J. Taylor)

ComputerSkills
Simulation Packages Cadence IC Design Tools, PSPICE, MATLAB, LABVIEW
Operating Systems MS-DOS, WINDOWS-NT/2000/98, AIX, UNIX
Programming Languages C, C++, JAVA, HTML, JavaScript, JSP, JDBC, SQL, PERL

Honors and Achievements
Recipient of Merit scholarship for outstanding academic performance during undergraduate study
Ranked among the top 3% in the university in my undergraduate study
Ranked 2915 in the IIT JEE 96 exam taken up by over 150,000 students in India
Active participant in the organization of Rendezvous a national-level, inter-collegiate technical
symposium

Project Description
Low Noise Amplifier: A Low Noise Amplifier (LNA) with the resonant frequency of 1.8GHz, G
T
>15dB,
IIP
3
> -15dB and Noise Figure < 2dB was designed and laid out with Cadence design tools. MATLAB
was used to get the initial values of components. The initial values were then used to simulate the circuit
in SpectreRF and were further changed in increments till all the specifications were met.
http://us.share.geocities.com/venigal_ram/Projects/microwave_report.pdf
Delta-Sigma A/D Modulator: A fourth order Delta-Sigma Modulator with a 2 by 2 MASH architecture
was designed and simulated to be a part of a RF transceiver. Mathematical models were first made and
simulated using MATLAB and the circuit simulations were done using Spectre. 0.12m IBM CMOS
technology files were used.
http://www.geocities.com/venigal_ram/Projects/Report.pdf
3GPP Standard Turbo Encoder: A Programmable Variable Rate Turbo Encoder (AMV6323) was
designed, simulated and laid out using 0.5m CMOS Technology. The Turbo Codes are the latest in FEC
codes and have been specified in 3GPP (WCDMA) and 3GPP2 (CDMA 2000) standards. Simulations
were done using Spectre and the circuit was laid out with Virtuoso layout editor. The schematic and
layout were verified using LVS and DRC checks.
http://www.geocities.com/venigal_ram/Projects/AMV6323.pdf
Time Based Measurement Technique for a 2-Electrode Potentiostat: A time based measurement
technique for the measurement of current in an electrolytic solution was proposed. It incorporates the use
of a 2-electrode potentiostat. Simulations were done using Spectre to verify the validity of the technique
and the circuit was laid out using Virtuoso layout editor as part of this project. The schematic and layout
were verified using LVS and DRC checks.
http://us.share.geocities.com/venigal_ram/Projects/ASP_Report.pdf
32-bit ALU: A 32-bit ALU processor was designed with VHDL. Simulations were done using View
Logic and the synthesis was done using Ambits BuildGates synthesizer. The purpose of the project was
to get familiarized with VHDL simulators to help in the design of reconfigurable ATM Switches.
Digital Counters: A 3-bit digital up-down counter was designed. The main purpose of the project was to
determine the minimum number of transistors that need to be added for every additional bit of the counter.
The counter should be edge triggered and also stop counting once it reaches saturation.
http://us.share.geocities.com/venigal_ram/Projects/Counters_Indep_Study.pdf
SRAM: An SRAM with 9 words, 2-bit data bus and with a 3-pF load driving capability was designed and
laid out using 0.5m CMOS Technology. The feasibility for increasing the bus width to 4-bits and the
memory by up to 2.5X were also demonstrated. Simulations were done using Spectre and the circuit was
laid out with Virtuoso layout editor. The schematic and layout were verified using LVS and DRC checks.
Op-Amp: A Wide Swing Current Mirror Op-Amp was designed using PSPICE.
Second Order Gm-C Band-Pass filter: A Gm-C Band-Pass filter with electrically adjustable center
frequency and Q was designed and simulated in PSPICE. The purpose of the project was to demonstrate
the operation of a Gm-C filter and to assess the impact of mismatches of circuit components on the
performance of the filter.
All-Pass Switched Capacitor filter: An All-Pass Switched Capacitor filter was designed and simulated in
PSPICE. The effect of Op-Amp characteristics on the Switched Capacitor circuits was studied as a part of
the project.
AMI NetZ: Developed a commercial intranet software - AMI NetZ for American Megatrands Inc., India.
The front end user interface for the software was developed using HTML and Javascript , while the back
end was programmed using JSP and JDBC. Some of the features of the software included email,
workgroups, message boards, address book etc.

References
Dr. Kenneth K. O
Professor,
Electrical and Computer Engineering Dept,
University of Florida, Gainesville, FL.
E-mail: [email protected]
Dr. John G. Harris
Associate Professor,
Electrical and Computer Engineering Dept,
University of Florida, Gainesville, FL.
E-mail: [email protected]