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MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

MC14511B
BCD-To-Seven Segment
Latch/Decoder/Driver

L SUFFIX
CERAMIC
CASE 620

The MC14511B BCDtoseven segment latch/decoder/driver is


constructed with complementary MOS (CMOS) enhancement mode devices
and NPN bipolar output drivers in a single monolithic structure. The circuit
provides the functions of a 4bit storage latch, an 8421 BCDtoseven
segment decoder, and an output drive capability. Lamp test (LT), blanking
(BI), and latch enable (LE) inputs are used to test the display, to turnoff or
pulse modulate the brightness of the display, and to store a BCD code,
respectively. It can be used with sevensegment lightemitting diodes
(LED), incandescent, fluorescent, gas discharge, or liquid crystal readouts
either directly or indirectly.
Applications include instrument (e.g., counter, DVM, etc.) display driver,
computer/calculator display driver, cockpit display driver, and various clock,
watch, and timer uses.

P SUFFIX
PLASTIC
CASE 648
D SUFFIX
SOIC
CASE 751B
DW SUFFIX
SOIC
CASE 751G

Low Logic Circuit Power Dissipation


HighCurrent Sourcing Outputs (Up to 25 mA)
Latch Storage of Code
Blanking Input
Lamp Test Provision
Readout Blanking on all Illegal Input Combinations
Lamp Intensity Modulation Capability
Time Share (Multiplexing) Facility
Supply Voltage Range = 3.0 V to 18 V
Capable of Driving Two Lowpower TTL Loads, One Lowpower
Schottky TTL Load or Two HTL Loads Over the Rated Temperature
Range
Chip Complexity: 216 FETs or 54 Equivalent Gates
Triple Diode Protection on all Inputs

ORDERING INFORMATION
MC14XXXBCP
Plastic
MC14XXXBCL
Ceramic
MC14XXXBDW
SOIC
MC14XXXBD
SOIC
TA = 55 to 125C for all packages.

PIN ASSIGNMENT
B

16

VDD

Value

0.5 to + 18

0.5 to VDD + 0.5

10

TA

55 to + 125

PD

500

Tstg

65 to + 150

Maximum Output Drive Current


(Source) per Output

IOHmax

25

mA

Maximum Continuous Output Power


(Source) per Output

POHmax

12

11
10
9

b
c

f
e

VSS

_C

mW

Storage Temperature Range

_C

Power Dissipation per Package

13

mA

Operating Temperature Range

DC Current Drain per Input Pin

Vin

14

LE

Unit

VDD

15

BI

MAXIMUM RATINGS* (Voltages Referenced to VSS)


Symbol

LT

Rating

DC Supply Voltage

Input Voltage, All Inputs

DISPLAY

TRUTH TABLE
Inputs

Outputs

POHmax = IOH (VDD VOH)


* Maximum Ratings are those values beyond which damage to the device may occur.
Temperature Derating:
Plastic P and D/DW Packages: 7.0 mW/_C From 65_C To 125_C
Ceramic L Packages: 12 mW/_C From 100_C To 125_C

mW

50

LE BI LT

Blank

0
0
0
0

1
1
1
1

1
1
1
1

0
0
0
0

0
0
0
0

0
0
1
1

0
1
1
1

1
0
1
1

1
1
1
1

1
1
1
1

1
0
1
1

1
0
0
0

1
0
0
0

0
0
1
1

0
1
2
3

0
0
0
0

1
1
1
1

1
1
1
1

0
0
0
0

1
1
1
1

0
0
1
1

0
1
0
1

0
1
0
1

1
0
0
1

1
1
1
1

0
1
1
0

0
0
1
0

1
1
1
0

1
1
1
0

4
5
6
7

0
0
0
0

1
1
1
1

1
1
1
1

1
1
1
1

0
0
0
0

0
0
1
1

0
1
0
1

1
1
0
0

1
1
0
0

1
1
0
0

1
0
0
0

1
0
0
0

1
1
0
0

1
1
0
0

8
9
Blank
Blank

0
0
0
0

1
1
1
1

1
1
1
1

1
1
1
1

1
1
1
1

0
0
1
1

0
1
0
1

0
0
0
0

0
0
0
0

0
0
0
0

0
0
0
0

0
0
0
0

0
0
0
0

0
0
0
0

Blank
Blank
Blank
Blank

1 1 1
X
X
X
X
*
X = Dont Care
*Depends upon the BCD code previously applied when LE = 0

Display

REV 3
1/94

MOTOROLA CMOS LOGIC DATA


Motorola, Inc. 1995

MC14511B
361

ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS)


Characteristic

Output Voltage
Vin = VDD or 0

Symbol

55_C

25_C

125_C

VDD
Vdc

Min

Max

Min

Typ #

Max

Min

Max

Unit

0 Level

VOL

5.0
10
15

0.05
0.05
0.05

0
0
0

0.05
0.05
0.05

0.05
0.05
0.05

Vdc

1 Level

VOH

5.0
10
15

4.1
9.1
14.1

4.1
9.1
14.1

4.57
9.58
14.59

4.1
9.1
14.1

Vdc

5.0
10
15

1.5
3.0
4.0

2.25
4.50
6.75

1.5
3.0
4.0

1.5
3.0
4.0

5.0
10
15

3.5
7.0
11

3.5
7.0
11

2.75
5.50
8.25

3.5
7.0
11

5.0

4.1

3.9

3.4

4.1

3.9

3.4

4.57
4.24
4.12
3.94
3.70
3.54

4.1

3.5

3.0

(IOH = 0 mA)
(IOH = 5.0 mA)
(IOH = 10 mA)
(IOH = 15 mA)
(IOH = 20 mA)
(IOH = 25 mA)

10

9.1

9.0

8.6

9.1

9.0

8.6

9.58
9.26
9.17
9.04
8.90
8.70

9.1

8.6

8.2

Vdc

(IOH = 0 mA)
(IOH = 5.0 mA)
(IOH = 10 mA)
(IOH = 15 mA)
(IOH = 20 mA)
(IOH = 25 mA)

15

14.1

14

13.6

14.1

14

13.6

14.59
14.27
14.18
14.07
13.95
13.70

14.1

13.6

13.2

Vdc

5.0
10
15

0.64
1.6
4.2

0.51
1.3
3.4

0.88
2.25
8.8

0.36
0.9
2.4

Vin = 0 or VDD
Input Voltage #
0 Level
(VO = 3.8 or 0.5 Vdc)
(VO = 8.8 or 1.0 Vdc)
(VO = 13.8 or 1.5 Vdc)

VIL

1 Level

VIH

(VO = 0.5 or 3.8 Vdc)


(VO = 1.0 or 8.8 Vdc)
(VO = 1.5 or 13.8 Vdc)
Output Drive Voltage
(IOH = 0 mA)
(IOH = 5.0 mA)
(IOH = 10 mA)
(IOH = 15 mA)
(IOH = 20 mA)
(IOH = 25 mA)

Output Drive Current


(VOL = 0.4 V)
(VOL = 0.5 V)
(VOL = 1.5 V)

Vdc

Vdc

VOH
Source

Vdc

IOL
Sink

mAdc

Input Current

Iin

15

0.1

0.00001

0.1

1.0

Adc

Input Capacitance

Cin

5.0

7.5

pF

Quiescent Current
(Per Package) Vin = 0 or VDD,
Iout = 0 A

IDD

5.0
10
15

5.0
10
20

0.005
0.010
0.015

5.0
10
20

150
300
600

Adc

Total Supply Current**


(Dynamic plus Quiescent,
Per Package)
(CL = 50 pF on all outputs, all
buffers switching)

IT

5.0
10
15

IT = (1.9 A/kHz) f + IDD


IT = (3.8 A/kHz) f + IDD
IT = (5.7 A/kHz) f + IDD

Adc

#Noise immunity specified for worstcase input combination.


Noise Margin for both 1 and 0 level =
1.0 Vdc min @ VDD = 5.0 Vdc
2.0 Vdc min @ VDD = 10 Vdc
2.5 Vdc min @ VDD = 15 Vdc
** The formulas given are for the typical characteristics only at 25_C.

To calculate total supply current at loads other than 50 pF:


IT(CL) = IT(50 pF) + 3.5 x 103 (CL 50) VDDf
where: IT is in A (per package), CL in pF, VDD in Vdc, and f in kHz is input frequency.

MC14511B
362

MOTOROLA CMOS LOGIC DATA

SWITCHING CHARACTERISTICS* (CL = 50 pF, TA = 25_C)


Characteristic

VDD
Vdc

Min

Typ

Max

5.0
10
15

40
30
25

80
60
50

5.0
10
15

125
75
65

250
150
130

5.0
10
15

640
250
175

1280
500
350

5.0
10
15

720
290
200

1440
580
400

5.0
I0
15

600
200
150

750
300
220

5.0
10
15

485
200
160

970
400
320

5.0
10
15

Symbol

313
125
90

625
250
180

Unit

Output Rise Time


tTLH = (0.40 ns/pF) CL + 20 ns
tTLH = (0.25 ns/pF) CL + 17.5 ns
tTLH = (0.20 ns/pF) CL + 15 ns

tTLH

Output Fall Time


tTHL = (1.5 ns/pF) CL + 50 ns
tTHL = (0.75 ns/pF) CL + 37.5 ns
tTHL = (0.55 ns/pF) CL + 37.5 ns

tTHL

Data Propagation Delay Time


tPLH = (0.40 ns/pF) CL + 620 ns
tPLH = (0.25 ns/pF) CL + 237.5 ns
tPLH = (0.20 ns/pF) CL + 165 ns

tPLH

tPHL = (1.3 ns/pF) CL + 655 ns


tPHL = (0.60 ns/pF) CL + 260 ns
tPHL = (0.35 ns/pF) CL + 182.5 ns

tPHL

Blank Propagation Delay Time


tPLH = (0.30 ns/pF) CL + 585 ns
tPLH = (0.25 ns/pF) CL + 187.5 ns
tPLH = (0.15 ns/pF) CL + 142.5 ns

tPLH

tPHL = (0.85 ns/pF) CL + 442.5 ns


tPHL = (0.45 ns/pF) CL + 177.5 ns
tPHL = (0.35 ns/pF) CL + 142.5 ns

tPHL

Lamp Test Propagation Delay Time


tPLH = (0.45 ns/pF) CL + 290.5 ns
tPLH = (0.25 ns/pF) CL + 112.5 ns
tPLH = (0.20 ns/pF) CL + 80 ns

tPLH

tPHL = (1.3 ns/pF) CL + 248 ns


tPHL = (0.45 ns/pF) CL + 102.5 ns
tPHL = (0.35 ns/pF) CL + 72.5 ns

tPHL

5.0
10
15

313
125
90

625
250
180

Setup Time

tsu

5.0
10
15

100
40
30

ns

Hold Time

th

5.0
10
15

60
40
30

ns

tWL

5.0
10
15

520
220
130

260
110
65

ns

Latch Enable Pulse Width

ns

ns

ns

ns

ns

* The formulas given are for the typical characteristics only.

This device contains protection circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this
high-impedance circuit. A destructive high current mode may occur if Vin and Vout are not constrained to the range VSS (Vin or
Vout) VDD.
Due to the sourcing capability of this circuit, damage can occur to the device if VDD is applied, and the outputs are shorted to
VSS and are at a logical 1 (See Maximum Ratings).
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD).

MOTOROLA CMOS LOGIC DATA

MC14511B
363

Input LE low, and Inputs D, BI and LT high.


f in respect to a system clock.
All outputs connected to respective CL loads.
20 ns

20 ns
VDD

90%
50%
1
2f

A, B, AND C

10%

VSS

50% DUTY CYCLE

VOH

50%

ANY OUTPUT

VOL

Figure 1. Dynamic Power Dissipation Signal Waveforms

20 ns

20 ns
VDD

90%
50%
10%

INPUT C
tPLH

VSS

tPHL

VOH

90%
50%

OUTPUT g

10%
tTLH

VOL
tTHL

(a) Inputs D and LE low, and Inputs A, B, BI and LT high.

20 ns

LE

10%

VDD

90%
50%
th

VSS

tsu
VDD
INPUT C

50%
VSS
VOH

OUTPUT g
VOL

(b) Input D low, Inputs A, B, BI and LT high.

20 ns

20 ns
LE

VDD

90%
50%
10%

VSS

tWL

(c) Data DCBA strobed into latches.


Figure 2. Dynamic Signal Waveforms

MC14511B
364

MOTOROLA CMOS LOGIC DATA

CONNECTIONS TO VARIOUS DISPLAY READOUTS


LIGHT EMITTING DIODE (LED) READOUT
VDD

VDD

COMMON
ANODE LED

COMMON
CATHODE LED

1.7 V

1.7 V

VSS

VSS

INCANDESCENT READOUT
VDD

VDD

FLUORESCENT READOUT
VDD

**

DIRECT
(LOW BRIGHTNESS)

FILAMENT
SUPPLY
VSS

VSS

VSS OR APPROPRIATE
VOLTAGE BELOW VSS.

(CAUTION: Maximum working voltage = 18.0 V)

GAS DISCHARGE READOUT

VDD

APPROPRIATE
VOLTAGE

LIQUID CRYSTAL (LCD) READOUT

VDD

EXCITATION
(SQUARE WAVE,
VSS TO VDD)

1/4 OF MC14070B

VSS
** A filament prewarm resistor is recommended to reduce filament
thermal shock and increase the effective cold resistance of the
filament.

MOTOROLA CMOS LOGIC DATA

VSS
Direct dc drive of LCDs not recommended for life of
LCD readouts.

MC14511B
365

LOGIC DIAGRAM

BI 4

13 a
A 7
12 b

11 c
B 1

10 d

9 e

15 f
C 2
14 g
LT 3
D 6

LE 5

MC14511B
366

VDD = PIN 16
VSS = PIN 8

MOTOROLA CMOS LOGIC DATA

OUTLINE DIMENSIONS
L SUFFIX
CERAMIC DIP PACKAGE
CASE 62010
ISSUE V
A
16

NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.

B
C

DIM
A
B
C
D
E
F
G
H
K
L
M
N

T
K

SEATING
PLANE

E
F

G
D

16 PL

0.25 (0.010)

16 PL

0.25 (0.010)

T A

T B

INCHES
MIN
MAX
0.750
0.785
0.240
0.295

0.200
0.015
0.020
0.050 BSC
0.055
0.065
0.100 BSC
0.008
0.015
0.125
0.170
0.300 BSC
0_
15 _
0.020
0.040

MILLIMETERS
MIN
MAX
19.05
19.93
6.10
7.49

5.08
0.39
0.50
1.27 BSC
1.40
1.65
2.54 BSC
0.21
0.38
3.18
4.31
7.62 BSC
0_
15 _
0.51
1.01

P SUFFIX
PLASTIC DIP PACKAGE
CASE 64808
ISSUE R
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.

A
16

S
T

SEATING
PLANE

H
G

16 PL

0.25 (0.010)

MOTOROLA CMOS LOGIC DATA

T A

DIM
A
B
C
D
F
G
H
J
K
L
M
S

INCHES
MIN
MAX
0.740
0.770
0.250
0.270
0.145
0.175
0.015
0.021
0.040
0.70
0.100 BSC
0.050 BSC
0.008
0.015
0.110
0.130
0.295
0.305
0_
10 _
0.020
0.040

MILLIMETERS
MIN
MAX
18.80
19.55
6.35
6.85
3.69
4.44
0.39
0.53
1.02
1.77
2.54 BSC
1.27 BSC
0.21
0.38
2.80
3.30
7.50
7.74
0_
10 _
0.51
1.01

MC14511B
367

OUTLINE DIMENSIONS
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751B05
ISSUE J
A

16

NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.

B
1

8 PL

0.25 (0.010)

DIM
A
B
C
D
F
G
J
K
M
P
R

X 45 _

C
T

SEATING
PLANE

M
D

16 PL

0.25 (0.010)

T B

MILLIMETERS
MIN
MAX
9.80
10.00
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0_
7_
5.80
6.20
0.25
0.50

INCHES
MIN
MAX
0.386
0.393
0.150
0.157
0.054
0.068
0.014
0.019
0.016
0.049
0.050 BSC
0.008
0.009
0.004
0.009
0_
7_
0.229
0.244
0.010
0.019

DW SUFFIX
PLASTIC SOIC PACKAGE
CASE 751G02
ISSUE A
A
16

8X

P
0.010 (0.25)

NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN
EXCESS OF D DIMENSION AT MAXIMUM
MATERIAL CONDITION.

16X

0.010 (0.25)

T A

F
R X 45 _
C
T
14X

MC14511B
368

SEATING
PLANE

DIM
A
B
C
D
F
G
J
K
M
P
R

MILLIMETERS
MIN
MAX
10.15
10.45
7.40
7.60
2.35
2.65
0.35
0.49
0.50
0.90
1.27 BSC
0.25
0.32
0.10
0.25
0_
7_
10.05
10.55
0.25
0.75

INCHES
MIN
MAX
0.400
0.411
0.292
0.299
0.093
0.104
0.014
0.019
0.020
0.035
0.050 BSC
0.010
0.012
0.004
0.009
0_
7_
0.395
0.415
0.010
0.029

MOTOROLA CMOS LOGIC DATA

Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Typical parameters which may be provided
in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters,
including Typicals must be validated for each customer application by customers technical experts. Motorola does not convey any license under its patent
rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant
into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a
situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application,
Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or
unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and
are registered
trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.
How to reach us:
USA/EUROPE/Locations Not Listed: Motorola Literature Distribution;
P.O. Box 20912; Phoenix, Arizona 85036. 18004412447 or 6023035454

JAPAN: Nippon Motorola Ltd.; TatsumiSPDJLDC, 6F SeibuButsuryuCenter,


3142 Tatsumi KotoKu, Tokyo 135, Japan. 038135218315

MFAX: RMFAX0@email.sps.mot.com TOUCHTONE 6022446609


INTERNET: http://DesignNET.com

ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,


51 Ting Kok Road, Tai Po, N.T., Hong Kong. 85226629298

MOTOROLA CMOS LOGIC DATA

*MC14511B/D*

MC14511B
MC14511B/D
369

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