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Logic Lab 1 - Digital Abstraction (5 Gates)

This document describes an engineering lab experiment on digital abstraction. The objective is to build basic logic gates using transistors and passive components. Students are instructed to construct 5 different logic gate circuits using NPN and PNP transistors. For each gate, they must record input/output voltages, make a truth table, and determine values like noise margins and power dissipation. The document provides circuit diagrams, component lists, procedures, and result tables for documenting findings.

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ram010
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109 views16 pages

Logic Lab 1 - Digital Abstraction (5 Gates)

This document describes an engineering lab experiment on digital abstraction. The objective is to build basic logic gates using transistors and passive components. Students are instructed to construct 5 different logic gate circuits using NPN and PNP transistors. For each gate, they must record input/output voltages, make a truth table, and determine values like noise margins and power dissipation. The document provides circuit diagrams, component lists, procedures, and result tables for documenting findings.

Uploaded by

ram010
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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School of Engineering & Information Technology

Universiti Malaysia Sabah



KE 18201 Engineering Lab

Lab 1: Digital Abstraction







Name: _____________________

Student ID: _____________________

Section: _____________________

Date: _____________________

KE18201 ENGINEERING LAB LAB1

1

TITLE: Digital Abstraction

OBJECTIVE:
To build basic logic gates using transistors and passive components.

EQUIPMENT REQUIRED:

Item Quantity
DC variable power supply 1
Osilloscope, Digital multimeter, Function generator 1
Resistors : (1/4 W) 1 k
4.7 k
10 k
100 k
1
1
2
2
NPN 2N3906 (or equivalent)
PNP 2N3904 (or equivalent)
2
1


KE18201 ENGINEERING LAB LAB1

2

Digital Abstraction Prelab
Question No. 1

With reference to the schematic symbols, briefly describe how the
bipolar junction transistor (BJT) works as a switch.
Hint: How to turn on or turn off BJT?















Question No. 2

With the aid of some diagram and graph, describe the concept of noise margins in logic
circuits. What are the parameters needed and how to determine the:
a) Noise Margin for Low Input
b) Noise Margin for High Input
Hint: If you know the graph of noise margins, then you know how to answer this question.




KE18201 ENGINEERING LAB LAB1

3

Basic Logic Gate 1

1. Assemble the circuit as in Figure 1.


2. Use +5 Vdc and 0 V as your logic HIGH and logic LOW input respectively. Record
the corresponding outputs.

3. Make a truth-table for this circuit and verify its operation. Which logic gate is
represented by this circuit?

4. Apply input voltages from 0 V to 5 V. Tabulate and plot the output voltage Q versus
input voltage A.

5. Based on your measurement in step (4), what are the best values of V
OH
, V
IH
, V
OL
,
V
IL
? Consequently, what are the noise margins NM
H
and NM
L
?

6. Determine the power dissipated in the circuit by obtaining the voltage across each
component in the circuit and the current through the transistor. Hence calculate the
total power dissipated in the circuit.


Q2
2N3904
R1
1k
R2
100k
VCC
5V
Input A
Output Q
Figure 1
KE18201 ENGINEERING LAB LAB1

4

Basic Logic Gate 2

1. Reassemble the circuit in Figure 2 by adding a second PNP transistor and remove the
collector resistor as in Figure 2.



2. Use +5 Vdc and 0 V as your logic HIGH and logic LOW input respectively. Record
the corresponding outputs.

3. Make a truth-table for this circuit and verify its operation. Which logic gate is
represented by this circuit?

4. Apply input voltages from 0 V to 5 V. Tabulate and plot the output voltage Q versus
input voltage A.

5. Based on your measurement in step (4), what are the best values of V
OH
, V
IH
, V
OL
,
V
IL
? Also, what are the noise margins NM
H
and NM
L
?

6. Determine the power dissipated each component in the circuit, then calculate the total
power dissipated in the circuit.

7. What are the advantages of this circuit even though it requires two BJTs?


Figure 2
Q1
2N3906
Q2
2N3904
R1
100k
R2
100k
VCC
5V
Input A Output Q
KE18201 ENGINEERING LAB LAB1

5

Basic Logic Gate 3

1. Construct the circuit as in Figure 3.



2. For node A and B, use voltage supply of 5V to represent the HIGH input logic and 0V
(Ground) as your LOW input logic.

3. Make a truth-table for this circuit and verify its operation. Which logic gate is
represented by this circuit?

4. Design a circuit that is having an inverse input with the circuit in Figure 3. Make a
truth-table and draw out the circuit. Write down the name of the gate.




Figure 3
Q1
2N3904
Q2
2N3904
R1
10k
R2
10k
VCC
5V
R4
4.7k
Input A
Input B
Output Q
KE18201 ENGINEERING LAB LAB1

6

Basic Logic Gate 4

1. Construct the circuit as in Figure 4.



2. For node A and B, use voltage supply of 5V to represent the HIGH input logic and 0V
(Ground) as your LOW input logic.

3. Make a truth-table for this circuit and verify its operation. Which logic gate is
represented by this circuit?

4. Design a circuit that is having an inverse input with the circuit in Figure 4. Make the
truth-table and draw out the circuit. Write down the name of the gate.

Figure 4
Q1
2N3904
Q2
2N3904
R1
10k
R2
10k
VCC
5V
R4
4.7k
Input A
Input B
Output Q
KE18201 ENGINEERING LAB LAB1

7

Basic Logic Gate 5

1. Construct the circuit as in Figure 5.



2. For node A and B, use voltage supply of 5V to represent the HIGH input logic and 0V
(Ground) as your LOW input logic.

3. Make a truth-table for this circuit and verify its operation. Which logic gate is
represented by this circuit?

Figure 5
Q1
2N3904
Q2
2N3904
R1
10k
R2
10k
VCC
5V
R4
4.7k
Input A
Input B
Output Q
KE18201 ENGINEERING LAB LAB1

8

UNIVERSITI MALAYSIA SABAH
SEKOLAH KEJURUTERAAN DAN TEKNOLOGI MAKLUMAT

KE18201 Engineering Lab





LAB # 2

DIGITAL ABSTRACTION












Name : ....


Group Members :





Section :


Date :



KE18201 ENGINEERING LAB LAB1

9

RESULT

Basic Logic Gate 1

Step (2): input: +5 V output: ______________ V
input: 0 V output: ______________ V

Step (3):




Logic Gates Name: ____________________


Step (4):




Input Output




KE18201 ENGINEERING LAB LAB1

10

Step (5):















Step (6):











KE18201 ENGINEERING LAB LAB1

11

Basic Logic Gate 2

Step (2): input: +5 V output: ______________ V
input: 0 V output: ______________ V

Step (3):





Logic Gates Name: ____________________


Step (4):






Input Output




KE18201 ENGINEERING LAB LAB1

12

Step (5):















Step (6):















Step (7):
KE18201 ENGINEERING LAB LAB1

13

Basic Logic Gate 3

Step (3):

Table A
Input Output
A (Volts)
Logic
State
B (Volts)
Logic
State
Measured
V
out

Logic
State





Logic Gates Name: ____________________


Step (4):

KE18201 ENGINEERING LAB LAB1

14

Basic Logic Gate 4

Step (3):

Table A
Input Output
A (Volts)
Logic
State
B (Volts)
Logic
State
Measured
V
out

Logic
State





Logic Gates Name: ____________________


Step (4):

KE18201 ENGINEERING LAB LAB1

15

Basic Logic Gate 5

Step (3):

Table A
Input Output
A (Volts)
Logic
State
B (Volts)
Logic
State
Measured
V
out

Logic
State





Logic Gates Name: ____________________







CONCLUSION

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