Department of Electronics & Media Technology

Karunya University

KARUNYA SCHOOL OF ELECTRICAL SCIENCES

Department of Electronics and Media Technology Lab Manual 11MT220 - Microprocessor and Microcontroller Lab Even Semester 2013-14 Credit 0:0:2
Name Ms. K. Shiby Angel Mr. Nair Vishal Vijay Approved By Ms. Shanthini Pandiaraj Signature

Prepared By

(Karunya Institute of Technology & Sciences) Declared as deemed to be university under Section 3 of the UGC act, 1956 Karunya Nagar, Coimbatore 641 114.

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Lab Exercises 11MT220 MICROPROCESSOR AND MICROCONTROLLER LAB ODD SEM 2013-14 Sr. NO 1 Title of Exercises Arithmetic and logical Operations using 8085p a. 8 Bit Addition b. 8 Bit Subtraction c. 8 Bit Multiplication d. 8 Bit Division Sorting using 8085 a. Ascending Order b. Descending Order Code Conversion a. ASCII to Decimal Conversion b. BCD to Hex c. Hex to Decimal d. Hex to Binary Square wave Generation using 8255 Serial Data Transfer operation using 8251 ADC Interfacing using 8085 Arithmetic and Logical operations using 8051 a. 8 Bit Addition b. 8 Bit Subtraction c. 8 Bit Multiplication d. 8 Bit Division Searching using 8051 Serial Communication using 8051 DAC using 8051 Stepper motor interfacing using 8051 Arithmetic and Logical operations using 8086 a. 16 Bit Addition b. 16 Bit Subtraction c. 16 Bit Multiplication d. 16 Bit Division Page No

4 5 6

8 9 10 11

12

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Ex. No : 1 ARITHMETIC AND LOGICAL OPERATIONS USING 8085p __________________________________________________________________________ AIM: To perform the following Arithmetic and logical Operations using 8085p: a. b. c. d. 8 bit Addition 8 bit Subtraction 8 bit Multiplication 8 bit Division

A) 8-BIT ADDITION APPARATUS REQUIRED S. No 1 2 Item description 8085 Microprocessor Kit Power Supply Unit Qty 1 1

THEORY/DESCRIPTION The two operands (i.e., 8-bit numbers) are loaded into two registers A & B, using immediate addressing mode instructions and then added using ADD instruction. The result is stored in the desired memory location. The overflow in addition is checked by verifying the status of Carry (CY) flag and accordingly either 00 or 01 is stored in the location next to the result. ALGORITHM 1. Start the program 2. Initialize the C register as 00H. 3. Move the data1 and data2 to Accumulator and B register respectively. 4. Add B register content to the content of the Accumulator. 5. If there is no carry, go to step 6, else increment C register value. 6. Store the content of Accumulator to a memory location. 7. Move the content of C register to Accumulator. 8. Store the content of Accumulator to the memory location 4501H. 9. Stop the program.
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PROGRAM Address 4100 4102 4104 4106 4107 410A 410B 410E 410F 4112 Opcode Operand 0E,00 3E,data1 06,data2 80 D2,0B,41 0C 32,00,45 79 32,01,45 76 GO: & Label Mnemonics MVI C,00 MVI A, data1 MVI B, data2 ADD B JNC GO INR C STA 4500 MOV A, C STA 4501 HLT Comments Clear Register C Move data1 to accumulator Move data 2 to Register B
Add B register content to accumulator

Jump on no carry to location GO Increment C register Store the result Move carry to Accumulator Store the carry Stop the program

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FLOWCHART

Fig.1.1 Flow chart for 8-bit Addition with carry

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B) 8-BIT SUBTRACTION APPARATUS REQUIRED S. No 1 2 Item description 8085 Microprocessor Kit Power Supply Unit Qty 1 1

THEORY/DESCRIPTION Out of the two operands for subtraction, the first operand is loaded into Accumulator and the second operand is subtracted directly from memory, using register indirect addressing mode instructions. The result is stored in desired memory location and the borrow in subtraction is checked by verifying the status of Carry (Cy) flag and accordingly either 00 or 01 is stored in the location next to result.

ALGORITHM 1. Start the program. 2. Load the HL pair with 16-bit address of data location. 3. Move the content of memory address in HL to accumulator. 4. Increment the address in HL pair. 5. Subtract the content of memory from accumulator. 6. Jump on No-carry to step 8. 7. Increment the C-register. 8. Store the content of accumulator and C-register. 9. Stop the program.

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PROGRAM Address Opcode Operand 4100 21,50,41 4103 4104 4106 4107 4108 410B 410C 410F 4110 4113 7E 0E,00 23 96 02,0C,41 0C 32,52,41 79 32,53,41 76 & Label Mnemonics LXI H,4150 MOV A, M MVI C, 00 INX H SUB M JNC NEXT INR C NEXT: STA 4152 MOV A, C STA 4153 HLT Comments Load data to HL Register Move Data1 to Acc Clear C-register. Increment address. Subtract Data2 from Acc Jump on No-carry to the location NEXT. Increment C register Store the result Move carry to Acc Store the carry Stop the program

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FLOWCHART

Fig 1.2 8-bit Subtraction

C) 8-BIT MULTIPLICATION APPARATUS REQUIRED S. No 1 2 Item description 8085 Microprocessor Kit Power Supply Unit Qty 1 1

THEORY/DESCRIPTION Using the immediate addressing mode instructions, the two operands to be multiplied are loaded into two registers say, B and C. By the method of repeated addition, the multiplication operation is performed (i.e., first number is repeatedly added to accumulator as per the second
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number Eg. 03 x 04 => Acc + 03 (04 times)). The overflow in multiplication is checked every time after each addition, by verifying the status of Carry (CY) flag and accordingly a register, say D is incremented. The result in accumulator is stored in the desired memory location and the content of D register is stored in the location next to result.

ALGORITHM 1. Start the program. 2. Clear the Accumulator and D Register. 3. Load the Data1 to B register and Data2 to C register. 4. Add the content of B to accumulator until C becomes zero. 5. If No-carry, go to step 6. 6. Increment the D-register. 7. Decrement the C register. 8. If C register is Non-zero, Jump to step 4. 9. Store the content of accumulator to 5000H. 10. Move the content of D-register to Accumulator. 11. Store the content of accumulator to 5001H. 12. Stop the program. PROGRAM Address 4500 4502 4504 4506 4508 4509 450C 450D 450E Opcode & Label Operand 3E,00 06,data1 0E,data2 16,00 80 D2,0D,45 14 0D C2,08,45 LOOP1: LOOP2: Mnemonics MVI A, 00 MVI B, data1 MVI C, data2 MVI D, 00 ADD B JNC LOOP1 INR D DCR C JNZ LOOP2 Comments Move data to accumulator Move multiplicand to B register. Move the multiplier to C register Clear D-reg for carry repetitive addition Jump on no carry to an location LOOP1 Increment the D-register, if carry occurs. Decrement C-register Jump on no zero to Location LOOP2

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4511 4514 4515 4518

32,00,50 7A 32,01,50 76

STA 5000 MOV A, D STA 5001 HLT

Store resultant product Move carry to accumulator Store the carry. Stop the program

FLOWCHART

Fig 1.3 8-bit Multiplication D) 8-BIT DIVISION APPARATUS REQUIRED S. No 1 2 Item description 8085 Microprocessor Kit Power Supply Unit Qty 1 1

THEORY/DESCRIPTION Using the immediate addressing mode instructions, the Divisor and Dividend are loaded directly into Accumulator and B registers. By the method of successive subtraction, the division is carried out (i.e., Divisor is repeatedly subtracted from Dividend, until the dividend becomes smaller than divisor E.g. 09 / 02 => 09 02 (4 times) => Remainder=01 and Quotient=04). The C
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register is incremented every time after each subtraction, to keep count of the quotient. The final content in accumulator will be remainder of the division and it is stored in the desired memory location and the content of C register containing the quotient is stored in the location next to result. ALGORITHM 1. Start the program. 2. Clear C Register. 3. Load the Divisor to Accumulator. 4. Load the Dividend to B-register. 5. Compare the B-register value with the accumulator. 6. If Accumulator content is smaller to B reg., then Jump to step 10. 7. Subtract B-register value with accumulator. 8. Increment the C-register. 9. Jump to step 4. 10. Store the contents of accumulator and C-register into memory. 11. Stop the program. PROGRAM Address Opcode & Operand Label 4500 4502 4504 4506 4507 450A 450B 450C 50F 4512 4513 4516 3E, Divisor 06, Dividend 0E, 00 B8 DA, 0F, 45 90 0C C3, 06,45 32,00,50 79 32,01,50 76 Mnemonics Comments

MVI A, Dividend Move Divisor to Acc MVI B, Divisor MVI C, 00 LOOP2: CMP B JC LOOP1 SUB B INR C JMP LOOP2 LOOP1: STA 5000 MOV A, C STA 5001 HLT Move Dividend to B reg. Clear C register Compare Acc and B reg. Jump on Carry to location LOOP1 Repetitive subtraction for division Increment C register Jump to location LOOP2 Store the Remainder Move C reg. to Acc Store the Quotient. Stop the program

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FLOWCHART

Fig 1.4 8-bit Division RESULT The following exercises are practiced and the output is verified: A) 8-bit addition B) 8-bit subtraction C) 8-bit Multiplication D) 8-bit Division

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Ex. No: 2 SORTING ______________________________________________________________________________ AIM: To write and implement an assembly language program for arranging an array of 8-bit numbers in ascending and descending order, using 8085. APPARATUS REQUIRED: S. No 1 2 Item description 8085 Microprocessor Kit Power Supply Unit Qty 1 1

THEORY/DESCRIPTION This program uses the register indirect addressing mode instructions, to access the data during sorting. The Bubble-Sort technique is used to sort the numbers in either ascending order or descending order. The numbers to be sorted is stored in the memory as a array with the first location containing the count of the data in the array. The sorted numbers are stored back again in the same source location of the array.

ALGORITHM: ASCENDING ORDER 1. Start the program 2. Load the data address to HL register pair and Initialize B register with 00 3. Move the array size count into C-register, then decrement the C-register 4. by 1 and increment HL register pair by 1. 5. Load the first data in the memory to Accumulator. 6. Compare the subsequent memory with Accumulator. 7. Jump on Carry, when M is greater A and go to Step 9. 8. Move the memory M to D register 9. Decrement the address of HL pair and move the D register content to M 10. and increment the value by HL by 1. 11. Move 01 to B register and decrement the C-register. 12. If C is Non-zero, Jump to comparison of next data.
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13. If B becomes zero after decrement, go to step1. 14. Stop the program. PROGRAM

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FLOWCHART

Fig 2.1 Sorting in Ascending Order

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ALGORITHM: DESCENDING ORDER 1. Start the program 2. Load the data address to HL and initialize B register with 00 3. Move the Array size count into C-register then decrement the C-register by 4. 1 and increment HL by 1. 5. Load the data-I in the memory to A. 6. Compare the subsequent memory content with A. 7. Jump on No-carry (when M is greater A), go to Step 9. 8. Move the memory M to D register 9. Decrement the value of HL pair and move the D register content to M and increment the value by HL by 1. 10. Move B register and decrement the C-register. 11. Jump on Non-Zero to the next comparison. If zero, then decrement B and go to step1. 12. Stop the program. PROGRAM

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FLOWCHART

Fig 2.2 Sorting in Descending Order RESULT Thus the assembly language program for sorting Ascending & Descending order is executed and the results are verified.
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Ex. No : 3 CODE CONVERSION USING 8085 PROGRAM ______________________________________________________________________________ AIM: To Perform Code Conversion for the following. 1. 2. 3. 4. ASCII to Decimal BCD to Hex Hex to Decimal Hex to Binary

APPARATUS REQUIRED: S. No 1 2 Item description 8085 Microprocessor Kit Power Supply Unit Qty 1 1

THEORY/DESCRIPTION ASCII to Decimal Conversion Conversion of ASCII number to decimal is very simple because all the decimal numbers form a sequence in ASCII. Any ASCII number can be converted to decimal just by subtracting 30 from it. BCD to Hex Out of the two BCD digits at 4150 and 4151, the one at 4150 is the MSD. The logic is to multiply ten MSD by ten using repeated addition. Then add the LSD to it. Hex to Decimal Hex Number is converted to its equivalent decimal number using the following logic. First count the number of hundreds, the number of tens and units present in that number. Using these three, add up to get the equivalent decimal number.

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Hex to Binary First get the data and rotate it right. Depending upon carry store either 0 or 1 in memory. Do the rotation 8 times for the 8-bits in that number. FLOWCHART: ASCII TO DECIMAL

START

GET DATA

DATA=DATA-30H

Yes

IS DATA > 09H?

RESULT=FFH

RESULT=DATA

STOP

Fig: 3.1 Ascii to Decimal Conversion

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ALGORITHM: ASCII to Decimal Conversion 1. Load HL register pair with content as the address value. 2. Move content pointed by the memory pointer to the Accumulator. 3. Subtract 30 from content of Accumulator. 4. Compare content of Accumulator with 10. 5. Check whether a valid decimal number. 6. If yes store result in next addresses location otherwise store FF in a memory location. 7. Halt the program. PROGRAM Address Opcode & Label Operand 4100 21, 50,41 4103 4104 4106 4108 410B 410D 410E 410F 7E DE, 30 FE, 0A DA, 0D, 41 3E, FF 23 77 76

Mnemonics

Comments

LXI H,4150 Point to data MOV A,M SUI 30 CPI 0A JC LOOP MVI A, FF Get operand Convert to decimal Check whether its a valid decimal number Yes, Store Result No make result =FF Increment HL by 1 Move accumulator content to memory (A)=>(4151)

LOOP INX H MOV M,A HLT

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FLOWCHART: BCD to HEX Conversion

START

Get Most Significant Digit

MSD=MSD*10

Hex Data = MSD+LSD

Store Hex Data

STOP

Fig: 3.2 BCD to Hex Conversion ALGORITHM: BCD to Hex 1. Initialize memory pointer. 2. Move value of memory pointed to Accumulator. 3. Add the contents of Accumulator by itself. 4. Move content of Accumulator to register B. 5. Add the contents of Accumulator by itself again two times. 6. Point to LSD. 7. Add to form hex equivalent.
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8. Move accumulator content to memory. PROGRAM Address Opcode & Operand 4100 21, 50,41 4103 4104 4105 4106 4107 4108 4109 410A 410B 410C 410D 7E 87 47 87 87 80 23 86 23 77 76

Label

Mnemonics

Comments

LXI H,4150 MOV A, M ADD A MOV B, A ADD A ADD A ADD B INX H ADD M INX H MOV M, A HLT

Initialize memory pointer to 4150 (A)=(4150)-(MSD) MSD*2 Save MSD*2 MSD*4 MSD*8 MSD*10 Point to LSD Add to form hex equivalent (A)=>(4152) Move accumulator content to memory

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FLOWCHART: HEX to DECIMAL Conversion

Start Get data Carry = 0; Hundreds=0; Tens=0

Data=data-100

Hundreds=Hundreds+1

Is Carry=1

Data=data+100

Data=data-10

Tens=Tens+1

Is Carry=1

Data=data-10

Units-data

Store hundreds, tens, units

Stop

Fig: 3.3 Hex to Decimal Conversion

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ALGORITHM: Hex to Decimal 1. Take the first digit on the left of the hexadecimal number and change it to decimal. 2. If there are still more digits, multiply your running total by 16, change the next digit to decimal and add that to the running total. Continue with step 2 until all digits are exhausted. PROGRAM Address Opcode & Label Operand 4100 21, 50, 41 4103 4106 4107 4109 410C 410D 4110 4112 4114 4117 4118 411B 411D 411E 411F 4120 4121 4122 4123 4124 4125 4126 01, 00, 00 7E D6, 64 DA, 10, 41 04 C3, 07, 41 C6, 64 D6, 0A DA, 1B, 41 0C C3, 12, 41 C6, 0A 23 70 47 79 07 07 07 07 80 23 LOOP3 LOOP1 LOOP2 LOOP Mnemonics LXI H, 4150 LXI B, 0000 MOV A, M SUI 64 JC LOOP1 INR B JMP LOOP ADI 64 SUI 0A JC LOOP3 INR C JMP LOOP2 ADI 0A INX H MOV M, B MOV B, A MOV A, C RLC RLC RLC RLC ADD B INX H Comments Point to data Initialize Hundreds=0; Tens =0 Get Hex Data to A Subtract 64 from A Jump when CY is set Hundreds=Hundreds+1 Unconditional jump Add 64 to A Subtract 10 from A Jump when CY is set Tens=Tens+1 Unconditional jump If Subtracted extra, add it again A Units Store Hundreds Combine Tends in C and Units in A to Form single 8-bit number Rotate each bit in A left with CY Rotate each bit in A left with CY Rotate each bit in A left with CY Rotate each bit in A left with CY Add content of A to Reg B Increment HL by 1

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4127 4128

77 76

MOV M, A HLT

Store Tens and Units stop

ALGORITHM: Hex to Binary 1. Move the number to be converted from memory to Accumulator. 2. Check for the least significant bits by moving them to carry bit. 3. Store zero if no carry and one if carry. 4. Perform step(3) for 8 times. 5. Halt the program.

PROGRAM Address Opcode & Label Operand 4100 21, 50, 41 4103 4105 4107 4108 410B 410D 4110 4112 4113 4114 4117 06, 08 3E, 5A 0F DA,10, 41 36, 00 C3, 12,41 36, 01 23 05 C2, 07, 41 76 LOOP1 COMMON LOOP

Mnemonics LXI H, 4150 MVI B, 08 MVI A, 5A RRC JC LOOP1 MVI M, 00 JMP COMMON MVI M, 01 INX H DCR B JNZ LOOP HLT

Comments Initialize memory pointer Counter for 8-bits 5A is moved to A Check for least significant bits Jump when CY is set Store zero if no carry Unconditional jump Store one if there is a carry Increment HL by 1 Decrement B by 1 Check for counter STOP

RESULT Thus code conversion for the following has been performed. 1. ASCII to Decimal Conversion 2. BCD to Hex 3. Hex to Decimal 4. Hex to Binary
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Ex. No: 4 SQUARE WAVE GENERATION USING 8255 ______________________________________________________________________________ AIM: To Generate a square wave using 8255. APPARATUS REQUIRED S. No 1 2 Item description 8085 Microprocessor Kit Power Supply Unit Qty 1 1

THEORY To generate a square wave of 8255 first initialize all the ports of the 8255 as output ports by writing the corresponding control word. Then make the 24 I/O lines high and low with a certain delay and we will get the square wave out of 8255. If you dont give any delay then you cannot see any square wave because of the speed at which the 8255 output lines change states from high to low and low to high. Increase the delay to reduce the frequency and reduce the delay to increase the frequency. HARDWARE DESCRIPTION The Intel 8255A is a general purpose programmable I/O device which is designed for parallel communication between microprocessors and peripheral devices. It provides 24 I/O pins which may be individually programmed in 2 groups of 12 and used in 3 major modes of operation. The 8255 allows the following three operating modes (Modes 0, 1 and 2):

Mode 0 - Simple I/O mode: Ports A and B operate as either inputs or outputs and Port C is divided into two 4-bit groups either of which can be operated as inputs or outputs. Mode 1 Handshake I/O Mode: Same as Mode 0 but Port C is used for handshaking and control. Mode 2 Bidirectional I/O: Port A is bidirectional (both input and output) and Port C is used for handshaking. Port B is not used.

BASIC SYSTEM INTERFACE

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The control pins with which the CPU communicates to 8255 are the RESET, CS*, RD*, WR*, A0, A1, D0-D7. Its basic operations are as given in the following table. RD* Active Low Read Active Low Write Active Low Chip Select Select control register/port Bidirectional Data Bus

WR* CS* -

A0, A1 D0-D7 -

The basic operations of the 8255 using the above signals are as given below. A1 0 0 1 A0 0 1 0 RD* 0 0 0 WR* CS* 1 1 1 0 0 0 FUNCTION INPUT OPERATION(READ) PORT A=>DATA BUS PORT B=>DATA BUS PORT C=>DATA BUS OUTPUT OPERATION (WRITE) DATA BUS=>PORT A DATA BUS=>PORT B DATA BUS=>PORT C DATA BUS=>PORT D DISABLE FUNCTION DISABLE FUNCTION DATA BUS=>3-STATE ILLEGAL CONDITION DATA BUS=>3-STATE

0 0 1 1

0 1 0 1

1 1 1 1

0 0 0 0

0 0 0 0

X 1 X

X 1 X

X 0 1

X 1 1

1 0 0

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CONTROL WORD 1. I/O Mode

2. BSR Mode

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The following are the I/O addresses for 8255: IC No. U3 U3 U3 U3 U19(U4) U19(U4) U19(U4) U19(U4) Function Control Register Port A Port B Port C Control Register Port A Port B Port C Address 0F 0C 0D 0E 17 14 15 16

ALGORITHM 1. Set the control word in control register 2. Send high value to port A and call the delay loop. 3. Send a low value to port A and call delay

DELAY SUBROUTINE
1. Load count register C. 2. Decrement C and if it is zero return to main program. 3. Else continue the loop until C is zero. PROGRAM Address 4100 4102 4104 4106 4108 410A 410C 410F 4110 4113 4114 4117 Opcode & Operand 3E, 80 D3, 0F/43 3E, FF D3, 0C/40 D3, 0D/41 D3, 0E/42 CD, 13, 41 2F C3, 06, 41 F5 21, FF, FF 00 DELAY LOOP Label Mnemonics MVI A, 80 OUT CT8255 MVI A, FF OUT PA8255 OUT PB8255 OUT PC8255 CALL DELAY CMA JMP LOOP PUSH PSW LXI H, FFFF DELAY1 NOP Comments A 80 Control word AFF Write Data PortA Write Data PortB Write Data PortC Call Subroutine Compliment A Repeat writing PUSH PSW HLFFFF No Opeartion

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4118 4119 411A 411B 411E 411F

2B 7D B4 C2, 17, 41 F1 C9

DCX H MOV A, L ORA H JNZ DELAY1 POP PSW RET

Decrement HL AL A OR H Jump if non zero POP PSW Return

RESULT The square wave is generated using 8255.

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Ex No: 5 SERIAL DATA TRANSFER OPERATION USING 8251 ______________________________________________________________________________

Aim: To initialize 8251A and to check the transmission and reception of a character. Apparatus: 1. 8085 Microprocessor Kit 2. RS232C connector 3. Power Cable Theory: The control Words are split into two formats: 1. Mode Instruction word 2. Command Instruction word Mode Instruction word Definition: Mode instruction is used for setting the function of the 8251. Mode instruction will be in "wait for write" at either internal reset or external reset. That is, the writing of a control word after resetting will be recognized as a "mode instruction." Items set by mode instruction are as follows: Synchronous/asynchronous mode Stop bit length (asynchronous mode) Character length Parity bit Baud rate factor (asynchronous mode) Internal/external synchronization (synchronous mode) Number of synchronous characters (Synchronous mode)

In the case of synchronous mode, it is necessary to write one-or two byte sync characters. If sync characters were written, a function will be set because the writing of sync characters constitutes part of mode instruction.

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Fig 1a. Bit Configuration of Mode Instruction (Asynchronous Mode)

Fig 1b. Bit Configuration of Mode Instruction (Synchronous Mode)

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Command Instruction Word: Command is used for setting the operation of the 8251. It is possible to write a command whenever necessary after writing a mode instruction and sync characters. Items to be set by command are as follows: Transmit Enable/Disable Receive Enable/Disable DTR, RTS Output of data. Resetting of error flag. Sending to break characters Internal resetting Hunt mode (synchronous mode)

Fig 2. Bit configuration of Command Word

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Fig 3. Status Read Format Pin Description: D 0 to D 7 (l/O terminal) This is bidirectional data bus which receive control words and transmits data from the CPU and sends status words and received data to CPU. RESET (Input terminal) A "High" on this input forces the 8251 into "reset status." The device waits for the writing of "mode instruction." The min. reset width is six clock inputs during the operating status of CLK. CLK (Input terminal) CLK signal is used to generate internal device timing. CLK signal is independent of RXC or TXC. However, the frequency of CLK must be greater than 30 times the RXC and TXC at Synchronous mode and Asynchronous "x1" mode, and must be greater than 5 times at Asynchronous "x16" and "x64" mode. WR (Input terminal) This is the "active low" input terminal which receives a signal for writing transmit data and control words from the CPU into the 8251. RD (Input terminal) This is the "active low" input terminal which receives a signal for reading receive data and status words from the 8251.
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C/D (Input terminal) This is an input terminal which receives a signal for selecting data or command words and status words when the 8251 is accessed by the CPU. If C/D = low, data will be accessed. If C/D = high, command word or status word will be accessed. CS (Input terminal) This is the "active low" input terminal which selects the 8251 at low level when the CPU accesses. Note: The device wont be in "standby status"; only setting CS = High. TXD (output terminal) This is an output terminal for transmitting data from which serial-converted data is sent out. The device is in "mark status" (high level) after resetting or during a status when transmit is disabled. It is also possible to set the device in "break status" (low level) by a command. TXRDY (output terminal) This is an output terminal which indicates that the 8251is ready to accept a transmitted data character. But the terminal is always at low level if CTS = high or the device was set in "TX disable status" by a command. Note: TXRDY status word indicates that transmit data character is receivable, regardless of CTS or command. If the CPU writes a data character, TXRDY will be reset by the leading edge or WR signal. TXEMPTY (Output terminal) This is an output terminal which indicates that the 8251 has transmitted all the characters and had no data character. In "synchronous mode," the terminal is at high level, if transmit data characters are no longer remaining and sync characters are automatically transmitted. If the CPU writes a data character, TXEMPTY will be reset by the leading edge of WR signal. Note : As the transmitter is disabled by setting CTS "High" or command, data written before disable will be sent out. Then TXD and TXEMPTY will be "High". Even if a data is written after disable, that data is not sent out and TXE will be "High".After the transmitter is enabled, it sent out. (Refer to Timing Chart of Transmitter Control and Flag Timing) TXC (Input terminal) This is a clock input signal which determines the transfer speed of transmitted data. In "synchronous mode," the baud rate will be the same as the frequency of TXC. In "asynchronous mode", it is possible to select the baud rate factor by mode instruction. It can be 1, 1/16 or 1/64 the TXC. The falling edge of TXC sifts the serial data out of the 8251. RXD (input terminal) This is a terminal which receives serial data. RXRDY (Output terminal) This is a terminal which indicates that the 8251 contains a character that is ready to READ. If the CPU reads a data character, RXRDY will be reset by the leading edge of RD signal. Unless the CPU reads a data character before the next one is received completely, the preceding data will be lost. In such a case, an overrun error flag status word will be set.

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RXC (Input terminal) This is a clock input signal which determines the transfer speed of received data. In "synchronous mode," the baud rate is the same as the frequency of RXC. In "asynchronous mode," it is possible to select the baud rate factor by mode instruction. It can be 1, 1/16, 1/64 the RXC. SYNDET/BD (Input or output terminal) This is a terminal whose function changes according to mode. In "internal synchronous mode." this terminal is at high level, if sync characters are received and synchronized. If a status word is read, the terminal will be reset. In "external synchronous mode, "this is an input terminal. A "High" on this input forces the 8251 to start receiving data characters. In "asynchronous mode," this is an output terminal which generates "high level"output upon the detection of a "break" character if receiver data contains a "low-level" space between the stop bits of two continuous characters. The terminal will be reset, if RXD is at high level. After Reset is active, the terminal will be output at low level. DSR (Input terminal) This is an input port for MODEM interface. The input status of the terminal can be recognized by the CPU reading status words. DTR (Output terminal) This is an output port for MODEM interface. It is possible to set the status of DTR by a command. CTS (Input terminal) This is an input terminal for MODEM interface which is used for controlling a transmit circuit. The terminal controls data transmission if the device is set in "TX Enable" status by a command. Data is transmitable if the terminal is at low level. RTS (Output terminal) This is an output port for MODEM interface. It is possible to set the status RTS by a command. The program first initializes the 8253 to give an output clock frequency of 150KHz at channel 0 which will give 9600 baud rate of 8251A. Then 8251A is initialized to a dummy Mode command. The internal reset to 8251A is then provided, since the 8251A is in the Command mode now. Then the 8251A is initialized as said above with data 4E and 37. The program after initializing will read the status register and check for TxEMPTY. If the transmitter buffer is empty then check for a character in the receive buffer. If some character is present then, it is received and stored at location 4200. If the serial port is not proper the program will be in a constant loop either in the transmission mode or in the reception mode.

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Program: Address Opcode 4100 4102 4104 4106 4108 4109 410B 410C 410E 4110 4112 4114 4116 4118 411A 411C 411E 4120 4123 4125 4127 4129 412B 412E 4130 4133

Label

LOOP:

LOOP1:

Mnemonics MVI A, 36 OUT TMRCNT MVI A, 0A OUT TMRCHO XRA A OUT TMRCHO XRA A OUT UATCNT OUT UATCNT MVI A,40 OUT UATCNT MVI A, 4E OUT UATCNT MVI A, 37 OUT UATCNT IN UATCNT ANI 04 JZ LOOP MVI A, 41 OUT UATDAT IN UATCNT ANI 02 JZ LOOP1 IN UATDAT STA 4200 HLT

Comments

Initialization of 8253

Resetting the 8251A

Initialization of 8251A

Check 8251As TxEMPTY and then send the data 41 to 8251A

Check 8251As RxRDY and then get the data and store at 4200

Result: The data byte has been successfully transferred serially using 8251.

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Ex No: 6 ADC Interfacing with 8085 ______________________________________________________________________________

Aim: To perform ADC interfacing with 8085p kit using assembly language.

Apparatus Required: 1. 2. 3. 4. 8085p kit CRO ADC Interface board Power Chord

Theory: In a real time applications, processing of input data, conversion of data from digital to analog and vice versa, are indispensable. The following program initiates the analog to digital conversion process, checks the EOC pin of ADC 0809 as to whether the conversion is over and then inputs the data to the processor. It also instructs the processor to store the converted digital data in the memory. ADC: HARDWARE DETAILS: ADC 0809 is a monolithic CMOS device, with an 8-bit analog-to-digital converter, 8channel multiplexer and microprocessor compatible control logic. Selected Analog Channel IN0 IN1 IN2 IN3 IN4 IN5 IN6 IN7 ADDRESS LINE ADD B 0 0 1 1 0 0 1 1

ADD C 0 0 0 0 1 1 1 1

ADD A 0 1 0 1 0 1 0 1

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The main features of ADC 0809 are: 1. 2. 3. 4. 5. 6. 8 bit resolution 100s conversion time 8 channel multiplexer with latched control logic No need for external zero or full scale adjustment Low power consumption 15mW. Latched tristate output.

The device 0809 contains an 8 channel single ended analog signal multiplexer. A particular input channel is selected by using the address decoding. The above featured table shows the input states for address lines to select any channel. The address is latched into the decoder of the chip on low to high transition of the ALE. The A/D converters successive approximation register is reset on the positive edge of the start conversion pulse. The conversion begins at the falling edge of the SOC pulse. End of Conversion will go low between 0 and 8 clock pulses after the rising edge of start of conversion. Algorithm: 1. Start the program. 2. Give start of conversion pulse and set the data. 3. Check for the end of conversion pulse. 4. Store the digital data in the memory. 5. Stop the program. Procedure: 1. 2. 3. 4. Place jumper J2 in A position. Place jumper J5 in A position. Enter and execute the program Vary the analog input (using trimpot) and verify the digital data displayed with that data stored in memory location 4150h.

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Program: Address 4100 4102 4104 4106 4108 410A 410C 410D 410E 410F 4111 4113 4115 4117 4119 411C 411E 4121
Operand & Opcode

Label START

Mnemonics MVI A, 10 OUT 0C8H MVI A, 18 OUT 0C8H MVI A,01 OUT 0D0H XRA A XRA A XRA A MVI A, 00 OUT 0D0H IN 0D8H ANI 01 CPI 01 JNZ Loop IN 0C0H STA 4150 HLT

Comments A 10 A C8 A18 AC8 A01 AD0 AA | A AA | A AA | A A00 AD0 AD8 AA&01 Compare A with 01 Jmp if Z=1 AC0 [4150]A Stop Sel Ch:0 and make ALE low Make ALE High SOC signal high Delay

3E, 10 D3, C8 3E, 18 D3, C8 3E, 01 D3. D0 AF AF AF 3E, 00 D3, DO DB, D8 E6 01 FE 01 C2, 13, 41 DB, C0 32, 50, 41 76

Loop

SOC signal low Check for EOC

Read data from ADC

Observation: Vin Analog VoltageSet at input of Digital Output seen in LED ADC

Digital Output Stored inmemory location 4150

Result: ADC interfacing with 8085p using assembly language is done successfully.
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Ex. No: 7 8051 ARITHMETIC OPERATIONS ______________________________________________________________________________ AIM:To perform arithmetic operations in 8051 Microcontroller using assembly level programming. A) 16 Bit addition B) 8 Bit subtraction C) 8 Bit multiplication D) 8 Bit Division 7(A) 8051 ARITHMETIC OPERATIONS (16-BIT ADDITION)

APPARATUS REQUIRED S. No 1 2 Item description 8051 Microcontroller Kit Power Supply Unit Qty 1 1

THEORY/DESCRIPTION As there is only one 16-bit register in 8051, 16-bit addition is performed by using ADDC instruction twice i.e., adding LSB first and MSB next. ALGORITHM: 16 BIT ADDITION 1. Start the program. 2. Get the LSB of 1st and 2nd operands. 3. Add the LSB of the two operands and store it in memory. 4. Get the MSB of 1st and 2nd operands. 5. Add the MSB and store the result in memory 6. Stop the program.

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FLOWCHART

PROGRAM

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7(B)

8051 ARITHMETIC OPERATIONS (8-BIT SUBTRACTION)

APPARATUS REQUIRED S. No 1 2 Item description 8051 Microcontroller Kit Power Supply Unit Qty 1 1

THEORY/DESCRIPTION Using the accumulator, subtraction is performed and the result is stored. Immediate addressing is employed. The SUBB instruction writes the result in the accumulator. ALGORITHM 1. Start the program 2. Clear the carry flag and load the first operand in accumulator. 3. Get the 2nd Operand and subtract it from the accumulator. 4. Store the result in memory 5. Stop the program. FLOWCHART

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PROGRAM

7(C)

8051 ARITHMETIC OPERATIONS (8-BIT MULTIPLICATION)

APPARATUS REQUIRED S. No 1 2 Item description 8051 Microcontroller Kit Power Supply Unit Qty 1 1

THEORY/DESCRIPTION The 8051 has a MUL instruction unlike many other 8-bit processors. MUL instruction multiplies the unsigned eight-bit integers in A and B. the low-order byte of the product Is left in A and the high-order byte in B. If the product is >255, the overflow flag is set. Otherwise it is cleared. The carry flag is always cleared. ALGORITHM 1. Start the Program 2. Load the 1st operand in A and 2nd Operand in B. 3. Multiply A and B contents using MUL Instruction 4. Store the result in memory 5. Stop the program.

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FLOWCHART

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PROGRAM

7(D)

8051 ARITHMETIC OPERATIONS (8-BIT DIVISION)

APPARATUS REQUIRED S. No 1 2 Item description 8051 Microcontroller Kit Power Supply Unit Qty 1 1

THEORY/DESCRIPTION The 8051 has a DIV instruction unlike many other 8-bit processors. DIV Instruction divides the unsigned 8-bit integer in A by the unsigned 8-bit integer in register B. The Accumulator receives the integer part of the quotient and register B receives the integer remainder. The carry and ov flags will be cleared. ALGORITHM 1. Start the Program. 2. Get 1st operand in A and 2nd in B. 3. Divide A by B Contents using division instruction. 4. Store the result in memory 5. Stop the program.

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FLOWCHART

PROGRAM

Result: All the arithmetic operations using 8051c are practiced successfully.
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Ex. No: 8 SEARCHING _____________________________________________________________________________ AIM: To find the biggest number in an array of 8-bit unsigned numbers of predetermined length. APPARATUS REQUIRED S. No 1 2 Item description 8051 Microcontroller Kit Power Supply Unit Qty 1 1

DESCRIPTION To find the biggest number in an array, the contents of the array must be compared with arbitrary biggest number. In this experiment, Since all numbers are said to be unsigned 8-bit number, let internal memory location (say 40H) has the digest number i.e. zero. Now compare the first number with internal memory location. If it is greater, move it to a internal memory location. Further comparison is with this biggest number and this comparison is done till the end of the array. Now the biggest number I internal memory location is stored in memory as the result.

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FLOWCHART

Start 1 Initialize Counter and Pointer Decrement Pointer & Increment Counter Load internal memory location 40H with 0 2 Get Current element of array in A Is Count =0? YES IS 40H=(A)
1

NO 2

YES

STORE(40H) in Menory

NO STOP IS (40H)<A ?
1

NO

YES Move A into 40H Location

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PROGRAM Address 4100 4103 4106 4108 4109 410C 410D 410F 4111 4112 4114 4116 4118 Label Mnemonics MOV DPTR, #4200 MOV 40H, #00 MOV R5, #0AH MOVX A, @DPTR CJNE A, 40H, LOOP1 INC DPTR DJNZ R5, LOOP2 MOV A, 40H MOVX @DPTR, A SJMP HLT JC LOOP3 MOV 40H, A SJMP LOOP3 Comments

LOOP2 LOOP3

HLT LOOP1

RESULT Thus the biggest number in an array is found and verified.

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Ex. No: 9 SERIAL COMMUNICATIONS ______________________________________________________________________________ AIM: To perform serial communication of data using 8051 microcontroller. APPARATUS REQUIRED S. No 1 2 Item description 8051 Microcontroller Kit Power Supply Unit Qty 1 1

ALGORITHM 1. Start the Program. 2. Initialize the timer 1 in auto reload mode. 3. Load the count value in TH1. 4. Initialize TCON and Set timer1 in run bit. 5. Get the data to be transmitted in the SBUF. 6. Copy the data of SCON in to the accumulator. 7. If RI =1 reset RI and copy the content of SBUF in to a memory location; else if RI!=1 then again more the SCON value in to accumulator. 8. Store the result in memory. 9. Stop.

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FLOWCHART
START Initialize timer1 in auto reload mode

Load the count TH1 Initialize TCON to set timer1 run bit

Initialize SCON Get the data to be transmitted in SBUF

Move SCON to accumulator

IS RI Set

Reset RI

Move the content of SBUF to accumulator

Store the result in memory

STOP

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Baud Rate=

2 S MOD clockFrequency 32 D 12FF TH 1

20 12 10 6 9600 32 D 12FF TH 1 12-12TH1=39.0625 TH1=FB TMOD Gate 0 =20H TCON TF1 0 =40H SCON 0 =58H 1 0 1 1 0 0 0 1 TR1 0 TF0 TR0 0 0 IE1 0 IT1 0 IE0 0 IT0 0 C/T 1 M1 M0 0 0 Gate 0 C/T 0 M1 0 M0

OBSERVATION Input Data to SBUF is A6 Output Address: 4200 Data : A6

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PROGRAM Address 4100 4103 4106 4109 410C 410F 4111 4113 4115 4117 4119 411C 411D Opcode & Operand 75 89 20 75 8D FB 75 88 40 75 98 58 75 99 A6 E5 98 54 01 70 FA C2 98 E5 99 90 42 00 F0 80 FE Label Mnemonics MOV TMOD, #20 MOV TH1, #FB MOV TCON, #40 MOV SCON, #58 MOV SBUF, #A6 MOVA, SCON ANL A, #01 JZ XX CLR SCON.0 MOV A, SBUF MOV DPTR. #4200 MOVX @DPTR, A SJMP 411D Comments

XX

RESULT The program for serial communication using 8051 microcontroller was executed successfully and the output was verified.

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Ex. No: 10 DAC INTERFACING WITH 8051 PROGRAM ______________________________________________________________________________ AIM: To interface 8051 microcontroller with DAC and generate the following waves. 1. Square Wave 2. Saw tooth Wave 3. Triangular Wave APPARATUS REQUIRED S. No 1 2 3 Item description 8051 Microcontroller Kit DAC Interface Board Power Supply Unit Qty 1 1 1

THEORY/DESCRIPTION MicroProcessor &Interfacing Ramesh Goankar. ALGORITHM: SQUARE WAVEFORM GENERATION 1. Start 2. Move the port address of the DAC to DPTR 3. Clear the accumulator 4. Move the contents of accumulator to the DAC Port. 5 Call delay 6. Move the Value of FF to A 7. Move the contents of the accumulator to DAC port 8. Call delay 9. Stop

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DELAY: 1. Load Count 2. Load the second count 3. Loop till the count is zero. 4. Jump to main Program.

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FLOWCHART: SQUAREWAVE GENERATION

start Move the port address of DAC to DPTR

Clear accumulator and move the content of A to the DAC Call Delay

Move the value FF to accumulator and move A to DAC port

Call Delay

Stop DELAY

Load value 05 in R1 Load the Value of R2 Decrement R2

If R2=0

Decrement R1

If R1=0

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PROGRAM Address Label Mnemonics 4200 MOV DPTR, #FFC0 4203 LL MOV A, #00 4205 MOVX @DPTR, A 4206 LCALL DELAY 4209 MOV A, #FF 420B MOVX @DPTR, A 420C LCALL DELAY 420F LJMP LL 4100 4102 4104 4106 4108 MOV R1, #05 MOV R2, #FF DJNZ R2, YY DJNZ R1, XX RET Opcode 90 CO FF 74 00 FO 12 41 00 74 FF FO 12 41 00 02 42 03 79 05 7A FF DA FE D9 FA 22 Comments

XX YY

ALGORITHM: SAWTOOTH WAVEFORM GENERATION 1. Start 2. Clear the accumulator by loading data 00 3. Move the content of accumulator in to DPTR 4. Increment accumulator content. 5. Jump to the previous instruction.

PROGRAM: SAWTOOTH WAVEFORM GENERATION Address 4200 4203 4205 4206 4207 Label Mnemonics MOV DPTR, #FFCO MOV A, #00 LL MOVX @DPTR, A INC A SJMP LL Opcode 90 FF CO 74 00 FO 04 80 FC Comments

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ALGORITHM: TRIANGULAR WAVEFORM GENERATION 1. Start 2. Load the port address to DPTR 3. Load the value of accumulator to the port address. 4. Increment accumulator. 5. Jump on NO zero to loop1 6. Move data FF into the accumulator. 7. Decrement the value of accumulator. 8. Jump if No zero , Stop.

PROGRAM: TRIANGULAR WAVEFORM GENERATION Address 4200 4203 4205 4206 4207 4209 420B 420D 420F RESULT The Program for interfacing 8051 with DAC to generate square, saw tooth and triangular waveform was executed and verified successfully. Label START LOOP1 Mnemonics MOV DPTR, #FFCO MOV A, #00 MOVX @DPTR, A INC A JNZ LOOP1 MOV A, #FF MOVX @DPTR, A JNZ LOOP2 LJMP START Opcode 90 FF CO 74 00 FO 04 70 FC 74 FF F0 02 42 03 Comments

LOOP2

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Ex. No: 11 STEPPER MOTOR INTERFACING WITH 8051 ______________________________________________________________________________ AIM: To interface a stepper motor with 8051 microcontroller and determine the angle. APPARATUS REQUIRED S. No 1 2 3 Theory: Stepper motor is a widely used device that translates electrical pulses into mechanical movement. Stepper motor is used in applications such as; disk drives, dot matrix printer, robotics etc,. The construction of the motor is as shown in figure 1 below. Item description 8051 Microcontroller Kit Stepper Motor Interface Board Power Supply Unit Qty 1 1 1

Figure 1: Structure of stepper motor It has a permanent magnet rotor called the shaft which is surrounded by a stator. Commonly used stepper motors have four stator windings that are paired with a center tapped common. Such motors are called as four-phase or unipolar stepper motor.
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The stator is a magnet over which the electric coil is wound. One end of the coil are connected commonly either to ground or +5V. The other end is provided with a fixed sequence such that the motor rotates in a particular direction. Stepper motor shaft moves in a fixed repeatable increment, which allows one to move it to a precise position. Direction of the rotation is dictated by the stator poles. Stator poles are determined by the current sent through the wire coils. Step angle: Step angle is defined as the minimum degree of rotation with a single step. No of steps per revolution = 360 / step angle Steps per second = (rpm x steps per revolution) / 60 Example: step angle = 2 No of steps per revolution = 180 Switching Sequence of Motor: As discussed earlier the coils need to be energized for the rotation. This can be done by sending a bits sequence to one end of the coil while the other end is commonly connected. The bit sequence sent can make either one phase ON or two phase ON for a full step sequence or it can be a combination of one and two phase ON for half step sequence. Both are tabulated below. Full Step: Two Phase ON

One Phase ON

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Half Step (8 sequence): The sequence is tabulated as below:

8051 Connection to Stepper Motor:

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PROGRAM: 1. To run a Stepper motor at different speed. Address 4100 4100 4103 4105 4106 4108 410A 410D 410F 4111 4113 4115 4117 4119 411A 411C 411E 411F 4121 4123 4500 Exercise: 1. To run a stepper motor for require Angle within 360 degrees. 2. To run the Stepper motor in both forward & reverse direction with delay. RESULT The program for interfacing a Stepper motor with an 8051 microcontroller was done successfully and the output was verified to run Stepper motor at different speed. Opcode Label START: JO: Mnemonics ORG 4100 MOV DPTR, #4500H MOV R0, #04 MOVX A, @DPTR PUSH DPH PUSH DPL MOV DPTR, #FFCOH MOV R2, #04H MOV R1, #FFH MOV R3, #FFH DJNZ R3, DLY DJNZ R1, DLY1 DJNZ R2, DLY1 MOV @DPTR, A POP DPL POP DPH INC DPTR DJNZ R0, J0 SJMP START END Comments

DLY1: DLY:

09,05,06,0A TABLE: DB 09,05,06,0A

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Ex. No: 12 8086 p ARITHMETIC OPERATIONS AIM: To perform arithmetic operations using 8086 assembly language programming for the following: 1. 16 bit Addition 2. 16 bit Subtraction 3. 16 bit Multiplication 4. 16 it Division

A) 16-BIT ADDITION APPARATUS REQUIRED S. No 1 2 Item description 8086 Microprocessor Kit Power Supply Unit Qty 1 1

THEORY/DESCRIPTION The add instruction requires either the addend or the augend to be in a register, unless the source operand is immediate since the addressing modes permitted for the source and destination are register-register, memory to register, register to memory, register to immediate, and finally memory to immediate. Hence one of the operands is initially moved to AX. Then using the add instruction, 16- bit addition is performed. PROCEDURE 1. Enter the Opcode in RAM memory from location 1000 using ADD command. 2. Using STEP command, execute the program instruction by instruction. 3. After each instruction verified register contents and see that they are initialized to the required values.

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ALGORITHM : ADDITION 1. Load input numbers to be added. 2. Add the numbers and store in AX 3. Store output in memory location 1200 4. Stop the program.

PROGRAM: 16-BIT ADDITION Address 1000 1004 1008 100C Label Mnemonics MOV AX, [1100] ADD AX, [1102] MOV [1200], AX HLT Comments AX<-[1100] [AX]<-[AX]+[1102] [1200]<-[AX] STOP

FLOWCHART: 16-BIT ADDITION

START

Load Input data

Add the two datas

Store the Result

Stop

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B) 16-BIT SUBTRACTION APPARATUS REQUIRED S. No 1 2 Item description 8086 Microprocessor Kit Power Supply Unit Qty 1 1

THEORY The next arithmetic primitive is SUB. As discussed in ADD it permits the same modes of addressing. Hence moving the minuend to a register pair is necessary. Then the result is moved to a location in memory. PROCEDURE 1. Enter the Opcode in RAM memory from location 1000 using SUB command 2. Using STEP command, execute the program instruction by instruction 3. After each instruction verified register contents and see that they are initialized to the required values. ALGORITHM: SUBTRACTION 1. Load the two numbers to be subtracted 2. Subtract the numbers and store in AX. 3. Store the output in memory location 1200 4. Stop the program.

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FLOWCHART: SUBTRACTION

START

Load Input data

Subtract the two data

Store the Result

Stop

PROGRAM: 16-BIT SUBTRACTION Address 1000 1004 1008 100C Label Mnemonics MOV AX, [1100] SUB AX, [1102] MOV [1200], AX HLT Comments AX<-[1100] [AX]<-[AX]-[1102] [1200]<-[AX] STOP

C) 16-BIT MULTIPLICATION APPARATUS REQUIRED S. No 1 2 Item description 8086 Microprocessor Kit Power Supply Unit Qty 1 1

THEORY/DESCRIPTION The 8086 Processor provides both signed and unsigned multiply in their instruction set to overcome the loss of efficiency in performing the repeated addition.The MUL instruction can
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have both 16 and 8 bit operands and the multiplicand is AX or AL, accordingly the result for a byte multiply is a 16 bit number in AX while that for a word multiply is a 32 bit number, the lower word of which is in AX and the higher word in DX. PROCEDURE 1. Enter the opcodes in ram memory from location 1000 using SUB command 2. Using STEP command, execute the program instruction by instruction 3. After each instruction verified register contents and see that they are initialised to the required values ALGORITHM: 16-BIT MULTIPLICATION 1. Load two 16-bit numbers in to registers. 2. Multiply contents of both registers 3. MSB and LSB is stored in 1200 & 1202 respectively 4. Stop the Program. FLOWCHART: 16-BIT MULTIPLICATION
START

Load Input multiplier and multiplicand

Multiply the two data

Store the Result

Stop

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PROGRAM : 16-BIT MULTIPLICATION Address 1000 1004 1008 100C 1010 Opcode & Operand Label Mnemonics MOV AX, [1100] MOV BX, [1102] MUL BX MOV [1200], BX MOV[1202], AX Comments

D) 8086 16-BIT DIVISION APPARATUS REQUIRED S. No 1 2 Item description 8086 Microprocessor Kit Power Supply Unit Qty 1 1

THEORY/DESCRIPTION Using the DIV Instruction of 8086, both division of a double word by a word and a word by a byte can be performed. For the first case, the lower order word of the dividend is in AX and the higher order word is in DX. The quotient is in AX and remainder in DX. For the second case, the dividend is in AL, the quotient is in AL and the remainder is in AH. ALGORITHM: 32-BIT DIVISION 1. Load two 16-bit numbers in to registers. 2. Divide contents of both registers 3. Store the remainder and quotient. 4. Stop the Program.

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FLOWCHART: 32-BIT DIVISION

START

Load Input dividend and divisor

Perform the two data

Store the Result

Stop

PROGRAM: 32-BIT DIVISION Address 1000 1004 1008 100C 1010 1014 1018 PROCEDURE 1. Enter the opcodes in ram memory from location 1000 using SUB command. 2. Using STEP command, execute the program instruction by instruction. Opcode & Operand Label Mnemonics MOV DX, [1100] MOV AX, [1102] MOV CX, [1104] DIV CX MOV [1200], AX MOV [1202], DX HLT Comments

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Department of Electronics & Media Technology

Karunya University

3. After each instruction verified register contents and see that they are initialized to the required values.

RESULT Thus, the features of the Intel 8086 microprocessors were studied and operations of the corresponding kits were understood. Also 16-bit arithmetic operations are performed and verified.

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