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Placement Driven Training - Advanced Level

This document outlines the curriculum for several certificate courses in VLSI design and digital circuit implementation. The courses cover digital logic design, Verilog HDL, FPGA implementation, ASIC design flows, analog circuit design, and placement-driven training. Students will learn both theoretical concepts and practical skills through projects and hands-on labs using industry-standard EDA tools. Courses are taught by experts with over 13 years of experience and provide placement assistance for qualifying students.

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Sakthi T Vel
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52 views

Placement Driven Training - Advanced Level

This document outlines the curriculum for several certificate courses in VLSI design and digital circuit implementation. The courses cover digital logic design, Verilog HDL, FPGA implementation, ASIC design flows, analog circuit design, and placement-driven training. Students will learn both theoretical concepts and practical skills through projects and hands-on labs using industry-standard EDA tools. Courses are taught by experts with over 13 years of experience and provide placement assistance for qualifying students.

Uploaded by

Sakthi T Vel
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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For M.Tech (VLSI Design)/M.E (Applied Electronics)/ B.

Tech-ECE Final Year MODULE 1 - FPGA Implementation Advanced Level Training (150 Hours)
DIGITAL DESIGN Introduction to Digital logic Number Systems Boolean algebra Boolean minimization Combinational circuit design- Theory & Practical Sequential circuit design - Theory & Practical Finite State Machine (FSM) Design - Theory & Practical Designing complex digital circuits - Theory & Practical Logic families Miscellaneous concepts

VERILOG HDL

Introduction to HDLs Basic constructs Syntax Modeling styles Combinational circuit design - Theory & Practical Sequential circuit design -- Theory & Practical Finite state machine design - Theory & Practical Digital system design - Theory & Practical Simulation & Synthesis issues - Theory & Practical

ADVANCED FPGA IMPLEMENTATION


Evolution of Programmable logic FPGAs Vs ASICs Xilinx FPGA Architecture o Essential Building blocks o LUT o Slices o CLBs o Block Memories o DSP / Multipliers o Clock Management components o Processor o IO Pins

Reading reports Pin Assignments Timing & Area Constraints - Theory & Practical Memories & FIFOs - Theory & Practical Timing closure strategy - Theory & Practical Power estimation - Theory & Practical Floor planning the design - Theory & Practical FPGA Board Overview FPGA Configuration FPGA Design flow & Implementation - Theory & Practical Spartan 3 & Spartan 6 FPGA Kits- Theory & Practical Mini Project Fees: Rs. 30,000/- [Full Payment] Minimum = 20 Students/ Batch Maximum = 30 Students/ Batch

FPGA Implementation Advanced Level Training (100 Hours)


Simulink/ Matlab to VHDL / Verilog Conversion System Generator- Practical Xilinx Chip Scope Pro On board Logic Analyzer Hands on training on Virtex FPGA bords Mini Project Fees: Rs. 20,000/- [Full Payment] Minimum = 20 Students/ Batch Maximum = 30 Students/ Batch

Certificate Course
MODULE 2 - Semi-Custom ASIC Design Advanced Level Training (200 Hours)
ADVANCED VERILOG HDL

Introduction to HDLs Basic constructs Syntax Modeling styles - Theory & Practical Combinational circuit design - Theory & Practical Sequential circuit design - Theory & Practical Finite state machine design - Theory & Practical Digital system design - Theory & Practical Simulation & Synthesis issues - Theory & Practical Unwanted Latches Clock-gating - Theory & Practical Clock-domain crossing issues - Theory & Practical Low power techniques - Theory & Practical RTL Design strategies - Theory & Practical

OVERVIEW OF ASIC EDA FLOW


Logic Synthesis Concepts - Theory & Practical Logic Minimization - Theory & Practical FSM Minimization - Theory & Practical Optimization Techniques - Theory & Practical Basic Timing Concepts - Theory & Practical Fixing Setup, Holdtime violations - Theory & Practical Formal Verification - Theory & Practical Design-For-Testability - Theory & Practical Scan Insertion - Theory & Practical BIST - Theory & Practical Placement - Theory & Practical Routing - Theory & Practical Floor planning - Theory & Practical Parasitic Extraction - Theory & Practical Back-Annotation - Theory & Practical GDS-II - Theory & Practical

DIGITAL IC DESIGN Introduction to ASIC Design Introduction to Standard Cell Libraries ( 180nm, 90nm, 45nm ) Synthesizable RTL coding Guidelines RTL Synthesis ( 180nm, 90nm, 45nm - Theory & Practical) Low Power RTL Synthesis- Clock Gating, Power Gating- Theory & Practical Hands on RTL design & RTL Synthesis- Theory & Practical Testing Verification Scripting -TCL - Theory & Practical

Backend Design- Hands on Training Physical Design Flow- Theory & Practical Static Timing Analysis- Theory & Practical Fixing timing Violations- Theory & Practical Global and Detailed Routing- Theory & Practical DRC / LVS- Theory & Practical Hands On Physical Design- Theory & Practical GDSII file generation - Theory & Practical Mini Project

Fees: Rs. 50,000/- [Full Payment]

Minimum = 15 Students/ Batch Maximum = 20 Students/ Batch

Certificate Course
MODULE 3 - Analog IC Design (Full Custom ASIC Design) Advanced Level Training (200 Hours)
Introduction to Analog IC Design Circuit Design Concepts- Theory & Practical Opamp Design- Theory & Practical Current Mirrors- Theory & Practical Low Power Analog Circuit Design Styles - Theory & Practical Functional Simulation- Theory & Practical Transient Analysis- Theory & Practical DC Sweep analysis- Theory & Practical Parametric Simulation & Analysis- Theory & Practical AC Analysis- Theory & Practical Monte Carlo Simulation- Theory & Practical Waveform calculator- Theory & Practical Layout Design-Full Custom- Theory & Practical Schematic Driven Layout (180nm, 90nm, 45nm) - Theory & Practical DRC, ERC, LVS- Theory & Practical Parasitic Extraction- Theory & Practical Back Annotation- Theory & Practical Post Layout Simulation- Theory & Practical GDSII file generation - Theory & Practical Introduction to IC fabrication Techniques -Theory Introduction to IC packaging Theory Mini Project Course Fee: Rs. 50,000/- [Full Payment] Minimum = 15 Students/ Batch Maximum = 20 Students/ Batch

Professional Certificate Course on VLSI Design Placement Driven Training (600 Hours)

100% Placement assistance* (90% Attendance, Based on the score of Written Test and Mock Interviews) Reference will be given Expert Faculty with experience of more than 13 Yrs Guest lecture & Training from the VLSI Industries Cutting-edge syllabus Industrial & Research oriented tools for lab works and Project executions Makes you Industry-Ready Affordable fees Regular Test Mock Interviews 30% Theory, 70% Practical sessions Support for Main Project

MODULE 1, 2 & 3
Course Fee: Rs. 1,20,000/- [Full Payment]

Minimum = 15 Students/ Batch Maximum = 20 Students/ Batch

Certificate Course on VLSI Design Basic Level (300 Hours)


Expert Faculty with experience of more than 13 Yrs Cutting-edge syllabus Industrial & Research oriented tools for lab works and Project executions Makes you Industry-Ready Affordable fees 30% Theory, 70% Practical sessions

MODULE 1, 2 & 3
Course Fee: Rs. 75,000/- [Full Payment]

Minimum = 15 Students/ Batch Maximum = 20 Students/ Batch

Registration Closes on 01-03-2013 Course Commencement 2nd week of April 2013 Classes: Saturdays, Sundays & Summer Vacation

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