Mano ComputerLogicDesign
Mano ComputerLogicDesign
=42[o1101110
=42[ 10010010
f 1 C +
} ‘
:
e[oroiii0 B[ 10010010
(a)Read : (D) (BY (b) Write: (B) = store word in memory register
Go to fetch cycle
Output:
@M}) + D, ({Op]) > decoder transfer address
( store word in memory
Go to fetch cycle
The input and store operations are similar, as are the output and load
operations, the difference being only that the Pregister is used for the
former and the A register for the latter
When the operation code represents a unary or a branch-type instruction,
the memory is not accessed for an operand and the execute cycle is
skipped. The instruction is completed with the execution of one elementary
operation, which can occur at the same time that the instruction word is
restored back into memory during the conclusion of the fetch cycle. This
elementary operation is listed in Table 10-2 under the column heading
“function.” The unary operations are executed in the A register. The
branch-unconditional instruction causes a transfer of the address part into
the C register. The branch-on-zero instruction causes the same transfer if
(A) = 0; if (A) # 0, the address of the next instruction in the C register is
left unchanged.
The computer sequence of operations is summarized in a flow chart in
Fig. 103, Note that the completion of an instruction always follows a
return to the fetch cycle to read the next instruction from memory.
‘An Example
We shall illustrate the use of the machine-code instructions of the simple
computer by writing a program that will accept instructions or data words
from the P register and store them in consecutive registers in memory
starting from address 0. The program that will process this input informa-
tion is to be stored in memory registers starting from address 750. The
program in machine-code instructions is listed below. The mnemonic name
of the operation is entered instead of its binary code,
Memory Instruction
Location Operation Address Function
750 Input 000 = ) =B read instruction
(8) =