2011 IEEE

Proceedings of the 33rd IEEE International Telecommunications Energy Conference (INTELEC 2011), Amsterdam, Netherlands,
October 9-13, 2011.
The Essence of Three-Phase PFC Rectier Systems
J. W. Kolar
T. Friedli
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JHC SSCHCC O JHICC-1HdSC 1L HCC!IHCI bS!CHS
JOHdHH . Odl dHG JHOHdS lICGI
Power Electronic Systems Laboratory (PES), ETH Zurich
8092 Zurich, Switzerland, kolarUlem. ee. ethz. ch
A0xlracl-n this paper, three-phase PFC rectifer topologies with
sinusoidal input currents and controlled output voltage are derived from
known single-phase PFC rectifer systems and/or passive three-phase
diode rectifers. The systems are classifed into hybrid and fully active
PWM boost-type or buck-type rectifers, and their functionality and basic
control concepts are briefy described. This facilitates the understanding
of the operating principle of three-phase PFC rectifers starting from
single-phase systems, and organizes and completes the knowledge base
with a new hybrid three-phase buck-type PFC rectifer topology denomi
nated as 5WISS Rectifer. In addition, analytical formulas for calculating
the current stresses on the power semiconductors of selected topologies
are provided, and rectifer systems ofering a high potential for industrial
applications are comparatively evaluated concerning the semiconductor
stresses, the loading and volume of the main passive components, and
the DM and CM EMI noise level.
Finally, core topics of future research on three-phase PFC rectifer
systems are discussed, such as the analysis of novel hybrid buck
type PFC rectifer topologies, the direct input current control of buck
type systems, the multi-objective optimization of PFC rectifer systems
concerning efciency and power density, and the investigation of the
system performance sensitivity to semiconductor and passive components
technology.
fndcx Icrmx-acdc converter, PWM rectifer, PFC rectifer, PFC,
boost, buck, three-phase, single-phase, VIENNA Rectifer, 5WISSRectifer,
overview, review.
I . INTRODUCTION
The power electronics supply of high power electrical systems from
the three-phase ac mains is usually carried out in two stages, i . e.
the mains ac voltage i s frst converted into a dc voltage and then
adapted to the load voltage level with a dc-dc converter with or
without galvanic isolation (cf. Fig. 1) . Ofen only one direction of
power fow has to be provided; furthermore, coupling to the mains
i s typically implemented over only three conductors, i . e. without a
neutral conductor.
In the simplest case, the rectifcation can be done by unidirectional
three-phase diode rectifers with capacitive smoothing of the output
voltage and inductors on the ac or dc side (cf. Fig. 2). The low
complexity and high robustness (no control, sensors, auxiliary sup
plies or EMI fltering) of this concept must, however, be weighed
against the di sadvantages of relatively high effects on the mains and
an unregulated output voltage directly dependent on the mains voltage
level .
The mains behavior of a power converter is characterized in general
by the power factor A, andor the fundamental current-to-voltage
displacement angle 1, and the total harmonic distortion of the input
current, IHD,,which are related by the equation
1
A cos I
i+IHD,
(I)
The conduction state of the passive rectifers shown in Figs. 2(a)
and (b) i s essentially determined by the mains line-to-line voltages,
whereby only two diodes carry current at the same time, except the
commutation intervals. Thi s means that each diode of the positive
and negative bridge halves carries current only for one third of
the mains period, i . e. for 120. Hence, the phase currents for
978-1 -4577-1250-0/111$26.00 2011 IEEE
industrially applicable values of the smoothing inductance show 60
wide intervals with zero current that result in a relatively high low
frequency harmonic content or a IHD, 30%. In order to avoid
voltage distortions resulting from voltage drops across the inner
(inductive) mains impedance or the excitation of resonances in the
distribution grid a IHD, < 5% at rated power is ofen required.
For aircraf on-board power supplies, relatively high inner mains
impedances exi st and thus even stricter limits, i . e. a IHD,< 3% (cf.
DOI60F, MIL-46IE) , have to be fulflled. Thi s mains current quality
can be achieved only by means of active Power Factor Correction
(PFC) rectifer systems.
It should be noted that for three-phase systems, the generally
used designation llC kcc/cr is partly misleading, since passive
rectifers, for industrially used values of the smoothing inductance
X,!/|, 0. 05 . . . 0. 15 according to Figs. 2(e) and (I] , already
exhibit a high power factor of A 0. 9 . . . 0. 95 because of the
low phase-shif of the power-forming mains current fundamental
component and the associated phase voltage (cf. (I) for cos I 1
and IHD, 30%, [I] , [2] ) . PFC rectifers hence achieve with regard
to the mains current (at rated operation) above all a reduction of the
current harmonics but only a slight improvement in the power factor
,A > 0. 99 at the rated operating point is typically targeted).
A further important aspect of the use of active (PFC) rectifer
systems i s the possibility to control the output dc voltage to a constant
value, independent of the actual mains voltage (Europe: :,,,,,,,
400 V; USA, Japan: :,,,,,,, 200 V, :,,,,,,, denominates the
rms value of the mains line-to-line voltage). A converter stage on
the output side (cf. Fig. 1) can thus be dimensioned to a narrow
voltage range. The mains voltage range must be considered only for
the dimensioning of the rectifer stage (the delivery of a given rated
power, e. g. at half of the input voltage, leads to a doubling of the
input current that must be mastered by the power semiconductors,
U { I
C DC

U { I
C DC

U {
C DC _
:
Fig. 1. Block diagrams of typical converter confgurations for supplying
electrical loads from the three-phase ac mains. a) Three-phase ac-dc converter
with non-isolated dc-dc converter (e. g. for the coupling of dc distribution sys
tems to the three-phase mains or as a mains interface for high-power isolated
loads, e. g. lighting systems). b) Three-phase ac-dc converter with isolated dc
dc converter (e. g. for telecom power supplies, welders, or induction heating
systems). c) Three-phase ac-dc converter and three-phase dc-ac converter
(inverter) without isolation (e. g. for variable speed drives).
2
{
U
L
/
,
h

C
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a)
H
600
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c) t(ms)
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'

0.7
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+
0.1 0.15 0.20 0.25
+(,,.
!
F

O
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Fig. 2. Passive three-phase diode rectifcation. a) Smoothing inductors 1 on the ac side. b) Smoothing inductor 1 on the dc side. c) and d) Corresponding
input current waveforms. e) and O Resultant global average value ! __ of the output voltage U__ and power factor X at the input. (Simulation parameters :
rms line-to-line voltage !,,,

,, 400 V, mains frequency ] 50 Hz, smoothing capacitance on the dc side C Iu, and smoothing inductance
1 [lmH . . . 45 mH]. )
passive power components and the EMI flter) or a relatively high
and well-defned voltage level i s available for the generation of the
output (load) voltage [cf. Fig. l(c)] .
The requirements placed on active PFC recti fer systems may thus
be summarized as follows:
sinusoidal input current according to regulations regarding the
mains behavior of three-phase rectifer systems (EN 61 000-3-2
if < 16 A, 61 000-3-4 if > 16 A) ; in industry, however, typically
independent of the concrete application, a IHD, < 5% is
required (at the rated operating point) ;
ohmic fundamental mains behavior (cos ,I; > 0. 99) ;
regulated output voltage; depending on the required level of
the output dc voltage relative to the mains voltage, a system
with boost- , buck- or buck-boost-type characteri stic has to be
provided;
mastering of a mains phase failure, i . e. for interruption or
voltage collapse of one mains phase, continued operation at
reduced power and unchanged sinusoidal current shape should
be possible;
unidirectional power fow, perhaps with (limited) capability of
reactive power compensation. Ofen, because of the supply
of a purely passive load (e. g. telecom power supply), only
unidirectional energy conversion has to be provided or as for
aircraf on-board power supplies, no feedback of energy into
the mains i s permitted;
compliance with specifcations regarding electromagnetic, espe
cially conducted interference emissions by means of suitable
EMI fltering.
The designation /hrcc-husc llC rcc/cr chosen in thi s paper
implies both sinusoidal mains current shaping and regulation of the
dc output voltage. Here, it should be noted that an active harmonic
flter [3] of lower rated power arranged in parallel to a passive
rectifer system would also enable a sinusoidal mains current, but
no regulation of the output voltage. Accordingly, because of the
system-related advantage of a constant supply voltage of a load side
converter, a PFC rectifer system is ofen preferred over active fltering
despite the larger implementation effort, i. e. the conversion of the
entire output power.
Parallel to the development of single-phase PFC rectifer circuits,
numerous concepts for three-phase PFC rectifer systems have been
proposed and analyzed over the last two decades. However, the
topological relationships between the circuits and a comprehensive
classifcation have received relatively little attention. Furthermore, the
basic function of the circuits was typically treated by space vector
calculation, analogous to three-phase drive systems, which is not
immediately comprehensible on the basis of knowledge of dc power
supply technology or single-phase PFC rectifer circuits.
The goal of the present work is hence to develop the concepts
of three-phase PFC rectifers, starting from known single-phase
PFC rectifer systems, and to explain as clearly as possible their
basic function and control, without reference to analysis techniques
being specifc to three-phase converter concepts. Details of the Pulse
Width Modulation (PWM) and a detailed mathematical analysis are
omitted, i . e. only the operating range of the systems is clarifed with
regard to output voltage and mains current phase angle. Furthermore,
the dimensioning of the power semiconductors, the main passive
components, and the EMI flter i s briefy di scussed.
To keep matters short, the considerations remain limited to unidi
rectional systems and here to those circuits that come into question
with regard to implementation effort for industrial applications or
have already found such applications. Numerous, only theoretically
interesting circuit proposals of high complexity andor high com
ponent loading are hence not considered. In particular, no circuits
are di scussed that fundamentally demand low frequency passive
components e. g. dimensioned for sixfold mains frequency. Passive
six- or twelve-pulse rectifer systems [5] , and hybrid rectifer circuits
with passive 3r
d
harmonic current injection networks [6] , [7] are thus
also not treated.
In the following, in Section II, a comprehensive classifcation
of unidirectional three-phase rectifer systems is presented that for
completeness also includes purely passive systems. For PFC rec
tifer circuits, a division is made between circuits that are fully
active and hybrid, i . e. partially mains-commutated, and partially
self-commutated systems. With regard to the basic structure, phase
modular and direct three-phase systems are di stingui shed and subse
quently treated in more detail in Section III and Section IV with
reference to selected examples. Apart from systems with boost-type
characteri stic, buck-type PFC rectifer systems are also di scussed,
which were not considered in [8] , but will be of special interest in
future in connection with the charging of electric vehicle batteries or
the supply of dc distribution grids. The ordering and complementation
of the knowledge base of three-phase buck-type PFC rectifer systems
leads to a new hybrid circuit concept (SWISS Rectifer) that is
characterized by low complexity of the power circuit and control, and
thus of particular interest for industrial applications. In Section V, in
the sense of support for the dimensioning of the circuits, the current
stresses of the main circuit components are briefy summarized
in the form of simple analytical expressions, and the Differential
3
Mode (OM) and Common Mode (CM) EMI fltering of the systems
discussed. Finally, in Section VI, a comparative evaluation of selected
boost-type and buck-type PFC rectifer systems i s presented, which is
intended as an aid for the choice of concepts in industrial development
projects. In conclusion, in Section VII, with regard to future further
increasing requirements on the effciency and power density of the
systems, and the further spreading of active mains interfaces, research
subjects in the feld of PFC rectifer circuits are identifed.
I I . CLASSIFICATION OF UNIDIRECTIONAL THREE-PHASE
RECTIFIER SYSTEMS
In Fig. 3, a classifcation of unidirectional three-phase rectifer
circuits i s shown that for completeness also includes purely ussivc
sys/cms which
contain no tum-off power semiconductors, i . e.
work purely mains-commutated, and
employ low frequency, i . e. passive components for output volt
age smoothing and mains current shaping and, where applicable,
mains or auto-transformers for the phase-shif of several con
verter stages working in parallel or series (multi-pulse rectifer
circuits) .
Furthermore, since here only diode and not thyristor circuits are
considered,
there is no possibility of output voltage regulation.
An approximately sinusoidal mains current and/or partial elimina
tion of low frequency harmonics in the input current is thus only
obtainable with mUlti-pulse systems, i . e. for 12-, 18- or 36-pulse
rectifer circuits. In industry, mUlti-pulse rectifers, because of their
low complexity and great robustness, are mainly used at high power
,> 100 kW) as mains interfaces, where the supply is typically direct

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Single Diode Bridge Rectifier Systems

Multi-Pulse Rectifier Systems

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DC Side Inductor (Partial) Transf IsoI. or AutotransfBascd
AC Side Inductors AC or DC Side Interphase Transformer
Passive 3Harmonic Injection Passive Pulse Multiplication

Electronic Reactance Based

Rectifier Systems
Single Diode Bridge
&DC Side Electron. Ind.
Single Diode Bridge
&AC Side Electron. Ind. or Cap.
Multi-Pulse Reetiler System
Employing Electron. Inter-
phase Transr.
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ll
J'Harmonic Injection

Phase-Modular Systems
and DC/DC Converter Systems Systems
DirectThree-Phase Systems

Boost-Type
| !
Single Diode Bridge
&DC-DC Output Stage
Hair-Controlled Diode
Bridge
Multi-Pulse Rectifer System
(Transr or Autotransr.-Based)
with DC/DC Output Stage EmpJ.
AC Side or DC Side Ind.
Passivc/Hybr. or Active J'Hann. Injecl. Network V-Reetilier or 6-Reetiler
Boost- or Buck-Type or Uncontrolled Output - V-Arrangement with Converter
Diode Bridge or Muhipulsc System with J Artileial Star-Point Connection
Harmonic Inj. (pulse Muhip1.) 312-Phase Seon-Transr-Based
l l

Impressed Input Current

l
Impressed Input Voltage
' Buck-Type
!
(Boost-Type) (Buck-Type)
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l l l
&DC-DC Output Stage
!
HaIr-Controlled Diode
Bridge
DCM
!!
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CVM
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Single-Switch Two-Level Reetfer Single-Switch Three-Switch Rectifer
Rcclilier - Y- or6-Switeh Converter Six-Switch Rectifer
Two-Switch Reetiler
Reelilier Three-Level Converter (VIENNA Rectifer)
Six-Switch Converter
'
Fig. 3. Classifcation of (unidirectional) three-phase rectifer topologies into passive, hybrid, and active systems with boost- or buck-type characteristic. For
each rectifer subgroup, references to publications are given in [4] , in which the corresponding circuit concept was presented frst or a detailed description is
provided. The boxes of the converter groups, discussed in this paper, are highlighted by shading. For details of rectifer topologies not discussed in this paper,
please see also [4] .
4
from the medium voltage mains whose low inner impedance allows
higher input current harmonics to be accepted.
The coupling and/or partial integration of a passive rectifer and of
an active circuit part implemented with power semiconductors that
can be actively switched off, leads to hyhriJrcc/j]cr circui/s.
These systems fundamentally allow a regulation of the output
voltage and a sinusoidal control of the mains current; however, a
limitation to voltage regulation is possible (e. g. in the case of a diode
bridge with downstream dc-dc converter) or to sinusoidal current
shaping (active-flter-type 3
'
harmonic current injection, cf. Sec. IV
or [9]-[ 1 4] ) . Furthermore, low frequency flter components of passive
rectifer systems may be replaced/emulated by high-frequency PWM
converters of relatively low rated power (Electronic Inductor [ 1 5] ,
[ 1 6] ) , e. g. i n the sense of an increase of the power density. With an
ac side arrangement of these electronic reactances, via a change in the
inductance or capacitance value in operation, a limited possibility of
voltage regulation exists (Magnetic Energy Recovery Switch (MERS)
concept [ 1 7] , [ 1 8] ) .
3
'
harmonic injection concepts form a maj or group of hybrid
rectifer circuits. Here, current is injected by a passive or active
injection network always into that phase which would not carry
current in case of conventional diode bridge rectifcation. The current
waveforms of the two other phases are shaped in such a way that as a
result, sinusoidal current fows in all phases. The rectifer function of
these systems i s implemented by a diode bridge on the input side. The
active network for current shaping, injection, and voltage regulation,
arranged on the dc side, may thus be considered essentially as
a dc-dc converter working on a time-varying (six-pulse) dc input
voltage. The circuits are hence relatively simple, i. e. may be analyzed
without specifc knowledge of three-phase converter systems and
exhibit relatively low complexity, also regarding control. The essential
characteri stics of hybrid rectifer circuits may thus be summarized as
follows:
mains-commutated (diode circuits) and force-commutated, cir
cuit sections implemented with power semiconductors that can
be actively switched off;
low frequency and/or switching frequency passive components;
output voltage regulation and/or sinusoidal mains current shap
ing by turn-off power semiconductors.
In the present work, only those hybrid rectifer circuits are con
sidered which exhibit regulated output voltage uoJsinusoidal mains
current, and exclusively switching frequency passive components.
Integration of turn-off power semiconductors into the bridge-legs
of a passive system fnally leads to uc/ivc llC rcc/cr sys/cms.
Essential features of these systems are:
forced commutation (only for systems with impressed output
current partly natural commutations occur, depending on the
position of the switching instant in the mains period) ;
exclusively switching frequency passive components;
regulated output voltage.
As described in more detail in Sec. IV, these systems exhibit in
general bridge topologies and here bridge-legs of same structure, i . e.
husc symmc/, and a similar confguration of the power semicon
ductors in the positive (connected to the positive output voltage bus)
and negative bridge halves, i . e. hriJgc symmc/.
Apart from these direct three-phase versions (cf. Fig. 3), however,
an implementation is also possible via a combination of single
phase PFC rectifer systems in star(Y)- or delta()-connection
[cf. Figs. Sea) and (b)] . These phase-modular versions, however, lead
to three individual dc output voltages, i . e. a single output voltage can
only be formed via isolated dc-dc converters that are connected to
the rectifer outputs. An advantage of the phase-modular version i s
D

65OV
. . . . . . . . . .
565V
. . . . . . . . . .
49OV
- - - - - - - - - -
3-Phase
Boost-Type
PFC Rectifer
O
2OOV

3-Phase
Buck-Type
PFC Rectifer
4OOV 48OV
',ii,.
Fig. 4. Output voltage range of direct three-phase PFC rectifer systems
with boost- or buck-type characteristic in dependence of the rms line-to
line mains voltage !

,,
(considered mains voltage range: !

,,
200 V . . . 480 V); ',, enominates the peak value of the line-to-|ie volt
age. In addition, the lwer output voltage limit of a single-phase boost-type
PFC rectifer system ,! , IJ', , , ), connected between a mains phase
and the mains neutral, is shown.
the possibility of realizing a three-phase system starting from existing
already developed single-phase systems. However, it must be taken
into account that with the star-connection a coupling of the phase
system results. For the delta-connection, the high input voltage of
the modules has to be considered, which i s defned by the mains
line-to-line voltage and not by the phase voltage.
Apart from the topological distinction, a classifcation of the
systems must also be carried out with regard to the available output
voltage range, i . e. fundamentally into circuits with boost- or buck
type characteristic. As shown in Fig. 4, the lower or upper output
voltage limits of the systems are defned by the mains line-to-line
voltage. The voltage range, not covered by the two basic converter
forms, is usually realized in industry by means of a downstream dc
dc converter with boost- or buck-type characteri stic. Alternatively, a
three-phase extension of buck-boost [ 1 9] , Cuk- or SEPIC-converters
[20] could be used. Because of the high complexity of the resulting
circuit, however, thi s approach i s only of theoretical interest and is
hence not described in more detail .
With regard to phase-modular rectifers, it must be pointed out that
buck-type converter systems enable a current shaping only in a part
of the mains period [21 ] . Hence, for sinusoidal mains current, a boost
function must be provided which results in a lower limit of the output
voltages of the modules.
Note: Systems with galvanic isolation of the output voltage are not
treated in thi s paper. In many cases, isolation is achieved by a dc-dc
output stage at high frequency, or is required directly at the supply of
the systems for voltage adaptation, e. g. for connecti on to the medium
voltage level . Alternatively, a transformer may be integrated directly
into the rectifer structure. Such high frequency isolated three-phase
ac-dc matrix converter concepts [22]-[24] , however, are characterized
by a relatively high complexity of the power circuit and modulation
and hence are of limited importance for industrial applications.
I I I . PHASE-MODULAR RECTIFIERS
Starting from the basic circuits of symmetrical three-phase loads,
three-phase PFC rectifer systems can be implemented by star- or
delta-connection of single-phase PFC rectifers. The phase-modular
systems thus formed will be termed in the following Y- or -rectifers
according to the circuit structure. The phase modules here may exhibit
a conventional topology or could be implemented as bridgeless, i . e.
Fig. 5. Block diagram of phase-modular PFC rectifer systems [25]-[27] . a)
Star(Y)-connection / Y-rectifer and b) delta()-connection / -rectifer with
output side isolated dc-dc converters. Instead of a common EMI input flter
for all phases as used for a) and b), in terms of full modularity, also separate
EMI flters could be implemented for each rectifer module.
dual-boost converters, or ac-switch converters (cf. Fig. 11) . They may
contain an EMI flter or advantageously, a three-phase EMI flter
could be installed common to all phase systems.
A. r-kcc/cr
Fig. 6 shows the circuit topology of a Y-rectifer with a bridgeless
topology of the phase modules and an equivalent circuit of the ac side
system part. If the EMI flter i s three-phase (not shown in Fig. 6)
and the star-point ^ i s not connected to an artifcial star-point,
which could be formed e. g. by flter capacitors, a switching frequency
voltage u occurs between ^ and the mains star-point ^.
According to
di,
) I_
u, u+u
di,
I u, u,+u)
dI
di
) I
u u-+u
(2)
the impression of the ac currents i s via the differences of the mains
phase voltages and the voltages u, ,i U |,) formed at the
input of the rectifer stages, so that the star-point voltage u with
consideration of
results in
d

. . .
)
dI
, +, + 0
1
u
_ u+n
,+u-)
(3)
(4)
Therefore, with a free star-point ^, a part of the rectifer input
voltage u
advantageously does not form a current ripple, so that
the values of the boost inductance may be reduced compared to
5
P
U
L
.u
.
1
H
P
b
L
b

1
n
P
L
L
c

1
n
a)
. .
m -
'
o)
Fig. 6. a) Basic structure of the Y-rectifer. b) Equivalent circuit of the ac
system part without the EMI input flter.
a fxed star-point for the same ripple amplitude. Thi s advantage i s
gained at the expense of a CM voltage u of the modules, which
requires an appropriate CM flter.
As clearly shown by Fig. 6(b) and with regard to the fundamental
of the input voltage required for the impression of the input current,
the same conditi ons are present for the phase modules as for single
phase PFC rectifers supplied from a mains phase. Therefore, despite
the high peak value of the line-to-line voltage of the European low
voltage grid ,|

] 565 V andor |

_ 400 V), the output

6
at
a)
O O

O O
.
h 0

h h
C

o) (1) (1J)
Fig. 7. a) Time behavior of the instantaneous fundamental power of the
phases of a Y-rectifer. b) Redundant switching states concerning the resulting
variation of the phase currents for t, , 0, t, 5 0, t 5 0 [valid within
, (-30, +30)] , which can be used for balancing the dc output
voltages u, ,, u, ,, u, of the phase modules.
6
Caicrsigna|
C`
L

', '
--
----- ------------ cagc
DC
Fig. 8. Structure of the Y-rectifer control: superimposed control of the average value of the dc output voltages U , ,, u,,, u, of the phase modules
with subordinate control of the phase currents and 2-out-of-3 balancing of the dc output voltages of the phase modules. Equal signal paths of all phases
are represented by double lines. The dependence of the formation of the voltages u

on the sign of the respective phase currents ij is considered by an

inversion of the switching signals for negative phase currents.
voltage of the phase modules can be selected e. g. at |, , 400 V
andor the power transi stors may be realized with 600 V super
junction power MOSFETs.
The control structure of the system is shown in Fig. 8. The
reference conductance c' is defned by the output voltage controller
K [(s). Multiplication of c'by the normalized mains phase voltages
leads to the phase current reference values i, to be set by the
subordinate current controllers Kr(s). With regard to the fundamental
input current, the system thus behaves as a symmetrical ohmic load
with resi stances ! i,c' in star-connection. Accordingly, for
asymmetrical mains, there occurs in a phase with lower voltage
a lower current amplitude, or a reduced supply of power to the
respective output. This must be considered for setting the reference
value of a downstream dc-dc converter.
Because of the phase-modular structure, three output voltages are
to be regulated. Therefore, the voltage control is split into two parts.
On the one hand, the power drawn from the mains, i. e. c' i s defned
from the average control error of the three output voltages u, , On
the other hand, a balancing of the output voltages i s implemented,
whereby in each case only the phase with the highest positive and
the highest negative voltage value is taken into account [25] , [28] ,
[29] . As shown in Fig. 7, only for these phases, e. g. U and C a higher
instantaneous output power fow i s present and hence the possibility
of changing the output voltage value. Dependent on the difference
between |, , and |, , an offset of the reference phase current
values i is formed which, however, cannot be set by the phase
current controllers because of the free star-point ^, i,+i,+i 0
is unalterable. The phase currents thus keep their sinusoidal shape
and the symmetry to the time axi s. However, as could be shown by a
more detailed analysis, for i > 0, the switching state (100) is mainly
used instead of (011) for the formation of the voltages u_ required
for current impression. Similarly, for i < 0 increasingly (011) i s
employed instead of (100). Both switching states are redundant with
respect to the voltage formation and result in equal voltages u, u
-
,
n- However, for (100), primarily the output capacitor C is charged
and for (011) the capacitor C, and thus an equalization of |, , and
|, is enabled. For (100), power also fows to output u, , , but
because of the low instantaneous value of i, in , .I (0,60)
andor the associated low output current, the output voltage n,, i s
not signifcantly changed [29] .
In connection with the balancing of the output voltages it should
be pointed out that a symmetrical mains current system can be
surpri singly also maintained for unequal distribution of the input
power to the three outputs, i. e. is also possible for asymmetrically
loaded outputs.
To summarize, the total power drawn from the three-phase mains
i s set by c' and the distribution of the power to the phases i s
determined by i Shifting the power between always only two phases
has the advantage that the fulfllment of i, + i, + i 0 does
not need to be specially observed since the third phase can always
carry a resulting current. Thi s procedure thus exhibits, compared to
alternative concepts [27] , a greater stability range and a signifcantly
lower parameter sensitivity or greater robustness.
I t should be emphasized that the balancing procedures described
may be employed only in the case of a common EMI flter for all
phases andor for a free star-point ^, which allows a variation of
u with switching frequency. Here, the balancing of the output
capacitor voltages and not a vanishing (low frequency) voltage
difference of ^ from the mains star-point ^ i s of importance.
For employing individual EMI flters per module, on the other
hand, only low frequency potential changes in ^ can occur and
the balancing of the phase units can be with reference to the star
point voltage [3 1 ] . Alternatively, andor in addition to balancing, ^
can also be connected to an artifcial star-point that is formed by
a transformer circuit of low zero sequence impedance and can be
loaded with a zero sequence current component occurring in case
b)
Fig. 9. Hardware demonstrator of a) an ultra-efcient Y-rectifer phase
module (nominal efciency ,, , 7) and b) of an ultra-compact Y
rectifer phase module (power density p , 5 kW/dm
3
S2W/in
3
) . The
nominal output power of both systems is 3. 3 kW [30] .
of asymmetry [32] , [33] . The disadvantage of thi s concept, basically
known from the star-point formation in electrical networks, however,
lies in the requirement of an additional inductive component of
relatively large volume and weight.
In Fig. 9(a) , the demonstrator of a highly compact version of
a single-phase bridgeless PFC rectifer system [cf. Fig. 11(b)] is
shown; Fig. 9(b) shows a highly effcient version of the same
rectifer topology. Starting from these systems, Y-rectifers with power
densities of up to 5 kW/dm
3
or efciencies of q > 99% may be
realized.
. ckcc/cr
For delta-connection of the PFC rectifer modules [cf. Fig. 5(b)] ,
the subsystems are decoupled, i n contrast t o the star-connection (Y
rectifer) . The control can therefore be carried out, individually for
each subsystem, in the same way as for single-phase PFC recti fers.
Balancing of the modules with respect to power consumption is of
advantage in the sense of symmetrical loading of the mains, but
i s not absolutely necessary. However, the line-to-line voltage of the
mains appears at the input to the modules. Hence, a relatively high
output voltage |, , > ,|, ,, ,

,, (typ. |, , 700 V . . . 800 V

for the European low-voltage mains, taking into account voltage
tolerances) or a high blocking capability of the power semiconductors
has to be provided. Alternatively, the semiconductor blocking voltage
stress could be halved by means of a three-level topology. Also
a buck converter could be placed in front of each boost converter
stage, i . e. in each phase, a buck-boost converter with a common
inductor could be implemented. Thi s would allow the output voltage
level of the individual modules to be chosen similar as for the Y
rectifer with 400 V [34] . Then, only the transi stors of the buck stage
have to be designed for line-to-line voltages. However, an additional
power transi stor then lies in the current path, which leads to higher
conduction losses.
At the input of the rectifer stages of the c-rectifer modules, for
a two-level implementation of the boost output stages, voltages
(5)
(s,, designates the switching state of the power transistors S,,,
{o,|,)) are formed that, apart from the switching state
s,, s, s, 0, contain a switching frequency zero sequence
voltage component n, ,
ua, u, +u,
u

+u,
u-, n,+u,
(6)
As can be immediately seen via a delta-star transformation for the
formation of the phase currents i, , only the voltages u,
, n

, n
, ,
and/or the equivalent star-point phase voltages
/
1
_ / / _
u
a

_ u
a, u-,
/
1
_ / / _
u

_
n

u
a,
/
1
_ / / _
u-

_ u-,
n

with
are effective. The zero sequence voltage component
1
u,
_ ,ua, +n

+n-,) ,
(7)
8)
(9)
J
l
L

H
I

h
P"'
H
I

H
a)
'b
Fig. 10. a) Basic structure of the -rectifer, with thyristor bridges at the
input of the modules to provide the nominal output power in case of phase
loss; three-level boost stages are employed to reduce the voltage stress of the
power semiconductors. b) Simplifed ac side equivalent circuit with the zero
sequence component i, of the input current ripples of the modules.
thus drives only a switching-frequency current within the delta
circuit. Thi s means that for a three-phase EMI flter, the modulation i s
best designed through suitable synchronization of the carrier signals
of the modules such that u, i s maximized or a maximum fraction
cio of the switching-frequency input current ripple of the modules
i s held within the delta circuit [27] , [35] . There then results a
minimum ripple of the phase currents i, , and the EMI flter effort i s
minimized. However, thi s advantage should be weighed against full
modularity/independence of the subsystems (also regarding switching
and modulation), that i s obtainable only with the confguration of an
individual EMI flter per module.
An essential advantage of the c-rectifer i s the availability of the
full rated power even for a failure of one mains phase. For thi s
purpose, the modules must be connected as in Fig. lO(a) via three
phase thyristor bridges to the mains, and the thyristor bridges, on
interruption of a mains phase, are switched over to the two remaining
phases (cf. [27] , [34] ) . However, thi s concept i s applicable only for
a suitably high loading capacity of the remaining mains phases.
C. Discussico
Phase-modular systems allow the knowledge on single-phase PFC
rectifer systems to be exploited relatively directly and/or allow for
the development of a three-phase PFC rectifer system with low effort.
However, thi s advantage can be realized only with a fully modular
structure, i . e. with the arrangement of an individual EMI flter per
module, so that the modulation methods for the reduction of ripple in
the phase currents described above cannot be used. However, in any
case, a balancing of the modules is required to assure a symmetrical
loading of the mains. Here, the additional effort for measurement and
signal processing required for the Y-rectifer should be noted.
Basically, due to the modular structure, three individual dc output
voltages are formed that only with the aid of downstream isolated
dc-dc converters can be employed for the supply of a single load.
Furthermore, each module requires fltering of the power fow, which
pulsates with twice the mains frequency, i . e. electrolytic capacitors
of suitably high capacitance must be provided on the output side. On
the other hand, the assurance of a mains-holdup to master the failure
of a mains voltage half-cycle anyway requires a relatively high output
capacitance. Furthermore, by division of the overall system into three
subsystems, a compact construction is supported and the cooling of
the power components i s simplifed.
The essential advantage of the Y-rectifer i s the lower voltage stress
of the power semiconductors or the relatively low level of the output
dc voltages. However, a. direct coupling of the phase modules i s
present, which especially for mastering of a phase failure requires a
close co-ordination of the modules and fnally a control circuit for the
overall system. Hence, the advantage of modularity cannot be used
for the control. Industrially, the system will thus probably remain
of minor importance. In contrast, the modules of the -rectifer
work in a decoupled manner, and via a relatively simple expansion
of the circuit topology, the full rated power is available on phase
failure. The disadvantage of the relatively high output voltage and/or
required blocking voltage capability of the power semiconductors
in the modules ought to be alleviated in future by the availability
of 1200 V SiC power JFETs or SiC power MOSFETs. Then also
an additional buck converter stage could be implemented for each
module, which enables to maintain the output voltage level given by
single-phase PFC systems and therewith the use of already developed
dc-dc converter circuits. On the whole, then, an excellent potential
for industrial application of thi s system can be discerned.
I V. DIRECT THREE-PHASE PWM RECTIFIER TOPOLOGIES
In the following, the topologies of important direct three-phase
boost- and buck-type rectifer systems will be derived and briefy de
scribed with regard to their basic function and control. Boost systems
will be developed by three-phase extension of known single-phase
boost-type PFC circuits (cf. Fig. 1 and/or Fig. 26 in [30] ) ; the circuit
structures of the buck-type systems follow by extension of passive
three-phase diode rectifers with tum-off power semiconductors.
In general , the defnition of three-phase converter topologies,
should be under consideration of a high level of symmetry of the
resulting circuit structure. Because of the identical nature of the
phases of the supplying mains (pure ac voltages of same shape and
amplitude), it is obvious to provide the same structure for the circuit
branches connected to the phase terminals (phase symmetry). On the
other hand, the symmetry of the positive and negative half-cycles of
the ac input phase currents to be impressed by the rectifer system
naturally leads to an identical arrangement of power semiconductors
in the positive and the negative half of the phase-legs. In connection
with the dc voltage to be formed, corresponding topologically to a
positive and a negative output terminal , there thus results a three
phase bridge topology with symmetrical positive and negative bridge
halves (bridge symmetry). For a dc-dc converter, connected to the
rectifer output, thi s symmetry does not necessarily need to be
maintained. Here, a deci sion could be made e. g. by analysis and
compari son of the CM EMI emi ssions and the conduction losses of
a symmetrical or asymmetrical topology.
It should be noted that rectifer systems which violate one or both
symmetry requirements, e. g. with the aim of reducing the implemen
tation effort, can also enable the impression of mains ac currents and
U /_

a)

b)
U /
,

c)
L
L
L
1
'
L
l
1
C

n
l
C

n
l
C

H
Fig. 11. Single-phase boost-type PFC rectifer systems ; the three-phase
extensions of the circuits leads to direct three-phase hybrid or active PFC
rectifer systems with boost-type characteristic. a) Conventional PFC rectifer,
b) bridgeless (dual-boost) PFC rectifer, and c) PFC rectifer with ac-switch.
the formation of a regulated output dc voltage. However, a sinusoidal
shape of the phase currents is possibly not feasible (cf. Sec. IV-A2 for
systems showing phase symmetry but no bridge symmetry), and/or
the output voltage or the modulation range of the circuits is limited
compared to symmetric structures. Furthermore, in general a more
complex modulation results (cf. e. g. [ 36] as an example of a system
with bridge symmetry but no phase symmetry). In addition, with
missing phase or bridge symmetry, differing loadings of the individual
power semiconductors occur. Asymmetrical circuits are hence treated
within the scope of thi s work only as an intermediate step in the
derivation of symmetrical circuits.
In the following for all circuits, i. e. also for systems employing
power semiconductors with high blocking voltage stress (defned
by the mains line-to-line voltage), power MOSFETs are shown as
switching elements. Thi s should point out the generally existing
requirement of high switching frequency or high power density. An
implementation of the power semiconductors would be possible with
Si super-junction MOSFETs with a blocking voltage of 900 V [37]
or in future with SiC JFETs (in a cascode confguration, [38]-[40] )
or SiC MOSFETs [41 ] ) . Alteratively, 1200 V IGBTs, possibly with
SiC freewheeling diodes could also be employed, however, with
considerably lower switching frequency, due to the relatively high
switch-off losses.
A. ccs/- !yc Sys/cms
A three-phase extension of the conventional single-phase boost
type PFC rectifer [cf. Fig. 1(a)] , i. e. the addition of a third bridge
leg to the input rectifer bridge, results in a hybrid rectifer structure
shown in Fig. 12(a) . The system enables a control of the output
voltage, but the input current exhibits the characteristic block shape
of passive diode rectifcation with IHD, 30% [cf. Fig. 12(b)] .
L
P
U |,
b

.
C

c
a)
n
800

20
5
O
1 0
C
>
=
O
C

\
- 1 0
5 1 0 1 5
o) / (ms)
P
U |,
L
b
L
.

C
c
L
c)
n
400 20

200 1 0
:
O
0 0
i >
S
O
C

-200 - 1 0
-400
0 5 1 0 1 5
-20
20
d) / (ms)
Fig. 12. Three-phase extension of the single-phase system shown in
Fig. 11(a) . a) System structure and b) corresponding mains voltage and mains
current if the dc-dc boost converter stage operates in Continuous Conduction
Mode (CCM) . c) System structure if the boost inductor is shifed to the ac
side and divided over the phases. d) Corresponding mains voltage and current
,, refers to the local average value of the phase current t,) for operation of
the system in Discontinuous Conduction Mode (DCM) .
If the boost inductance is moved to the ac side and distributed over
the phases [cf. Fig. 12(c)] and the mode of operation i s changed to
OCM at constant duty cycle of the power transistors, the switching
frequency peak values of the discontinuous phase currents follow a
sinusoidal envelope. However, as shown by more detailed analysis,
low-frequency harmonics of the phase currents continue to occur
[42] . A modulation of the transi stor switch-on time with sixfold
mains frequency [43] , [44] andor operation in Boundary Conduction
Mode (BCM) also cannot completely eliminate the low-frequency
current distortion, since the smallest phase current in each case always
reaches zero prior to the other two phase currents and thus exhibits
a zero current interval at switching frequency [42] . Accordingly, a
relatively high current quality is only attainable for high voltage
transfer ratios andor a relatively short demagnetization time of the
9
inductors I compared to the transi stor switch-on time, i . e. for output
voltages | > 1 kV when operating in the European low-voltage
mains. Because of thi s limitation, and the high peak current loading of
the power semiconductors and the large EMI flter effort, thi s circuit
concept has not been successful in industry.
Fundamentally, it should also be noted here that for three-phase
converter systems, because of the relatively high power, operation in
CCM i s clearly preferable. Accordingly, the phase-shifed operation
of several OCM converter stages, which would be possible for the
system shown in Fig. 12(c) , [45] , [46] , and is frequently used for
single-phase systems (for power levels up to typo 1 kW) is of minor
importance.
I) HyhriJ 3
'
HurmcoicCurrco/locc/ico llC kcc/cr.
An improvement in the input current quality of the circuit in
Fig. 12(a) i s only possible by extension of the controllability, i . e. by
addition of a further power transi stor (cf. Fig. 13). The currents in
the positive and negative dc buses, i.and i ,can then be controlled
independently and proportional to the two phase voltages involved in
each case in the formation of the output voltage of the diode bridge.
If the difference of i. and i i s then fed back via a current injection
network (three four-quadrant switches, of which in each case only
one i s switched on) into the mains phase which would not carry
current for simple diode rectifcation, a sinusoidal current shape can
be assured for all mains phases as shown below [47] .
Because of the symmetries of the supplying mains voltage sys
tem, the mathematical proof of the sinusoidal current shaping can
be limited to a 60 -wide interval of the mains period with e. g.
u, > u, > u, for which the injection switch S,, (i n general ,
the injection switch of the phase with the smallest absolute voltage
value) i s continuously switched on.
By suitable modulation of S., a current proportional to the mains
phase voltage u, can then be impressed in I or in the conducting
diode L,.,
( 1 0)
whereby for the local average, i . e. the fundamental frequency com
ponent
( 1 1 )
has t o apply. Correspondingly, by suitable modulation of S , a
current
= i ( 1 2)
proportional to u can be impressed in I or L with
( 1 3)
The fundamental frequency conductance c' ,determining the rec
tifer input andor power, is thereby defned by the output voltage
controller. The switching of S. and S must not be carried out in
a co-ordinated manner since freewheeling of i. andor i i s always
possible via the freewheeling diodes L. and L or the diodes
antiparallel to S. and S and the injection switch S,,
For the injection current i , follows by Kirchhoffs' current law
i. i, = 0 or i, + i i, = 0, and on consideration of
i, = i, (injection switch S,, i s switched on)
i, = i, + i) and , = , + ) ( 1 4)
With ( 1 1 ) , ( 1 2) and u,, + u,, + u, = 0 (symmetrical sinusoidal
mains phase voltages) there then results
( 1 5)
Accordingly, for all phases a current shape proportional to the corre
sponding mains phase voltage is achieved. (Equation ( 1 4) could also
l O
L
|,
I,
{
U
|a
,

b
C
C

a)
L
|

I
n
L
U |,
/

b
I
b
/I
C |e
b)
I
0
N 0
N
i

6/
W

Fig. 13. a) Basic structure of the hybrid !
'
harmonic current injection
rectifer [47] . b) Local average equivalent circuit of the active system part
for u, , u, , u c) Waveforms of the phase voltage u,, the
corresponding phase current t,, and the injected current i, It would be
advantageous to add a second freewheeling diode 1 in the negative bus
to minimize the switching frequency CM voltage variation of the output.
However, this would result in increased conduction losses.
be stated directly with reference to the current sum i,+i,+i 0
forced to zero because of the free mains star-point N, but was derived
here starting from the dc side in order to illustrate the function of
the current injection. )
As would be clear from an analysis of further 60 sections of
the mains period, the injection current i, exhibits threefold mains
frequency. Thus, and in the sense of the classifcation chosen here,
the rectifer system should be called hyhriJ 3
'
hurmcoic currco/
iocc/ico llC rcc/cr.
The feedback and/or injection of current occurs in Fig. 13 always
into only one phase, which is selected by proper gating of the four
quadrant injection switches. Alternatively, the current injection could
also be carried out by means of a purely passive injection network,
e. g. a resonance network or a transformer circuit with low zero
sequence impedance (cf. MINNESOTA Rectifer, [48] ) . However, it
can then not be chosen in which phase a current i s injected, but the
feedback current can only be divided up into equal parts that are then
injected into the phases. As shown in [4] , a sinusoidal phase current
waveform proportional to the mains voltage can also be attained
therewith. However, the passive injection network shows a relatively
large volume and weight. Furthermore, in compari son to the circuit in
Fig. 13(a) a threefold amplitude of the injection current i s required,
so that the semiconductors of the converter stages that impress the
currents i. and i_ must be dimensioned for a signifcantly higher
current loading. Hence, considering the high power density ofen
demanded in industry, an active current injection i s clearly preferable.
With regard to the operating range of the system it must be stated
that the output voltage must be selected signifcantly higher than
the peak value of the line-to-line mains voltage, i . e. as | >
,|, ,, ,

,, as given in [49] , p. 595, Sec. II-D. As shown above,

ohmic fundamental mains behavior can be attained, but no phase
displacement of the mains current relative to the mains voltage is
possible. However, it has to be emphasized that the system allows a
continuation of operation with sinusoidal current shape (at reduced
power) on failure of a mains phase. All injection switches then have
to be blocked and a simultaneous gating of S. and S provided,
so that the same conditions exist as for a single-phase PFC rectifer
system operating on a mains line-to-line voltage.
HyhriJ 3
'
HurmcoicCurrco/locc/ico Ac/ivc-li//crkcc/cr.
Starting from Fig. 13(a) and following a circuit concept known from
passive injection networks [ 1 1 ] , [50] , the two inductors I. and I
could be lumped together into a single inductor I, lying in the
injection path. The resulting circuit structure is shown in Fig. 14,
[ 1 3] , [ 1 4] . The output diodes L.and Lcan now be omitted, since
a simultaneous switching on of the transi stors S. or S would lead
to a short-circuiting of the mains, in contrast to Fig. 13, and is thus
not allowed.
Accordingly, the systems shows a relatively low implementation
effort, however, at the expense of a missing output voltage control.
As can be immediately seen from the absence of diodes L. and
L , the output voltage is now determined directly by the diode
bridge and hence exhibits a six-pulse shape. However, as will be
shown below, assuming a constant power load, the possibility of
impressing sinusoidal mains phase currents remains. Thus the system
does not provide the full functionality of an output voltage-regulated
PFC rectifer, but the function of a passive rectifer with integrated
active flter and hence should be called a hyhriJ3
'
hurmcoiccurrco/
iocc/ico uc/ivc]//cr rcc/j]cr.
If a load with constant power consumption is supplied, there results
a load current varying in antiphase to the six-pulse rectifer output
voltage. As shown below, this leads to a sinusoidal shape of all mains
phase currents afer overlaying with the injection current.
Consider a 60 interval of the mains period with u, > u, >
u as in Sec. IV-AI . For the current to be injected into phase |
( 1 6)
applies. The mains frequency voltage drop across the inductor I,
can in a frst approximation be neglected for the formation of ,,
UL
y
0 . ( 1 7)
Accordingly, we have for the voltage to be formed at the output of
the bridge-leg
( 1 8)
If in any case one of the transi stors S. or S is switched on, o.+
o 1 applies for the relative switch-on times or o 1 o.
and hence, for the voltage formation of the bridge-leg
UL
y
o.u, + (1 o.)u o.n,+u . ( 1 9)
Correspondingly, there follows the duty cycle o. with ( 1 9) as
and thus for the current in S.

c' c'
u,
s. o.
,
o.,
o. u,
u, -
u,
(20)
(21 )
U |a
h
C
a)

C
I
n
6l

= = =

l
Fig. 14. a) Hybrid !
'
harmonic current injection active flter rectifer
according to [4] , [ 1 4] . b) Local average equivalent circuit of the active part
of the system for u, , u, , u c) Waveform of the phase voltage
u,, the phase current i,, the injection current i,, and the load current
t I, Ju at a constant output power I,
Considering the fundamental input currents that have to be generated
at the input
, = u,
, = u, ,
= u
(22)
the low frequency component of the current consumption of the
constant power load can be expressed via
i =
I,
=
,u,+,u,
=
u,u,+u,u,
u, u, u,

u,
= u, + u,
u,
(23)
(24)
For the resultant low frequency current component drawn from phase
U, there then follows with (21 )
(25)
directly the desired (sinusoidal) waveform proportional to the mains
voltage. Furthermore, there applies with ( 1 6) , (25),
(26)
l l
and u,+u,+u = 0 for phase C
(27)
so that the sinusoidal shape of all phase currents has been proved.
It must be emphasized that the circuit in Fig. 14(a) allows a
sinusoidal regulation of the mains currents only in case a converter
output stage, e. g. in the form of a dc-dc converter or a PWM inverter
stage, is present that assures constant power consumption. The
implementation eft of thi s concept should therefore be evaluated
only with regard to the overall system.
Furthermore, it should be noted that the waveform of i required
for the formation of a sinusoidal mains current only results if no
smoothing capacitor (of higher capacitance) is connected between
constant power load and rectifer stage. Load variations are thus
passed on directly to the mains.
?) ^ -Swi/ch kcc/cr.
If the circuit in Fig. U(e) is extended with a third bridge-leg and a
delta-connection of four-quadrant switches is added with respect to
the operating principle and the three-phase symmetry, there follows
the topology in Fig. 15(a) of the !-switch rectifer [5 1 ]-[53] . The
four quadrant switches enable to infuence the conduction state of
the diode rectifer and thus to control the ac side voltage formation
via pulse width modulation. The !-switch rectifer is an active PFC
rectifer circuit since the commutation of the diode bridge occurs, in
contrast to the circuit in Fig. 13, at switching frequency.
Similar to single-phase PFC rectifer circuits, the voltage formed at
the input of a rectifer bridge-leg, e. g. UaM' ,M' designates a virtual
mid-point of the output voltage), depends on the switching state of the
(entire) converter and on the direction of the phase current i, Thi s
does not represent a limitation since a current i, in phase with the
mains voltage u, has to be impressed. Neglecting the voltage drop
across the input inductor u_ UaN has to be ensured. Therewith,
ia = u, and UaN always have the same polarity.
Except for a simultaneous switch on of all four-quadrant switches
(s
a
h = She = Sea = 1) , one phase terminal, e.g. u, is always
connected with the positive or negative output voltage bus, or .
Accordingly, the circuit shows a two-level characteristic with regard
to the voltage formation. As is immediately clear considering the
diode rectifcation on the input side, the output voltage has to be
selected according to
| > v |, ,

,, (28)
In case of a failure of a mains phase, the two four-quadrant switches
associated to the phase that failed have to be permanently di sabled.
Then again a single-phase PFC rectifer circuit with an ac side
switch is present, which operates however from a line-to-line voltage,
but still allows a regulation of the output voltage and a sinusoidal
impression of the mains currents.
It i s interesting to understand that the operating range of the !:
switch rectifer is not restricted to ohmic fundamental mains behavior
(as could be expected due to the diode rectifer) but allows the
formation of current phase di splacements in the angular interval
1 = 30 ,+30 ) (29)
Thi s can be clarifed by a more detailed analysis of the conducti on
states of the system, which may be restricted to a 00 interval due to
the symmetry of the three-phase mains system. The equivalent circuit
of the active part of the !-switch rectifer i s shown in Fig. 15(b) for
i, > 0, i, < 0,i < U. It is assumed that only the four-quadrant
switches connected to the phase with the largest absolute voltage
value is switched [52] .
For the impression of i, and i , S
a
h and Sac are switched such that
uae and Ua
h compensate the line-to-line voltages u, > 0 and u,, >
I 2

U |,
L
0

h
L
b
C
C
L
c

`
a)
n
L
`o
C
b)
u
i
uab ,
uiN
la
6/
c)
Fig. 15. a) Circuit topology of the -switch rectifer [5 1 ] . Also a bridge
confguration of six transistors with anti parallel diodes and short-circuited
output terminals could be used instead of a delta-connection of four-quadrant
switches. b) Equivalent circuit of the system for t, , 0, t, 5 0, t, 5 0, i. e.
for , ( -30, +30) . c) Waveforms of the mains phase voltages, local
average phase current z, , and sections of the line-to-line voltages.
U. The voltages uac and u
ab can be formed for the given polarities of
the currents. However, as a result of the phase displacement between
the phase quantities and the line-to-line quantities of 30 (compare
e. g. u, and u,, or u, and n,,) u,, > 0 and u,, > 0 applies,
not only for = (-30,30) but also for = (-60,60).
Therewith, the balance of the voltages u,, uac > 0 and u,,
u
ab > 0 can be also achieved for phase voltages with a displacement
of 30 against the phase current system.
It is advantageous to use the circuit in Fig. 16 for the control of the
system. There, all phase currents are continuously controlled opposed
to alternative control concepts [54] . The voltage reference values
formed at the output of the phase current controllers are converted
with a y- transformation into the effectively adjustable line-to-line
voltage reference values
+ + +
n
ab = u - ub
u
,-
= u
, - u
.
+ + +
u-s
= u- - u
a
(30)
The polarity of the phase currents or phase voltages, i. e. the infor
mation of the actual 60 sector of the mains period has then to
be considered for the control of the individual power transi stors,
however, no sector dependent switch-over of the entire control
structure is required. This results in a higher input current quality
as a switch-over of the control, potentially causes current distortions
at the switching instants.
3) Vl LbbA kcc/cr.
If the delta()-connection of the four-quadrant control switches of
the - switch rectifer i s replaced by a star-connection, and the star
point of the switch arrangement is connected to a capacitively formed
mid-point M of the output voltage in terms of highest possible
symmetry, an active three-level PWM rectifer system (cf. Fig. 17(a) ,
[42] , [ 55] ), known as Vl LbbA Rectifer, results. Functionally equiv
alent alternative implementations of the bridge-leg structure with a
lower blocking voltage stress of the power diodes are depicted in
Figs. 17(b)- (d) [55]-[57] .
As for the - switch rectifer, the ac side voltage formation of the
system is again dependent on the sign of the phase currents. However,
the rectifer phase input, e. g. u now can be also connected to the mid
point M of the output voltage besides the positive and the negative
output voltage bus. Thus, three voltage levels are available for the
formation of UaM, which justifes the designation of the system as a
three-level converter.
A maj or advantage of the three-level characteristic is that for the
selection of the blocking voltage capability of the power transi stor
only half of the peak value of the line-to-line voltage and not the
total value is relevant. Furthermore, as a result of the higher number
of levels of UaM, the difference u, - UaN remains limited to small
values. Thus a smaller mains current fundamental ripple results [cf.
Fig. 16. Control scheme of the -switch rectifer with superimposed output voltage controller K s) and subordinate input current controllers K, s) with
feed-forward of the mains phase voltages u . The rectifer input phase voltage reference values generated by the phase current controllers are converted into
line-to-line voltage reference values by using a Y--transformation and then applied to the system by modulation of always only two of the four-quadrant
switches s. s . s
[cf. Fig. 15(e)] .
I
U |a
L
u
b
L
b
L
L

a)
o
I I
P
M M
M
o o
o
U b) U c) U d)
Fig. 17. a) Circuit topology of the original V! lXXA Rectifer [42] . b)-d)
Alternative bridge-leg structures, whereas the bridge-leg variant b) requires
only three transistors but shows higher conduction losses due to the series
connected diodes [55] ; c) [56] is advantageous concerning precharging the
output capacitor at start-up [55] (afer the precharge interval the thyristor
is gated, thus a parallel path with precharging resistor and series diode
is bypassed) ; d) [57] allows a further reduction of the conduction losses
compared to the topology in c) .
(2)] , and/or the value of the input (boost) inductances can be reduced.
In addition, as a result of the lower switched voltage also a lower
conducted EMI noise level i s generated.
a)
l 3
I n analogy t o the .-switch rectifer,
| > v|, ,, ,

,, (3 1 )
applies for the output voltage range of the system and
1
30 ,+30 ) (32)
for the phase di splacement range of the mains voltage and the
mains current fundamental in case a high output voltage | >
2|, ,

,, and a small boost inductance are assumed. The phase

displacement range i s increasingly reduced to pure ohmic mains
behavior ,1 0) [53] , [55] for lower output voltage values, i . e.
for |, ,

,, < | < 2|, ,, ,

,, . Similar to the .- switch

rectifer in case of a phase loss, also the Vl LbbA Rectifer can still
be operated at a reduced output power and at the same output voltage
and with sinusoidal input currents in the remaining phases [58]-[60] .
The control structure of the system is shown in Fig. 18(a) with a
superimposed voltage controller, defning the reference value of the
fundamental frequency conductance and/or the power delivered
to the output, and subordinate phase current controllers. Simple P
type controllers can be used if feed-forward of the mains voltages
i s applied. The balancing of the two partial output voltages, which
i s required due to the integration of the capacitive mid-point of the
output voltage into the system function, can be implemented in a
similar manner as shown for the Y-rectifer (cf. Sec. III-A), i . e. by
adding an offset i of the phase current reference values. The reason
for thi s i s that the system, shown in Figs. 18(b) and (c) for i, > 0and,
i, ,i < 0, has redundant switching states I00) and 0I I ) regarding
the voltage formation on the ac side. A positive offset i > 0 leads
to an increase of the relative on-time of I00) compared with 0I I)
and a negative offset i < 0 to a relative decrease compared with
I00) Correspondingly, mainly the lower or upper output capacitor
i s charged.
The output voltages of the system can be loaded asymmetrically,
as was shown in the analysis in [61 ] . However, the admi ssible degree
of asymmetry depends on the mains voltage level . High degrees of
asymmetry are only possible for high output voltages.
a
h
C
b) ( 1 00)
a
h
C
c) (0 1 1 )

|V
M

Ee
|V
M
=a
Fig. 18. a) Basic structure of the control of the V! lXXARectifer with superimposed control of the output voltages U y, uy and subordinate phase current
control with feed-forward of the phase (mains) voltages. In order to increase the output voltage control range, a third harmonic of the mains frequency is
superimposed to the mains voltage feed-forward signal [25] . The balancing of the two output voltages is achieved by adding an offset t to the phase current
reference values. b) and c) Redundant switching states of the system (for t, , 0, t, ,t 5 0) that result in equal rectifer input line-to-line voltages and
opposite signs of iy and therefore facilitate a balancing of the output capacitor voltages without infuence on the phase current shaping. (E. g. for t , 0,
the relative on-time of the switching state ( 1 00) is increased and the on-time of the switching state (01 1 ) is reduced resulting in ty 5 0; correspondingly
t

5 0 results in iy 5 d. The switching state is represented by phase switching functions s, ,and/or ,s,, s,, s), where s, 1 t {o, 0, c}) indicates that
the corresponding four-quadrant switch is switched-on and s 0 that it is switched-off.
I 4
a)
b)
Fig. 19. a) Hardware demonstrator of a 10 kW V! lXXA Rectifer. b)
Measured phase current i_ ,1no, 1 . 6%) and corresponding mains
phase voltage UaN. Operating parameters : mains rms line-to-line voltage
!N
r
ms !00V, mains frequency IN 800Hz, output voltage !
800v, switching frequency Ip 20kHz. Scales: 200V/div, 10 Adiv,
0 ms/div.
A state-of-the-art hardware demonstrator of the VlLbbA Rectifer
is shown in Fig. 19. The switching frequency of the system i s
ip 250kHz. Such a high switching frequency, however, i s only
useful if an extremely low IHD, of the input currents has to be
achieved at high mains frequencies (e. g. for More Electric Aircraf
[53] , iN 300Hz . . . 800Hz) . No advantage is given with regard to
power density compared to a system with ip 2kHz for forced
air cooling (cf. Fig. 35).
1) HyhriJ Hu- Cco/rc//cJ / Ac/ivc lu//-Cco/m//cJ So-Swi/ch
llCAC/DCriJgc Circui/.
If instead of the conventional single-phase PFC rectifer structure
bridgeless (or dual-boost) converter topology in Fig. U(b) is ex
tended to three-phases, a half-controlled hybrid phase-symmetrical
rectifer circuits shown in Fig. 20(a) results.
Thi s circuit topology does not allow to impress a sinusoidal input
current within the entire mains period because of the lack of bridge
symmetry. If, e. g. a 00 interval with u_ > 0 and u , u < 0,
i . e. an angular interval (N
30 , 30 ) of the mains period is
considered [cf. Fig. 21(a)] and phase currents with identical signs
as the corresponding mains phase voltage are assumed, only the
switching-off of Swould cause a commutation of ia to L In the
phases b and C the anti-parallel diodes L

and L would remain

conductive, independent of the switching state of the transistors S

and S
Therefore, sinusoidal current impression is possible only for those
00 intervals in which two mains phase voltages have a positive
sign, thus when e. g. u_ ,u > 0, u < 0, or i ,i > 0, i- < 0
applies [cf. (N 30 , 90 ) , Fig. 21(e)] . By switching on S or
S

, u or | can then be connected to the negative output voltage

bus n and ia or ib increased. At the switch-off of S or S
N , the
corresponding freewheeling diode L or L
becomes conducting.
Thus, a positive potential i s applied to u or |, and the corresponding
phase currents are reduced. Therewith, either an increase or decrease
of two phase currents and consequently a sinusoidal current waveform
is achievable. The third phase current then also shows a sinusoidal
shape as a result of i_ +i +i U.
In summary, a sinusoidal current shape can be achieved only in
sections of the mains period. The function of the circuit is hence
essentially limited to output voltage regulation, whereby by using the
simple control procedure described in [62] , at least a block- shaped
current waveform, comparable to passive rectifers, may be realized.
It should be noted that to simplify matters, all transi stors could
also be switched synchronously with a duty cycle constant over the
mains period and the system operated in DCM. The input current
shape would then be identical to that in Fig. 12(d) . As an advantage,
lower conduction losses would occur but at the cost of a higher
implementation effort.
Voltage regulation and sinusoidal current impression requires an
extension of the circuit in Fig. 20(a) to bridge symmetry, i . e. the
addition of three further transi stors anti parallel to the freewheeling
diodes of the positive bridge half. There then results the six- switch
converter structure shown in Fig. 20(b), which i s employed e. g. for
supplying of the voltage dc-link of variable speed drives.
Since for a switched on transi stor the current in any case fows
over thi s transi stor or its antiparallel diode, the system allows, in
each phase, a voltage formation independent of the current. At the
input of each rectifer bridge-leg, a positive or a negative voltage may
be generated referred to the virtual output voltage mid-point. Thus
the bridge-legs exhibit a two-level characteri stic and hence allow the
impression of sinusoidal phase currents of any phase di splacement
relative to the mains voltage. In particular, the current may also be
led in antiphase to the mains voltage, i . e. power may be fed back into
the mains. Thi s inverter operating mode i s e. g. employed in variable
speed ac machine drives to feed braking energy back into the mains,
and represents the main energy fow direction for supplying an ac
machine from a voltage dc-link.
With regard to the level of the output voltage,
U > vUN, l l ,
r
ms (33)
i s required, the same as for the systems in Fig. 15(a) and Fig. 17.
Furthermore, the system can deal with a mains phase failure, thus
representing a mains interface that can be used in an extremely fex
ible manner. Hence the entire circuit structure i s also commercially
available as a power module (generally denominated as "six pack"
power module) and is widely used in industry.
It should be emphasized that the circuit has a relatively simple
structure, despite the high functionality, i . e. in particular, the bidirec
tionality does not result in an increase in the number of switches
compared with the unidirectional structures derived above. Thi s
becomes especially clear on using Reverse Conducting (RC)-IGBTs,
which apart from the power transistor, also include the anti parallel
freewheeling diode in one chip. The same applies (in future) e. g. for
SiC JFETs (in cascode connection) . The circuit is thus of particular
interest, despite the limitation made here to unidirectional systems
as the wide phase angle range may be exploited also in the purely
rectifer mode, e. g. for reactive power compensation.
J) Discussico.
According Sec. IV-AI, the implementation of a three-phase boost
type PFC rectifer i s possible with a current injection concept
based on passive diode rectifcation or, according to Sec. IV-A2-
Sec. IV-A4, by control of the conduction state of a diode bridge with
tum-off power semiconductors, which allows a direct impression of
sinusoidal ac currents.
The direct ac current impression is preferable compared with the
impression of two dc currents (in combination with a current injection
into the third phase) for an industrial system as a switching at
the sector borders, potentially causes distortions i s not required. In
addition, active rectifer systems are not limited to a purely ohmic
fundamental mains behavior, therewith e. g. the capacitive reactive
P

r
U |,
L
u
b b
C

c c
1
a)
n
P
U |,
L
1
b
C


c
1
b)
n
Fig. 20. a) Half-controlled (hybrid) boost-type three-phase ac-dc bridge
circuit. b) Full-controlled active three-phase ac-dc bridge circuit (bidirectional
six-switch active PFC rectifer).
power of the EMI input flter can be (partly) compensated, or in
general a higher fexibility for the current control i s given.
Thus, for the comparative evaluation in Sec. VI- C, only the
switch rectifer, the VlLbbA Rectifer and the (bidirectional) six
switch boost-type PFC rectifer are considered. The -switch rectifer
could here be also omitted with regard to the system complexity.
Given by its structure, however, the system cannot generate a short
circuit of the output voltage in case of a faulty control of the power
transistors. Therewith, an advantage is given regarding the operational
safety compared with the six-switch converter. The evaluation of the
system furthermore is reasonable in terms of completeness of the
analysis.
sector: Z
0l
a)
O
|, O
h
h
W
z
C
C

O
|, O

h
h
C
C
b) c)
Fig. 21. a) Time behavior of the phase voltages within a mains period. b)
Active part of the system for sector 1 ,u, , 0, u, ,u 5 0) with the
possibility of controlling only one phase current. c) Active part of the system
for sector 2 ,u, ,u, , 0, u 5 0) with the possibility of controlling
two phase currents, i.e. all phase currents.
I 5
. Sys/cms wi/h uck-!yc Chumc/cris/ic
As single-phase buck-type ac-dc converters do not enable to
provide sinusoidal currents over the entire mains period [21 ] , the
derivation of buck-type PFC rectifer structures has to refer directly
to three-phase diode rectifer circuits with dc side inductor [cf.
Fig. 2(b)] . The diode bridge has to be extended with tum-off elements
by considering phase- and bridge-symmetry requirements, such that
the mains phases to be connected with the dc side can be arbitrarily
selected. Alternatively, also a system based on the injection principle
could be conceptualized with reference to Sec. IV-AI.
I) Ac/ivc Six-Swi/ch uck- !yc llC kcc/cr.
A power transistor has to be added in series to each diode in the
circuit shown in Fig. 2(b) to enable a full, i . e. a voltage-independent
controllability of the power transfer. The resultant converter struc
ture i s shown in Fig. 22(a) , which i s known from current dc-link
converters used for drive systems [63] . The diode-transistor series
combinations represent here unidirectional , bipolar blocking switches,
which can be also replaced by RC-IGBTs in terms of a reduction
of the conduction losses. However, a limitation of the switching
frequencies to relatively low values (in the range of I0kHz) would
then be required due to the relatively high switching losses [64] .
If a transi stor of the positive bridge half, e. g. transi stor S , and a
transistor of the negative bridge half, e. g. S , are switched on, the
output inductor current I is drawn from phase U and fed back into
phase C
i, +I
i, 0
i I
(34)
[cf. Fig. 22(b)] . In addition, the line-to-line voltage u, i s switched
to the output, i . e. i s used for the formation of the output voltage
u u u- u-
u, (35)
If solely both transi stors of a bridge-leg are switched on, i, i,
i 0 applies and u 0, i . e. the system is in a freewheeling state.
The conduction losses in the freewheeling state could be reduced by
implementation of an explicit freewheeling diode.
By proper modulation, the output current i can thus be distributed
to the three phases in such a manner that afer low-pass fltering
of the pulse-width modulated discontinuous input currents i, i ,
i sinusoidal mains currents result (in Fig. 21(a) only the flter
capacitors C, of the EMI flter on the mains side are shown) .
Furthermore, the output voltage, which is formed by low-pass fltering
of n with the output inductor I and the output capacitor C, can be
adjusted with the relative duration of the freewheeling state starting
from zero to values
| < |, ,

,, (36)
The limited output voltage range i s explained by the fact that two
line-to-line voltages have to be used in each pulse period for the
formation of the output voltage in order to supply each mains phase
with current. In order to maximize the achievable output voltage,
here always the two largest voltages, e.g. u and u
are selected
(valid within a 00 interval of the mains period ,
30 ,+30 ) ,
cf. Fig. lS(c . Both voltages have a phase displacement of 00
Therefore, only voltage values u n

|, ,, ,

,, are
available for the pulse period at the intersection of both voltages.
Correspondingly, the output voltage range i s defned by (36). The
full controllability of the system generally allows an arbitrary phase
I
L
P
a)
n
'uP
^
| u U

b b
L
b)
_
Fig. 22. a) Circuit topology of the active six-switch buck-type PFC rectifer.
b) Equivalent circuit of ac part of the system. Note: if power transistors were
only implemented in the positive or negative bridge half. a circuit analogous
to Fig. 20(a) would result, which also would not allow for a sinusoidal current
impression due to the limited controllability.
displacement between the mains current and the mains voltage of
(37)
However, with an increasing phase di splacement , the line-to-line
voltages switched to the output have lower instantaneous values,
andor
| < |, ,, ,

,,cos , 1 (38)
applies. Correspondingly, e. g. for 1 90 follows | 0, as
i s immediately clear considering the power balance between the ac
and the dc side. The output voltage range (36) is thus only valid for
1 0 andor in order to ensure a wide output voltage range, the
phase di splacement 1 has to be limited to small values [65] .
Note: According t o (37), for the circuit i n Fig. 22(a) , the reversal of
the power fow direction demands a change of the output voltage. A
reversal of the power fow direction at the same polarity of the output
is only possible by extension of the circuit structure with anti-parallel
transistors to the diodes [66] .
A superimposed output voltage controller with an underlying cur
rent controller is used for the system control (cf. Fig. 23) , whereupon
possibly active damping of the input flter has to be applied [67] . It
has to be pointed out that opposed to boost-type PFC rectifers the
mains current is not directly impressed by the control, but i s formed
only by pulse width modulation without feedback from a controlled
dc current. Accordingly, variations of the dc current, parasitic timing
errors of the switching or distortions at borders of the 00 mains
voltage sectors [68] are not immediately corrected. In the practical
application, particularly at high mains frequencies, buck-type PFC
systems therefore show a lower input current quality than boost-type
PFC systems. First considerations of a direct mains current control,
which could eliminate thi s di sadvantage, can be found in [67] .
A hardware demonstrator of the rectifer system is presented in
Fig. 24 [69] . The efciency of the system, implemented with 900V
super-junction MOSFETs and SiC Schottky diodes ,), I8kHz)
equals to 98 9/ at the nominal operating point. This clearly shows,
that with an appropriate semiconductor effort, despite the implemen
tation of the switches as diode-transistor series connecti on, very high
efciencies are achievable.
?) Ac/ivc !hrcc-Swi/ch uck- !yc llCkcc/cr.
As an alternative to Fig. 22, the selection of the conducting phases i s
also possible with four-quadrant switches arranged on the ac side of
the bridge rectifer. The four-quadrant switches can then be integrated
into the bridge-leg structure as shown in Figs. 25(a)-(c) . The resulting
three- switch buck-type PFC rectifer system i s depicted in Fig. 25(d) .
Due to the reduction of the number of switches andor higher
number of diodes, higher conduction losses result. On the other
hand, the installed chip area of the power transi stors i s better
utilized. However, as a result of the lower number of switches, the
controllability is limited compared with Fig. 22. There is not any
more a possibility given for a reversal of the power fow direction, as
can be immediately verifed with Fig. 25(a) . Furthermore, only the
current conducting bridge-legs but not directly the current conducting
diodes are defnable. The conducti on state thus adjusts depending on
the polarity of the voltages at the activated bridge-legs.
'i N*
catt. :ts| gna'

C
Fig. 23. Structure of the control of the active six-switch buck-type PFC rectifer with a superimposed output voltage controller K s) . The output current
controller KI s) with feed-forward of the output voltage !

defnes the voltage at the output of the rectifer bridge. The modulation is performed such that
output voltage of the rectifer is formed in each pulse period by segments of two line-to-line voltages and the dc current i is distributed to the input phases
and sinusoidally modulated.
a)
f
b
f_
~
" z

`
^

|.
b)
Fig. 24. a) Hardware demonstrator of a 6 kW active six-switch buck-type
PFC rectifer. b) Time behavior of the phase currents within a mains period.
Operating parameters : rms line-to-line voltage !N
r
ms !00V, mains
frequency IN 0Hz, dc output voltage ! !00v, switching frequency
Jp I8kHz. The rectifer enables an extremely high nominal effciency of
0em
8 7 [69] althouth there are always four power semiconductor in
the current path (two diode-MOSFET series connections). Scales : Aldiv,
2ms/div.
A restriction of the operating range to
(39)
results, as i s shown by a more detailed analysis, which however i s
of minor importance in view of the preferred ohmic operation as a
consequence of (38). A fgurative explanation of (39) is possible in a
similar manner as for the boost-type - switch rectifer [cf. Fig. 15(c)]
with the 30 phase di splacement between the phase quantities and
the line-to-line quantities, however, is not shown here for the sake of
brevity. The output voltage range for 1 0 i s still given by
U < jUN, l l ,
r
ms . (40)
The control scheme depicted in Fig. 23 can be also applied to
the three- switch system. The switching signals of the transi stors then
have to be generated by OR-connection of the switching signals of
the power transistors of the respective bridge-legs of the six-switch
buck-type PFC topology.
J) HyhriJ Currco/ locc/ico uck- !yc (SWI SS) llCkcc/cr.
As an alternative to the direct control of the current formation
of a three-phase diode bridge, a three-phase PFC rectifer can also
be implemented, according to the concept of 3
r
d
harmonic current
injection described in Sec. IV-AI for boost-type systems. Then, only
the dc-dc boost converters of the circuit in Fig. 12 have to be replaced
by buck converters. The resultant circuit is shown in Fig. 26(a) . To
the knowledge of the authors, thi s system has not yet been described
in the literature, presumably due to the general focus in research on
systems with boost-type characteri stic. In the following, the circuit
topology i s thus designated as SWI SS Recti fer [4] , [70] .
Contrary to the circuits according to Sec. IV-Bl and Sec. IV-B2,
the rectifer diodes of the system are not commutated with switching
frequency. Correspondingly, the conducti on losses can be reduced by
employing devices with a low forward voltage drop (and a higher
reverse recovery time) . As for the boost-type system, the current
Inj ection is performed again with four-quadrant switches into the
phase with the currently smallest absolute voltage value. In thi s
P P
n
P
L
P
n
d)
Fig. 25. Derivation of the circuit topology of the active three-switch buck
type PFC rectifer. A four-quadrant switch is formed by a diode bridge and a
dc side power transistor is inserted on the ac side in a). Afer merging series
connected diodes and redrawing, the bridge-leg structure in c) results, and/or
the three-phase circuit topology in d) .
context, it should be mentioned that with a passive injection network,
a current injection into all three phases is possible. Such a system was
proposed in [ 1 2] and is, as described in Sec. IV-AI, also known for
boost-type systems. However, in consideration of the large volume
of the passive injection network and the higher injection current, thi s
approach is not di scussed further in this paper.
For the proof of the sinusoidal controllability of the mains currents,
I 2 /
L
l

`,
.
L.

I C

L.
Z
L
n
/
S+
2
I
/ l

0.|
U /,/ u
/
v i
b /
o b
C
/
c
0/
b)
<
Z
L
/
n

n
Fig. 26. a) Basic structure of the SWI SS Rectifer. b) Local average equivalent
circuit of the active part of the system for UaN , UbN , UcN.
I 8
again a 00 interval of the mains period with UaN > UbN > UcN or
CN 0, 00 ) is considered. The active part of the circuit in thi s
mains sector is depicted in Fig. 26(b).
The rectifer system should represent a symmetric three-phase load
of (fundamental) phase conductance G* to the mains. Accordingly,
the local average values of the (discontinuous) input currents may be
written as
1a
G* UaN
1
5

G* UbN
1c
G* UcN
(41 )
(Ui N * UrN) . The reference output current I* , t o be impressed by the
buck converter, i s then given under the assumption of a symmetrical
three-phase mains system by
i s relevant. Afer simplifcation, the output voltage may be written as
u, O+Uab - O-Ucb . (47)
A multiplication of (47) with I results in
(48)
the instantaneous power , which under the assumption of symmet
rically loaded mains shows a constant value I Accordingly,
at a constant current I, also a constant voltage u__ and thus due to
UL 0 a constant output voltage upn Upn is generated.
As the previous derivation shows, the operation of the system i s
limited to purely ohmic fundamental mains behavior,
(49)
[cf. (41 ) ] . The output voltage range i s limited by the minimal value
(42) of the six-pulse diode bridge output voltage,
(UN designates the amplitude of the phase voltages, Upn is the output
voltage) . An ideal output current controller andor 1 I I* i s
assumed for the further considerations. The currents in the phases U
and C are impressed by a respective switching (PWM) of S+ and S_
whereby the duty cycles result with (41 ) , (42) , and (43) as
2 Upn
0+1 - -u N
_ ^ _ a
U
N
2 Upn
0+1 -- -u N
_ ^ _ c .
U
N
(43)
(44)
Considering the partitioning of the current in the node Y and ia +
ib +ic 0 or 1a +1
5
+1c 0, the injection current
(45)
results. Thus, the correct current i s injected into the third phase (here
phase |). For the formation of the output voltage,
u,
O+UaN + I - 0+) UbN - (o- ucN + I - o )UbN) (46)
b
c
Upn < IUN, l l ,
r
ms , (50)
and therewith identical with the output voltage range for six- switch
active buck-type PFC rectifer systems.
A possible implementation of the control circuit of the system, with
a superimposed output voltage controller K B, and a subordinate
output current controller Kj B) i s shown in Fig. 27. Ultimately,
with the output current controller the current forming voltage u, is
defned, where advantageously a feed-forward of the output voltage
u;n U is applied. The adjustment of u, i s obtained with an
appropriate selection of the duty cycle of the pulse width modulation
of the transistors S+ and S_ [cf. (43)] . There, the (normalized)
voltages UpN and UnN are used as modulation functions according
to (44) (cf. also Fig. 27) .
The pulse width modulation of S+ and S_ can be implemented i n
phase or antiphase. The switching frequency ripple of iy i s minimized
for carrier signals UD+ and UD- that are in phase. For carrier signals
that are in opposite phase, a minimal output current ripple but a
C
L
. =
|
P
n
Fig. 27. Control structure of the SWI SS Rectifer with a superimposed output voltage controller K s) and a subordinate output current controller Kj s)
with feed-forward of the output voltage. The voltage required to control the output current is formed through modulation of s+ and s such that in both
conducting branches of the diode bridge a pulse width modulated current results. The local average value of this current is proportional to the corresponding
mains phase voltage. A four-quadrant switch is switched on by the sector control and injecting always into the mains phase with the smallest absolute voltage
value.
U |, u
h
c
C
-
_

n
Fig. 28. Combination of an active-flter-type 3
r
d harmonic current injection
rectifer and a dc-dc buck-type converter stage to an active buck-type PFC
rectifer system. The system is characterized by a minimal number of power
semiconductors in the main current path, and only a low-frequency variation
of the output CM voltage. The dc-dc buck converter should be advantageously
implemented as interleaved converter.
maximum ripple of i, results, which needs to be considered for the
design of the flter capacitors C, at the input.
It should be noted that a hybrid 3
r
d harmonic injection PFC
rectifer circuit can also be built by combination of an active
flter-type 3
r
d harmonic injection rectifer and a simple dc-dc buck
converter stage (cf. Fig. 28). The buck stage to be controlled e. g. for
a constant output current or a constant output voltage then ensures,
independent of the pulsation of the voltage u_ with sixfold mains
frequency, a constant output power. The advantage of thi s circuit
topology is that only a single power transi stor i s lying in the main
current path, i . e. in particular at high output voltages with a relatively
short freewheeling interval , low conducti on losses occur. In addition,
the negative output voltage terminal i s always connected to the mains
via a diode of the lower bridge half of the diode rectifer. Therefore,
no output CM voltage with switching frequency is generated. The
implementation effort of the CM EMI flter can thus be reduced.
Only the parasitic capacitors of the power semiconductors lead to
high-frequency CM noise currents (cf. related consideration of boost
type PFC rectifer systems in 5J] ).
1) Discussico.
The impression of the mains current of the considered buck-type
PFC rectifer systems i s obtained with so far known current control
schemes always only in an indirect manner. Accordingly, contrary to
the boost-type PFC rectifers (cf. Sec. IV-AS) , concepts based on the
current injection principle and direct active systems can be considered
as equivalent regarding the achievable input current quality.
Therefore, for the comparative evaluation in Sec. VI- C, both
concepts, i . e. the six- switch buck-type PFC rectifer and the SWISS
Rectifer, are considered. The three- switch buck-type PFC rectifer
i s omitted due to the higher conduction losses and the less uniform
distribution of the semiconductor losses compared to the six-switch
buck-type PFC rectifer.
C. Sys/cms wi/h ccs/- !yc uoJuck- !yc Chumc/cris/ic
As shown in Fig. 4, the output voltage range of boost-type PFC
rectifers is not immediately adj oining the output voltage range of
buck-type systems. Voltages in the range
UN, n,
r
mS < Upn < hUN, n,
r
ms 5 I )
can thus only be generated with a downstream dc-dc boost converter
of the buck-type PFC rectifer or by combination of boost-type PFC
rectifer and a dc-dc buck converter.
A possible implementation of such dc-dc converter system i s
shown in Fig. 29. The bidirectional , i . e. for boost and buck operation
designed converter has an output power of I0kW, allows a voltage
I 9
P
.

L
a
C
L

.
C
a)
n n
Fig. 29. a) Circuit topology of a (bidirectional) 6 kW Triangular Current
Mode (TCM) Zero Voltage Switching (ZVS) buck dc-dc converter compris
ing three interleaved stages. b) Ultra-effcient and ultra-compact hardware
demonstrator with a nominal efciency of q 7 and a power density
of p 18. 5 kW/dm
3
. Specifcations : nominal input voltage Upn 350 V,
output voltage range U An 0 V . . . 350 V, rated output power !, 10 kW,
switching frequency of each stage at rated output power , 48 kHz.
transfer from U1 350V to U, 0V 350V, and compri ses
three interleaved subsystems. The di scontinuous current mode op
eration of the subsystems with resonant switching transition and/or
zero voltage switching 7 I ] minimizes switching losses and allows
the selection of a high switching frequency (at nominal operation) of
), 48kHz. Therewith, a very high efciency of q 99/ and a
power density of I8 5kW/dm
3
is achievable.
As an alternative to an explicit implementation of a dc-dc con
verter, a dc-dc boost converter stage could also be integrated into
the output stage of a buck-type PFC system, whereby the output
inductor could also be used as boost inductor 72] , 7J] .
V. DIMENSIONING OF THE POWER SEMICONDUCTORS AND OF
THE EMI FILTER
In the following, the current and voltage stresses of the systems
in Sec. IV-AS and Sec. IV-B4 are briefy summarized to assist a
practical implementation of the circuit topologies described above.
In addition, the basic structure of the EMI flter on the ac side is
discussed with a focus on the CM fltering.
A. Dimcosicoiog c{ /hc lcwcr ScmiccoJuc/crs uoJ Muio lussivc
Ccmcoco/s
The current stresses of the power semiconductors of a PFC rectifer
systems are ofen determined for a defned operating point by
simulation. Alternatively, a calculation can be also performed only
analytically with good accuracy. Simple mathematical expressions
then result, which are valid over the whole operating range (under the
constraint of CCM) and thus provide an ideal basis for the analysis of
the component stresses and/or the losses at different operating points
or input and/or output voltages.
The starting point for the analytical calculations are the relative
switch-on times of the power transi stors which can be determined
analytically for the whole mains period if the modulation method i s
known. The remaining parameter i s the modulation index M, which
2O
represents the ratio of the amplitude of the three-phase voltage or
current system on the ac side and the dc output voltage, andor the
dc output current
voltages of interest can be determined [74] by averaging over the
mains period. The resultant equations for the individual topologies
are compiled in Fig. 30.
M
_ !
1
(52)
. DMuoJCMLMl li//cr
,| | represents the amplitude of the fundamental of the
discontinuous phase voltage at the rectifer input of a boost-type
system, ! is the amplitude of the fundamental of the discontinuous
phase currents at the rectifer input of a buck-type system).
With the relative switch-on time (duty cycle) and the input current
(for boost-type rectifers), andor the output current (for buck-type
rectifers) , the instantaneous conducti on states of the power semi
conductors are defned, and the local average current values can
be calculated by averaging over a pulse period. Based on that, the
global average and root mean square (rms) values of the currents and
l
_ +a ,( ! + i :t ,
s ..- a
24*
U |,

b
L
c
L
1
a)
I
_ t + .-:!
|z-
z- + ;(! + 1+!)
z1-
!
n
- +t
lo...vg I.
z

`
A|
] s)p ..vg
@
/a _ __
I D. rm
g
Ia
!t s +z,

P
The input inductors of the boost-type PFC rectifer systems,
discussed in Sec. IV-A, are to be considered as the frst stage of
a multi -stage EMI flter placed on the ac side similar to the input
flter capacitors of the systems with buck-type characteri stic. The
conducted EMI noise is suppressed with thi s flter such that the
standards of conducted noise are fulflled in the frequency range of
I 50kHz . . . 30MHz (e. g. CISPR I I ) . (Depending on the application,
another EMI flter might be required on the dc side [75] , [76] , which
however i s not di scussed here for the sake of brevity. )
Three-phase rectifer circuits inherently generate a CM voltage
between the mid-point of the output voltage (the output voltage buses)
L
P
IS/D . a vg
U |,
b
C
c
d)
n
.
I, g l \

[D, rms ! !I

I, ,,, _
I _

P
U |,
L
U
|,
b
L
c
L
b)
[0.,g .

i \t
]
IS, 3\'g la _- _

ID. rm a

Is. rlll
g
In

_- _
U |,
L
b
L
c
L
c)
n
n
b
C
c
L
v
!, ,, t, _
/D \

+ ts... I

/. + _ l l0 -

/

-

U |,
b
C
l

z ,
`
/s,. ..,
@
/
z=
C
~/s,o ..

/ , - --

n
Fig. 30. Circuit topologies and current stresses of the main components of the power circuit of selected active boost- and buck-type PFC rectifer systems.
a) Six-switch boost-type PFC rectifer [cf. Fig. 20(b)] , b) -switch rectifer (cf. Fig. 16), c) V!lXXA Rectifer (cf. Fig. 8), d) six-switch buck-type PFC
rectifer (cf. Fig. 21), e) Sw! ss Rectifer (cf. Fig. 25), and 0 active-flter-type 3
r
d harmonic current injection rectifer (cf. Fig. 13).
and ground. The CM voltage waveform for a passive diode rectifer
circuit with inductors on the dc side i s depicted in Fig. 31(a) . For
active rectifer circuits, the CM voltage has a pulsed waveform [cf.
Figs. 31(b) and (c)] thus, CM currents result due to the parasitic
capacitances to ground.
For fully active boost-type PFC systems, e.g. for the VIENNA
Rectifer, the CM voltage originates from the rectifer ac side phase
voltages employed for the current impression that do not add to zero
(except for the switching state SaM S
5M
ScM I) Thus, as for
the Y-rectifer, shown in Sec. III-A, a CM voltage
I
UMN
_(UaM +U
5M +UcM) UCM (53)
i s generated between the mid-point of the output voltage and the
(grounded) mains star-point, which could contain a low-frequency
component UCM, but contains in any case a switching frequency
component UCM,
UCM UCM +UCM, (54)
(cf. for the VIENNA Recti fer also [53] , Fig. 3.4 and Fig 5. 73). A
fltering of UCM, can be achieved by connecting M via a capacitor
CCM, M to an artifcial mains star-point ^ (representing the ground
potential) , formed by a star-connection of flter capacitors CF and
insertion of a CM inductor LCM, l in series to the boost inductors
[cf. Fig. 3Z(a)] . A low-frequency variation of the potential of M i s
thus not prevented. In addition, contrary to a placement of CM flter
capacitors to ground, ground currents are minimized. Additional CM
flter stages have to be implemented on the mains side for the fltering
of the noise currents that result from the parasitic capacitances of the
power semiconductors to the heat sink [53] .
For fully active buck-type PFC systems, within each pulse period
two line-to-line voltages are switched to the rectifer output for the
formation of the output voltage and for the distribution of the output
current to the mains phases. Thi s again leads to a CM voltage UCM,
at switching frequency. (A CM voltage during the freewheeling
interval can be avoid by symmetrical splitting of the output inductor
to the positive and negative output bus). The concept described above
for boost-type converters can advantageously also be used for the
fltering of UCM, of buck-type systems [cf. Fig. 3Z(b)] where the
CM inductance has to be inserted on the dc side.
For determining the switching frequency component of the OM
voltage, which i s relevant for the design of the OM fltering, for
boost-type systems within each pulse period, the formation of the
input current has to be considered. E. g. for phase U
di,
( ) L
T
U,N - UaM +UCM U,N - UaN
U,N - UaN - UaN,
(55)
(56)
applies. The phase current consists of a fundamental and a switching
frequency component
where the fundamental component , is formed according to
d, .
L
T
U,N - UaN
and the voltage to be suppressed by the OM fltering i s
di,
L
d
UaN,
UDM, .
(57)
(58)
(59)
The fltering of UDM, (each phase shows an equal spectral composi
tion of the related OM voltage) i s performed with the boost inductors
and with ac side capacitors CDM, l between the phases, whereby
typically two flter stages are required [cf. Fig. 3Z(a)] . Additionally,
a) I (ms)
400 -
,- 200
c
0
L
;
-200
b)
400
r
-200 ---_--_--_---
-400
0 5 1 0 1 5 20
c) I (ms)
2I
Fig. 31. CM voltage at the output of three-phase rectifer systems referenced
to the grounded star-point of the mains. a) Passive diode rectifer with
smoothing inductor on the dc side [cf. Fig. 2(b)] . b) V! lXXA Rectifer [cf.
Fig. 18(a)] . c) Six-switch buck-type PFC rectifer [cf. Fig. 22(a) ] .
damping elements for reducing the resonance peaks [77] in respect
of the control stability of the system have to be added, which also
prevent the excitation of the flter by harmonics of the mains voltage.
For buck-type systems, the OM noise i s generated by the pulsating
input currents at switching frequency and is attenuated by the input
flter capacitors CF and the ac side flter inductors LDM, l and an
additional input flter stage.
Regarding the volume of the EMI flter, it has to be noted that, e. g.
for boost converter systems, a constant voltage i s decomposed into
its spectral components by the pulse width modulation, i . e. into a
mains-frequency fundamental component and harmonic components
grouped around multiples of the switching frequency with sidebands.
Only the fundamental frequency i s used for the impression of
the phase current, i . e. the switching frequency harmonics must be
suppressed with an appropriate EMI (input) flter. The harmonic
components, i . e. ultimately the difference between the constant output
voltage | and the actual low-frequency voltage component to be
formed, e. g. UaN, show similar rms values. Considering in addition
that the EMI input flter has to conduct the input current of the
converter, a signifcant fraction of the total converter volume is ex
pected to be determined by the EMI input flter. Thi s i s confrmed by
implemented systems, where the volume of the EMI flter (including
the boost inductors or buck input flter capacitors) typically represents
30% to 50% of the total converter volume (cf. Fig. ZO) . Here,
it should be pointed out that the required flter attenation can be
calculated analytically in a simple manner by determining the spectral
decomposition of the rectifer input voltage into a fundamental and
a total noise voltage [78]-[80] .
VI . COMPARATIVE EVALUATION
In the foregoing sections, boost- and buck-type PFC rectifer
systems suitable for industrial application have been identifed and
briefy di scussed. In the following, a comparative evaluation of
selected circuit concepts with regard to efciency, volume, and
22
|
^|: v. | c
ui . | c
'|:v.z _'cvz '|:vi .

............
L
C|
l

'CH,
l"
C
^o. i c
_
'`
/N
L_
0 'a
"N
b
*D

C||
Fig. 32. Example of the EM! flter structure of a) an active boost-type PFC rectifer system V! lXXA Rectifer, cf. Fig. 18(a)] and of b) an active six-switch
buck-type PFC rectifer [cf. Fig. 21] . Commercial EM! input flters typically employ flter capacitors at the input (mains) side. Accordingly, an additional
flter stage is formed by the inner mains impedance Z,which could be deliberately increased to limit the short-circuit current. Fuses, over-voltage protection
devices, bleeding resistors, and precharging circuitry are not shown. (Remark: Optionally, the CM capacitors could also be combined with the DM capacitor
stages, i. e. by adding a Y-capacitor between the star-point of the DM capacitors and ground. )
implementation effort, and therewith fnally implementation costs
i s provided to highlight the advantages and di sadvantages of the
individual systems and to facilitate the selection of a circuit topology
for a specifc application.
The performance indices used for the evaluation (cf. Sec. VI-A)
are calculated using the same specifcations for each system:
Rated output power I, 10 kW;
Line-to-line mains voltage |, ,, ,

,, 400 V,
Output voltage |, 700 V (boost-type systems), |, 400 V
(buck-type systems) ;
Power transi stors: 1200 V SiC JFETs (Infneon/SiCED, in cas
code confguration, i . e. with normally-off characteristic) ;
Power diodes: 1200 V SiC Schottky diodes (Infneon, ThinQ2,
commutation/freewheeling diodes), 1200 V Si EmCon4 diodes
(Infneon, rectifer diodes of the SWI SS Rectifer) ;
Switching frequency: ), 48 kHz;
Thermal conditions: average junction temperature of the semi
conductors 1, , ,,_ 125C, heat sink temperature 1 85C,
ambient temperature 1 45;
DC output capacitors: aluminum electrolytic capacitors
(B43501 - series, EPCOS), 400 V capacitors for boost-type
systems (two in series), 500 V capacitors for buck-type
systems, designed for a mean time-to-failure of 50'000 h
regarding the rms current loading and an assumed maximum
capacitor temperature of 65C;
AC flter capacitors (buck-type systems) : foil capacitors (MKP,
305 V ac, X2, B3277x- series, EPCOS).
The rated output power of 10 kW represents a typical value for
three-phase power supplies. The power transistors are implemented
with SiC JFETs. Thi s allows the use of the same transi stor technology
for all systems under investigation as the boost-type PFC rectifer
systems feature two- or three-level characteristic, which requires a
minimum blocking capability of 700 V or 350 V. Furthermore, in
combination with SiC Schottky freewheeling diodes, a relatively high
switching frequency of ), 48 kHz i s enabled which represents
a reasonable compromise for both converter types. (For the six
switch boost-type PFC rectifer systems the internal body diodes
of the JFETs are used instead of explicit freewheeling diodes. )
Alternatively, the three-level converter Vl LbbARectifer) could also
be implemented with Si super-junction MOSFETs and the two-level
converter with 1200 V IGBTs, which however would only allow a
maximum switching frequency of ), 20 kHz. In addition, the
SiC JFETs can be also applied for the buck-type rectifer systems,
which have a similar blocking voltage requirement for the power
semiconductors as the two-level boost-type systems. Only for the
Swl SS Rectifer, the diode rectifer at the input is implemented with
low on-state voltage drop Si diodes instead of SiC Schottky diodes
in order to achieve a high effciency.
The chip area of the semiconductors is designed based on a
thermal model of a typical semiconductor package (EconoPACK,
Infneon, [79]) and a heat sink temperature of l_ 85C such
that an average junction temperature of 1, , ,,_ 125C results. For
determining the semiconductor losses, the conduction characteri stics
(on resi stance or diode forward characteri stic) and the switching
losses are considered with reference to data sheet values and results of
experimental measurements on commercial components [79] . Thus,
an equal usage of all semiconductors i s ensured. In addition, the
semiconductor design ensures that the amplitude of the junction
temperature ripple (with mains frequency) remains limited to values
that guarantee a mean time-to-failure of 50'000 h considering typical
cycles-to-failure rates [8 1 ] that is equivalent to the dimensioning of
the electrolytic capacitors.
It is worth noting that the relatively high equal junction temperature
of all power semiconductors leads to relatively high semiconductor
conduction losses due to the selected unipolar devices. In order to
achieve a higher effciency, semiconductor devices with a higher
current rating, i . e. a larger chip area, could be used, and a lower
junction temperature could be selected.
A. Dc]oi/ico c{ /hc lcqcnuocc loJiccs
In order to provide a universally valid quantifcation of the con
verter performances, normalized performance indices are employed,
which are independent of the actual system dimensioning. Thereby,
the output power I, and the load current 1 are used as reference
values.
With reference to 8] , the fctitious total apparent power and the
normalized conduction and switching power loss are used for the
characterization of the semiconductor expenditure.
I) !c/u/ !mosis/cruoJDicJc \A ku/iog.
Total Transi stor VA Rating
-
_

us, ,,,, is, ,,,,

i
s
=
Total Diode VA Rating
-
_

ur, ,,,, ir, ,,,,

i
r
=
0)
I)
,us, ,,,, and ur, ,,,, refer to the maximum blocking voltage stress
without considering switching overvoltages, is, ,,,, and ir, ,,,, to
the peak current value of the n-th device;
is
and ir were defned
in 8] for the assessment of the transi stor and diode utilization. )
?) kc/u/ivc !c/u/ CcoJuc/ico Lcsscs.
Relative Total Transi stor Conduction Losses
23
component of a phase current may then be written as (shown e. g.
for input phase o)
ury, ,, ,

,, = u,

,,
u,

,,
= ury, ,

,, . v)
The Common Mode (CM) voltage is given by
I
u,y = _ uy +u,y
+u-y) 70)
(cf. 4) , where M designates the (fctitious) mid-point of the output
voltage. Analogous to v), the CM noise voltage relevant for the
flter design can then be approximately calculated by subtracting the
low frequency component u,y

, ,
u,y, -,
,,

u
,y

,,
u
,y

,,

, ,
7 I )
For the buck-type PFC system the CM voltage can be calculated as
I
u,y = _ u+u) , 72)
and the switching frequency component again according to 7I ) .
_

I
s,

,,,
, =
o
(2) Instead of ury,
[cf. 5v)] , here, the rms value of the switching
frequency components of the discontinuous input currents
Relative Total Diode Conduction Losses
c =
_

Ir,

,,,
1o
(J)
As mentioned above, for the transi stors (SiC JFETs) and diodes, the
semiconductor chip area is scaled with the current loading and/or
the power loss such that a constant (average) junction temperature of
all power semiconductors is given. Correspondingly, the conduction
losses of the transi stors only increase linearly and not quadratically
with the current loading.
J) kc/u/ivc !c/u/ !mosis/cruoJDicJc Swi/chiog Lcsscs.
r =
, =
_

Is, r,
I,
_

Ir, r,
I,
4)
5)
The switching losses are calculated based on experimentally verifed
switching loss measurement data 7v] and are approximated linearly
as a function of the switched voltage and the switched current for a
junction temperature of 1, = I 25 C
1) kc/u/ivc cxcJ \c/umc c{ /hc loJuc/crs uoJ Cuuci/crs.
Regarding the passive components for the boost-type rectifer systems
only the boxed volume of the boost inductors (iron power cores) and
the output capacitors (electrolytic capacitors) and for the buck-type
rectifer systems only the boxed volume of the output inductors (same
core material as used for boost inductors) and of the ac side flter
capacitors C, = Cry, , (MKP X2 foil capacitors) are considered.
Inductors
Capacitors
- _,\r, .
/,
=

-
_,\,, .
/c
=

5) CcoJuc/cJDg crco/iu/ uoJ Ccmmco McJc Ncisc.
)
7)
The assessment of the conducted EMI noise behavior and/or of the
required flter effort to meet the EMC standards i s performed for the
boost-type systems based on the Differential Mode (OM) component
ury and the Common Mode (CM) component u,y of the noise
voltage at the rectifer input
u,. ,- = ury, - +u,y, - (8)
Thereby, in terms of a simplifcation 78] , for the OM noise voltage
ury the total voltage, forming the boost inductor current ripple
.
_ ,

,
try, ,, -,

,,

,,

,, ,,

,, 7J)
(shown for input phase o)i s used for the assessment of the OM flter
attenuation requirement. A voltage noise level could be calculated by
multiplication with ! = 50!, the input resi stance of a typical EMI
test receiver.
6) L]cicocy.
The efciency of the systems is characterized by the relative losses
Ir I, I I
= I = i - ,
I,
74)
where in addition to the semiconductor losses and main power
components also a power consumption of I,, = J0W for the
auxiliary supply (control circuitry, gate drives, fans) is considered.
/) \c/umc c{ /hc Ccc/iog Sys/cm.
With the relative losses I - ) and the Cooling System Performance
Index 82]
CSII=
., s,
\s
75)
,., s
, designates the required thermal conductance ,W/ K) be
tween the surface of the heat sink and the ambient) and a given
admi ssible temperature difference ^ 1, the volume of the forced
air cooled heat sink can be calculated to 8J]
_

., ,, _ Ir
s

CSII

^ 1,,CSII
Commercial heat sink profles have a typical CSII
5 7 W/K 4o

) , with optimized heat sink profles a CSII

I 2 I 5W/(K 4o

, is achievable.
. Ccmurisco c{/hcSix-Swi/ch ccs/kcc/cr /hc ^ -Swi/ch kcc-
/cr uoJ/hc Vl LbbA kcc/cr
In Fig. 33, a performance compari son of the six-switch boost
PFC rectifer, the !-switch rectifer, and the Vl LbbA Rectifer is
shown based on the performance indicies defned in Sec. VI-A. The
representation is chosen such that for high performance only a small
area i s covered.
All systems require a similar total chip area, show approximately
equal relative losses, approximately the same OM and CM conducted
EMI noise levels, and allow for continuous operation in case of a
mains phase loss. The main advantage of the three-level characteri stic
of the Vl LbbA Rectifer i s the signifcantly lower volume of the
24
- Si x-Switch Boost
Type Recti fer
- - D-Switch
/|
Recti fer
( - ,
- V |LNNA Recti fer
r
( - ,
cai
(mm')
| OO
`.
| - )
r I O-
_

_
-
'
' `
| I
( - )
'Cv
(dBJ.V)
l -r
( )
/|
(cm]/kW)
/C
(cm]/kW)
Fig. 33. Comparative evaluation of two alternative active boost-type PFC
rectifer systems, i.e. the six-switch rectifer according to Fig. 20(b) and the
V! lXXA Rectifer according to Fig. 17(a). The characteristic of the -switch
rectifer is shown by a dashed line.
boost inductors compared with the two-level topologies. Only a small
difference between the individual systems i s given regarding the
volume of the output capacitor as the two- and three-level converters
have similar rms values of the capacitor currents and in any case a
series connection of two electrolytic capacitors is required because of
the output voltage of | 700 V. The center tap for the VI ENNA
Recti fer thus is inherently available.
In summary, the six-switch converter i s characterized by a very
simple structure of the power circuit and the VI ENNA Rectifer by a
relatively small overall volume or a high power density. In addition,
for the VI ENNA Rectifer (as well as for the - switch rectifer) a short
circuit of the dc-bus through a faulty control of a power transi stor i s
not possible and for both topologies, power transistors with relatively
slow parasitic anti-parallel body diodes can be used.
The use of the -switch rectifer, which i s relatively complex with
regard to the circuit structure and modulation, can be only justifed
when a three-level topology does not provide signifcant advantages
due to a low mains voltage or if an unidirectional topology is required
that prevents energy feedback into the mains by its hardware structure
and not only by control. Power supplies in aircraf could serve as an
example here.
C. Ccmuriscoc{/hcAc/ivcSo-Swi/chuck- !ycllCkcc/cruoJ
/hc SWI SS kcc/cr
In Fig. 34, a conventional six-switch buck-type PFC rectifer
according to Fig. 22(a) and a SWI SS Rectifer according to Fig. 26
are compared. Both systems show, with respect to the total chip area
requirements, the volume of passive components, the efciency, and
the conducted EMI noise, only very little differences. An increase
in efciency of the six-switch structure would be easily possible by
using an explicit freewheeling diode across the dc link. For the SWI SS
Rectifer, a reduction of the number of power semiconductors can be
achieved through modifcation of the circuit topology according to
Fig. 28. In addition, the mains commutated injection switches could
be implemented with RC-IGBTs with a low forward voltage drop as
an alternative to the SiC JFETs.
- Si x-Swi tch
Buck-Type
Recti fer /
_

- SWI SS Recti fer

( - )
r
( - )
chip
(mm')
o
( " )
r,O
-
_ _ _ _
'
IO'
( - ) ( - )
| TO
| -r
()
| OO
/C
(cmJ/kW)
Fig. 34. Comparative evaluation of two alternative buck-type PFC rectifer
systems, i. e. of the active six-switch rectifer according to Fig. 22(e) and the
hybrid Sw! ss Rectifer according to Fig. 26.
In summary, the main advantage of the SWI SS Rectifer i s not seen
in a higher performance but in a dc-dc converter like circuit structure.
Accordingly, basic knowledge of the function of a passive diode
rectifer of the input stage of the system is sufcient to implement
a three-phase PFC rectifer with sinusoidal input current and a con
trolled output voltage. In particular, no space vector based modulation
scheme, which i s frequently applied to three-phase converters and
typically leads to diffculties when dealing the frst time with three
phase systems, has to be implemented.
VI I . CONCLUSI ONS
As shown in thi s paper, a three-phase PFC rectifer functionality
can be implemented besides a phase-modular approach with
I) direct control of the conduction state of a three-phase rectifer
through integrated power transi stors or parallel control branches
with active power semiconductors, i . e. as an active rectifer or
2) by shaping the output currents of a three-phase diode rectifer
on the dc side and feedback/injection of the current difference
always in that phase which would not conduct current for
conventional passive diode rectifcation, i . e. as a hybrid rectifer
with 3
'
harmonic current injection.
Following these basic concepts, direct three-phase rectifer circuits
with boost- or buck-type characteri stic are realizable. These circuits
advantageously have a bridge topology (at the input) with bridge-legs
of identical structure and thus feature an overall bridge symmetry.
For both circuit categories, over the last two decades, a variety of
circuit topologies have been proposed. However, in the opinion of the
authors, from the category of the boost-type rectifer systems, only
the conventional (bidirectional) six- switch converter and the VI ENNA
Rectifer and from the systems with buck-type characteristic only
again the six- switch structure and the SWI SS Rectifer, proposed in
this paper, are of interest for industrial application. Compared to these
four topologies, other circuit concepts show a (signifcantly) higher
complexity of the power and/or the control circuit, or have high
component stresses at a lower complexity and a limited operating
range with regard to output voltage range and/or current-to-voltage
phase di splacement angle at the input. Thi s is of particular importance
when operating at unbalanced mains systems or in case of failure of
a mains phase.
The selected circuit topologies enable very high efciencies as a
result of the excellent conduction and switching characteri stics of
modern Si and SiC power semiconductors. Sof- switching concepts
are thus not necessary and would also not be accepted by industry
due to the increase in complexity resulting from the auxiliary circuit
branches with additional losses and due to the typically complex
state sequence within a switching period. In general , in industry only
circuit topologies are practicable that are well understood not only
by the inventors but also by a sufciently large number of engineers.
In terms of system complexity, it should be noted that the restric
tion to unidirectional power fow does not allow a reduction e. g. a
halving of the number of active semiconductors or a simpler control
scheme. The reason is that ultimately also unidirectional structures
have to conduct phase currents of both directions and to generate
voltages with both polarities. Only for three-level converters, a clear
advantage of unidirectional converters (VI ENNA Rectifer) is given
compared with bidirectional converters ; for the unidirectional system
six transi stors (with anti-parallel diodes) and six diodes are required,
whereas the implementation of a topologically similar bidirectional
T-type three-level converter system [84] requires twelve transi stors
(with anti-parallel diodes).
The main three-phase PWM rectifer circuit topologies, except
the SWI SS Rectifer, have been already theoretically investigated
and experimentally verifed in the literature. Therefore, for further
academic research, mainly the following relatively narrow topics
remain:
Direct mains (input) current control of buck-type PFC rectifer
circuits. [For these systems typically only the output voltage and
the output current is directly controlled and/or the mains current
is not explicitly included in a feedback loop; thus, particularly
for high mains frequencies (800 Hz) , current distortions can
occur at the intersections of the line-to-line voltages. ]
Parallel operation of a higher number (more than two) converter
systems. (High output power levels are ofen implemented
by parallel connection of multiple low-power modules where
circulating currents could occur in between the systems. )
Stability of distributed converter systems. (The constant power
characteristic of PFC rectifers results in a negative differential
input impedance, which can lead to instability in combination
with the EMI input flter or the inner mains impedance and/or
with other converters [85] . )
In addition to these topics, especially the multi-objective optimiza
tion of converter systems represents a wide and interesting feld of
research. When developing an industrial systems, besides a defned
effciency and power density, mainly a cost target has to be met,
and a certain lifetime has to be guaranteed, i . e. multiple performance
indices have to be simultaneously considered. It is therefore essential
to understand the mutual dependence of the performance indices in
the course of the design, e. g. the trade-off between power density p
,kW/dm
3
) and efciency T ,).
The achievable performance limit (Pareto-Front), i . e. when all
degrees of freedom are optimally used, can be determined based on
a mathematical model of the system behavior and the design process
with a multi-objective optimization (cf. [30] , Fig. 2) . The infuence
of individual design parameters, e. g. the switching frequency, can
then be immediately identifed and/or the necessary parameters for a
target performance can be directly calculated. Fig. 35 shows, as an
example, the T-p-Pareto-Front based on data of hardware demonstra
tors of the VI ENNA Rectifer with different switching frequencies.
X
72
72
VR-J2
250
VR5
250

W| thoatCoo|cr
9
97
96
95
VR 5500
WtcrCoo| cd

500

93
92
9 |
90
4
VR- | OOO
6
|orccdA| rCoo| cd
8 | 0 | 2
.wa,
5(
`
| 000
000
| 4
25
| 6
Fig. 35. 7-p-Pareto-Front based on hardware demonstrators of 1 0 kW
V! lXXARectifer systems (the parameter is the switching frequency). The best
compromise between the efciency and the volume determining technologies
was identifed during the design process for each system. A switching
frequency of ], _ 250 kHz is recommended for an industrial implementation
based on the current state-of-the-art as it leads to a relatively high power den
sity (p !kW/dm
3
) and still a high nominal efciency (7nom 7),
and guarantees a high input current quality also for high mains frequencies
as e.g. in More Electric Aircraf (MEA) applications [cf. Fig. 20(b)] .
Starting from ], 73 kHz, an increase in the switching frequency
leads, due to the increase of the switching losses and therewith an
increase in the heat sink volume, to a reduction of the power density,
which cannot be compensated by the possible reduction of the EMI
flter. A higher switching frequency, e. g. ], 250 kHz i s therefore
only sensible, if a low distortion of the input current IHD, must be
guaranteed at high mains frequencies as e. g. for MEA applications
with ] 360 . . . 800 Hz.
The T-p-Pareto-Front, besides for the specifcation of the design
parameters, can be also advantageously used for a comparison of
alternative circuit concepts, e. g. in the course of an industrial devel
opment process. Each circuit topology i s then characterized by the
associated performance limit and thus the difference in performance
and the suitability of a concept to meet the target performance i s
immediately visible.
However, in order to obtain a complete picture, also the relation
between T and p and the relative costs O (kW/$) , i . e. also the T-O
and p-O-Pareto-Fronts should be considered. Furthermore, the impact
of new technologies, e. g. the replacement of Si by SiC/GaN power
semiconductors on the system performance could be analyzed using
the Pareto-Front. The resulting shif of the performance limits then
directly shows the possibility of improving a selected concept and
the resulting costs can be immediately determined (cf. [30] , Fig. 2).
Such analysis so far only has been performed only for single-phase
systems [8] , and i s therefore seen as a focus of future academic
research in the feld of three-phase PWM rectifer systems and as a
key topic in power electronics in general .
ACKNOWLEDGMENT
The authors would like to thank Dr. Michael Hartmann for pro
viding fgures and data of the VI ENNA Rectifer and the ,- switch
rectifer from his Ph. D. thesis [53] and Dr. Johann Miniboeck for
providing data of the VR-73 VI ENNA Rectifer and the bidirectional
TCM ZVS dc-dc converter hardware demonstrator.
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nating controller multipliers, Part I - Basic theoretical considerations and
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factor mains interfaces of high power EV battery charging systems," in
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efciency and high power density," in Prc. IEEE Int. Power Electronics
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nung," Worldwide Patent WO 01/50 583 A I, 200 1 .
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conductivities , 4ddW/mK," in Prc. 4th Int. Con! on Integrted
Power Electronic Systems CIPS '06, Jun. 7-9, 2006, pp. 323-328.
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IECON ' lO, Nov. 7-1 1 , 201 0, pp. 391 -396.
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