ATC321 PTV Training Manual
ATC321 PTV Training Manual
ATC321 PTV Training Manual
Training Manual
Supplement
to
ATC32x DLP Training Manual
FOREWORD
The ATC321 training amanual is an supplement to the ATC32x DLP Training Manual
designed to provide the service technician with information key to the servicing of the
PTV chassis. This training manual is to be used in conjunction with the ATC32x
Training manaul, and additional information found in the ESI Service Data.
Page 4
Contents
Appendix A (Troubleshooting Section)
Dead Set Troubleshooting .................................................................... 28
Standby Power Supply Troubleshooting ............................................. 29
Run Power Supply Troubleshooting .................................................... 30
System Control Troubleshooting ......................................................... 31
Horizontal Out Troubleshooting ........................................................... 32
Vertical Out Troubleshooting ................................................................ 32
Key Waveforms ...................................................................................... 34
XRP Shutdown Troubleshooting .......................................................... 38
Back End Processor Troubleshooting Tips ......................................... 38
Convergence Generator Troubleshooting ........................................... 39
Convergence Power Amplifier Troubleshooting ................................. 39
Convergence Power Amplifier Shutdown Troubleshooting ............... 40
No Video Troubleshooting .................................................................... 40
Page 5
Cable
IF
SW OOB_Xp
Xp Card DM-3
AIR SCT
DTT7610 SIF NXT2003
CV QAM/VSB/ Xp LBI
OOB IF NOR
FLASH
FPA IR OOB IF
Clock
Gen
Xp1A LBI
NAND
FLASH
R RF IEC958 SPDIF
FAV
L DCT IF
Cable M3002 NTSC IF LBI Xp
V IF 1394 IN
S 1394
Xp2A TSB43DA42 Xp
CV SIF 1394 OUT
Xp2B
Wired Remote IR
AVIO SW
CVr
SW TL945 LBI Ethernet
CVt ENET
LAN91C113
656 Xp0
uPD64084 Video V1 LBI
GPIP FPGA IR/GL
Y C V2 EP1K30
V I2S
SW CV HV MSP4448
Record R SIF/TVB/SRS I2S CTL
Out L PSI
LVDS
16b Altera 1C12
R LRSub LRfix
ADC 16b Xp2B
Composite In L LA79500 AD9883 YPrPb Video
x2 V
L HDMI Filters
S
R
HDMI SiI9993 I2S H/V
+3.3 +2.5 +1.8 +1.5 +1.2 YPrPb
Y C PIPCV
CVr PWR Supply DDR EEProm
TA1270 CVt 64 MB
LR
Y Pr Pb V1
Pb V2
Component In Pr CXA2189Q
Y HV ScanSIG
x2 L DM3 PS
IR
R
L/R
L/R fix Audio
L/R var
TDA7448
Sub
R AVIO PS
ACIn H/V YPrPb
Defl. CRT PS CRTs
L
Fix/Var Out RGB
C TDA8922 Stby PS TA1316 AKB CRT SIG
S
Center Ch In
R SW
Sub Sub Sub B+
BEP
L
Amp
Raw B+ CONV SIG Conv
AC
Speaker CONV PS
Sub TA1317
L R S
FAN
Overview
The ATC321 chassis is modular with The cabinet is also a modular design
separate circuit board assemblies (CBA) with the “Box” (screen, frame, and mirror)
for various circuits. able to be separated from the lower
cabinet assembly that houses the PTV
The major CBA’s are:
kit. This allows easy access to the
• AC IN chassis for servicing. See service
positions for more information.
• Deflection
• Audio
AC In CBA
• A/V In
The AC in CBA provides the standby
• Convergence
power supplies +33V, -5V, +12V, +5V,
• DM3 and audio +/- 21V. Raw B+ is also
provided to the main chassis.
• Back End Processor
(BEP)
• CRT CBA’s (Red, Green,
and Blue)
Page 6
Deflection CBA Convergence CBA
The deflection CBA or main chassis The convergence CBA houses
contains the run supply, back end convergence processing and the
processor (BEP), horizontal and vertical convergence amplifiers. Horizontal and
circuits. The BEP and deflection CBA vertical sync signals and power come
are aligned together and therefore are from the deflection CBA. Alignment
married and can only be replaced pattern and data are on the convergence
together. The BEP is a module like the CBA for auto-convergence and service
DM2 but the deflection CBA is adjustments.
component level serviceable.
DM3 Module
Audio CBA What goes on in the DM3 is digital
The audio CBA contains audio processing of NTSC signals and AC3
processing, final amp and speaker audio processing. Main and PIP tuners,
output. The left and right audio signals DTV links, and Ethernet processing is
from the AV CBA are processed and also contained in the DM3. The NTSC
routed to the internal or external signals are digitally converted and up
speakers by the Audio CBA. Power for converted to 2.14H. Further processing
the Audio CBA is + / - 21Vdc from the takes the digital up-converted NTSC
standby power supply CBA. signal and passes it through a D/A
converter to an YPrPb output at 2.14H.
The YPrPb 2.14H signal is sent to the
A/V In CBA BEP for further processing. System
Audio and Video switching is done on control processing, user input, and
the A/V In CBA. Further video Ethernet communication is also done
processing (comb filtering and PIP) is by the DM3. Clock and data from the
also done on the A/V In CBA. The DVI DM3 communicates with the deflection,
input, switching, and processing is part A/V in, Audio, and convergence CBA’s.
of the A/V In CBA. Outputs are 2-2.14H This makes the DM3 the heart and
YPrPb, 1H YPrPb, Composite video, brains of the ATC321.
and audio. All NTSC signals are
processed and switched to the DM2 for
up-conversion. The 2-2.14H YPrPb CRT CBA
signals are switched and sent to the
As with all projections there are three
BEP for processing.
CRT drive CBA’s, one for each color.
Each CBA has a single Integrated Circuit
that is used for the kine drivers. A
current reference for AKB is DC coupled
from each IC driver back to the back
end processor. Grid Kick and Scan
Loss provide protection from shutdown/
startup burns.
Page 7
4 DP610
DP201 +33VS
RAW B+ PwrFail
146VDC DP611
1 33V Detect PwrFail
RP604 TP101/2/3
2 DP613
CP606 LP601 IP605
5VS
1 3
+5VS 5V Reg
3 7 14
+12VS
FP201
16 TP606
8 +15Vr
RP605 DP612
15 +12Vr
DP601
DP603 IP606
1 1 3 +5VS
5.1V 13 +5V Reg
DP602
DP614 *
12V CP609 +6VS
TP601 3
12 DP617
D
G DP615 6.8V
11 1 3 +5VR
TP602 S +21V_Aud
IP607
* 10
Audio Grd +5V Reg
RP601 4
9
0.27Ω DP604 -21V_Aud
DP616 On/Off SW +15Vr
+12VS TP607/608
V =R =I
4 1 V =R =I * = Protection Device
1
3 2 3 Frequency = 53KHz
IP601 2 Ref
Reg
IP602
Page 8
starts to fall, TP101 & 102 turn off which If the voltage at pin 3 of IP602 goes up
turns on TP103 generating the active lo (+12VS supply is increasing), the
power fail signal that is applied back to internal resistance of Ref Reg (IP602)
the system control. Two switched run goes down. This increases the current
supplies are also generated by the through the photo diode of IP601. When
standby supply. TP606 is turned on by the current through the photo diode
the +15VR generating a +12VR supply. increases the current in the photo
transistor increases and causes the
base voltage of TP602 to go up. The
A +5VR is provided by IP607. The increased base voltage on TP602
+5VR run regulator is turned on by the reduces the current sense (RP601) trip
On/Off switch transistors TP607 & 608. voltage which reduces the amount of
The transistors (TP607 & 608) are ‘On’ time for TP601. This reduced ‘On’
activated by the application of the +15VR time reduces the output power that is
run supply. Overvoltage protection in transferred to the secondary which in
the secondary is provided by the 6.8V turn reduces the output voltages of the
zener diode DP617. If the voltage rises secondary. The opposite occurs if the
above the 6.8V, the zener breaks over supply output voltage is decreasing.
and clamps the output voltage. The base bias voltage of TP602 is
reduced allowing TP601 to stay on
longer and pumping more power into
Regulation of the supply is accomplished the secondary which increase the output
by Opto-Coupler IP601 and Ref Reg voltages. DP601 and DP602 (zener)
IP602. The bias supply for the photo provides the gate bias voltage of TP601.
transistor of IP601 is developed by diode The 5.1V zener diode DP603 serves as
DP604 from pulses off pin 7 of LP601. a protective device in the event that
The +12VS is the supply that is TP601 is shorted and the current sense
monitored for regulation. The supply is resistor opens, the zener breaks over
regulated by varying the bias voltage on and shorts to ground to allow the line
the base of TP602. A voltage divider fuse FP201 to open.
network applies the reference voltage
to pin 3 of the reference regulator IP602.
Page 9
K101
3 1
NOTE: All components are "14XXX" series unless T101 12Vs
otherwise noted, I.E; R801 is actually R14801. RAW B+
≈+45Vr
RAW B+ 4 2
CR106
146VDC 146VDC 2 19
R103 R104 R138
Reg B+
16
R105 Osc/Drive D 4 CR107
R106
Osc Q102 Q101 18 124V 2H
+12Vs On/Off 134V 2.14H
Q151 CR113 G
S 13
U150 CR108
CR115 +15Vr
1 4 14
* +28Vr
2 3 CR114 12
Q103
C107 24V * CR109
R109 +22V
CR116 11 21
R113 5.1V CR140
15 Convergence
Q150 8 CBA
R112 -22V
CR102 22
CR104 CR142
Reg B+ SW
U101 +15Vr 2.14H=Hi
CR105 CR103 Reg B+ Q104 2H=Lo
4 1
16V R120
XRP Latch SMT 3 2 2%
On/Off
(from SysCon) 3
R118 R117
2% Q105
Ref
1 U106 3 3 U105 2 Reg 1
R119
+12Vr +24Vr
+12V Reg +24V Reg 2
2% V = R = I * = Protection Device
≈73KHz
+15Vr +28Vr
U103 V =R =I Frequency
Page 11
RED_DR 43
28 RED_DR
GREEN_DR 42
29 GREEN_DR
BLUE_DR 41
30 H_DRIVE BLUE_DR
26
34 H_DRIVE
IK 45
26 IK_IN
+9Vr 19
Def/DAC_VCC
36
DAC 2
FSW 50
20 FSW
DEINT_Y 3
5 Y1_IN
DEINT_PB 4
6 PB1_IN
DEINT_PR 5
7 PR1_IN
1 16
DEINT_H 15 HD1_IN
9 2
15
DEINT_V 14 VD1_IN
8 13
J12901
12 U12901
U12902
HD_Y 8
11 Y2_IN
HD_PB 9
12 PB2_IN
HD_PR 10
13 PR2_IN
HD_H 13
15 HD2_IN
HD_V 12
14 VD2_IN
FBP1 24
23 Clip FBP_IN
VP_OUT 27
33 VP_OUT
33
+9Vr R_OSD_IN
3 38
G_OSD_IN
37
B_OSD_IN
SCL 30
2 SCL
SDA 31
1 SDA
Page 12
Back End Processor (BEP)
Except for the de-interlacing, the switch line (pin 20) controls the correct
luminance processing is done in timing of OSD to video. There are two
U12901 back end processor BEP. fast switch inputs on the Backend
U12901 has two component video Processor; however, since there is only
inputs. YPrPb from the DM3 is on one fast switch line from the DM3, the
J12901 pins 5, 6, and 7. External 2H or two FSW inputs are tied together on the
2.14H YPrPb is on J12901 pins 11, 12, BEP board. When the OSD inputs to
and 13. The YPrPb signal undergoes the Backend Processor are above 0.7
the following processing within the BEP: volts, the SVM output signal is disabled.
After beam limiting, the OSD signal is
· Black Stretch mixed with the video RGB.
· Black Level Correction
· Dynamic Gamma Processing RGB Output Processing
· Controlled DC Restoration
· Sharpness Control The RGB signals from the OSD/Video
· Edge Replacement RGB matrix are applied to variable gain
· High Frequency White Peak stages, two of which are controlled by
Limiting the bus. The ATC321 controls the gain
· Sub Contrast of Red and Blue channels, leaving the
· UniColor (Ganged Contrast and Green channel at fixed gain. The gain
Color Level) of the amplifiers is adjusted to achieve
· Clamping the desired display color temperature.
· White Peak Limiting The gain of the Red and Blue are
· Output Gamma Processing modified to change color temperature
· Half Tone Processing from Normal to Warm or Cool. To set
the color temperature for Warm, the
Red gain is increased and the Blue
gain is reduced. To set the color
OSD RGB Processing temperature for Cool, the Red gain will
be reduced and the Blue gain will be
The OSD is processed and inserted by increased.
the DM2 for NTSC signals. Whenever
an external 2H or 2.14H signal source After the RGB signals are gain
(including DVI) is selected, the OSD is controlled, they are applied to a set of
no longer part of the video. The OSD clamps. These clamps are used to set
must be inserted to the external signal the output DC levels of the RGB signals.
as an RGB signal from the DM3. The The video signals have horizontal and
OSD RGB and fast switch signals are vertical blanking applied to them at the
applied to U12901 from the DM3 via output buffers and is output on the
J12901 pins 5, 6, 7, 8 and 9. The fast RGB pins of the IC.
Page 13
To R14310 and L14801
+9VR3 Pin circuit
+9VR +12V_SENSE
+9VR3 +9VR
DEF_BLANK
From Pin 9 XRP_LATCH Q901, Q902,
CR801 Q802
R804 Q903, Q701
of T14401 R833 +9VR R811 U801 XRP_ALIGN
C805
Q806 CR802
R832 R826 +9VR
R830
R806
Q805 R809 +9VR
R801 U14802
Deflection R914
R831 CR803 R834 Processor R836
R842 R841
10 17 Q902
Q803 EW_FB XRP
11
+9VR3 EW_FILTER
R909
R840
R804 R843
H_DF_OUT VCC
Q804 16 7 +9VR
HDF R825
C820 VD_REF
To 5 VREF
R829
Dynamic R502
R503
Focus
VDF V_DF_OUT +9VR
18
Part of J14808
BEP R504
VP_OUT from BEP V Timing V_IN
33 21 V_FB
H Timing FBP_IN 6 VRAMP
H_DRIVE 12
34 EHT_IN Q501
R501
3
To Q14304 4
Horiz Driver SDA
13 V_Drive
SCL
14
NOTE: All component designations R506
are 14XXX series, i.e.; R830 is R14830 , etc.
Deflection
Page 14
Deflection
The ATC321 deflection consists of two The low level vertical deflection
levels, Low Level Deflection and the processing is done in two parts. First
Output. Low level processing is done in the Back End Processor, that includes
part by the backend processor (U12901) a sync separator and countdown circuit,
and by U14802 deflection processor. provides the negative going vertical rate
The deflection processor U14802 pulse, VP_OUT. This pulse is also
generates the East West parabola, used to synchronize the digital
vertical ramp, and dynamic focus convergence.
signals. The backend processor
U12901 generates horizontal PLL, H / V
countdown, and H / V drive signals. Second, U14802 receives the VP_OUT
H_DRIVE from the Back End Processor pulse at pin 21 and develops the vertical
is used to drive Q14304 and the deflection ramp at pin 6. The IC also
Horizontal output stage. provides a dc reference at pin 5,
VD_REF, which tracks at twice the ramp
center value. These two signals
East- West pincushion correction and respectively become V_RAMP and
width adjustment are provided by a V_REF, and are coupled differentially
diode modulator, driven by a linear to the vertical output IC, which drives
pincushion driver (Q802). U14802 IC the yoke.
generates the parabola used to develop
the correction waveform. This allows
bus control of the horizontal width and U14802 has an internal error amplifier
pin amplitude as well as horizontal trap with input at V_FB, pin 6 and output at
correction and corner correction. In V_DRIVE, pin 4, but local feedback is
addition, a voltage developed across used to develop the reference ramp at
the high voltage return resistor (R14310) pin 6.
is summed at the pin driver (U14801) to
compensate for the decrease in width
that occurs as the high voltage Dynamic focus signals (HDF and VDF)
increases. come form U14802. Blanking signal
from pin 9 of T14401 is buffered and
added to the horizontal dynamic focus
The XRP circuit in the ATC321 is similar signal from pin 16 of U14802. The two
to that of ATC311. A peak detector sets signals are provided to the dynamic
a self-biasing latch, which turns off the focus circuit via Q14804. Vertical
Main (Horizontal B+) power supply. The dynamic focus signal comes from pin
latch is reset by IIC communication 18 of U14802.
only. The +12V detect is part of the
XRP circuit called +12V_SENSE. A
loss of the +12Vr turns on Q14701
tripping the XRP latch.
Page 15
T401
REG B+
12 HV
(124V 2H)
+26VR (134V 2.14H)
FOCUS
CR301 Q301
BEAM_SENSE
Part of J14808 R313 Q401 CR402 C402
R303 4
BEP CR701
C301 T300
VP_OUT L301 8 +215VR
11
33
Q302 R312 C703
H_DRIVE R302 R325
34 CR702
C304 9
R301 C302
C308 FBP
R308 R310 R311 L801 C801 R401 CR401 FBP1
Q303 R304
Q304 5 FILAMENT
CR800
R315 R309
R307 C414 and C413
R305 R306
C404
C305
R407
L406
C407 HYOKE_Lo
Horizontal Out
Horizontal Out
The horizontal deflection system has for the horizontal driver and back end
two main functions in the ATC321 processor. Beam sense, at the base of
chassis. First, it supplies the current for Q14303, controls drive by reducing the
the horizontal yoke. Second, it provides drive signal at the collector of Q14304.
signals and power supplies needed for As beam current increases, voltage is
operation of the chassis and picture developed at pin 4 of T14401 and
tube. supplied to the base of Q14303. Q14303
conducts, reducing the drive signal to
The horizontal yoke drive is provided by
Q14301 and Q14302 reducing
Q14401, CR14402, (HOT and damper
horizontal drive.
diode combination), T14401 (IHVT),
C14402 retrace capacitor, C14801 trace Voltages are derived from secondary
capacitor, and the horizontal yoke coils. windings on T14401. The video amplifier
Drive for Q14401 comes from the back and the CRTs use these supplies.
end processor through J14808-34, CR14701 and C14703 provide a +215V
Q14304, Q14301, and Q14302 to source for the CRT’s and CR14702
T14300 primary. The secondary of provides the fly back pulse (FBP) for
T14300 is inductively coupled by L14301 filament and timing signals. High
to Q14401-B. The frequency at which Voltage and focus are also developed
the horizontal operates is determined by T14401.
by the incoming signal and the BEP.
Pin correction signal from Q14802 is
The ATC311 is designed to operate at
coupled to the low side of the horizontal
2H and 2.14H only.
yoke by L14801.
Beam sense comes from pin 4 of
T14401 and is used as a control signal
Page 16
L502 RT501
+28VR1
C503 Q503 Q502 R517
CR501 CR504 SCAN_V
C502 C501
R518
CR502 R521
2 3 CR503
6 R519 R520
≈+45VR
NOTE: All component designations
FLYBACK
are 14XXX series, i.e.; R830 is R14830 , etc.
GEN. R516
1 R522 L501
5
VYOKE_Hi
C508
7 4 U501 CR505
68V
RN501 R507
3 6 +15VR
R512 C505
1 2 4 8 7 5
R509 R510
Vertical Out
Vertical Out
The vertical output of the ATC321 is R1452 and shunt regulator Q14503.
different from other vertical circuits in Shunt regulation, performed by Q14503
the past. The vertical circuit has no and the associated resistors, drops the
negative supply but uses three positive Reg B+ voltage to +48 volts to power
power supplies and a shunt regulator the output stage of U14501 during
instead. The rest is similar with two vertical retrace. The +15Vr is used as
signals from the deflection processor half supply with R14511 and R14508
differentially coupled to U14501 via a providing current sense. C14511
resistor network (RN14501). These provides filtering for the half supply.
two signals are V_RAMP and V_REF.
The vertical output IC (U14501) then
drives the yokes. The frequency at A sample of the vertical output signal is
which vertical operates is 60Hz. used for Scan_V. Q14502 clamps and
buffers the output signal. The signal is
used for AKB and Scan Loss. If the
Power for U14501 comes form +28Vr, Scan_V pulse is missing or distorted
+45Vr boost supply, and +15Vr half the video will be blanked by the Scan
supply. The boost supply is derived Loss circuit and AKB will reduce the
from Reg B+ through dropping resistor drive. This prevents burning of the
CRT’s in the event vertical scan is lost.
Page 17
Digital Convergence Gen & Power Amp Module
Conv Factory Data
18 Clk Data 45 5 EEPROM
Micro
16 Data U502 Clk 44 6 U509
49 50 48
12 14 7 6
Conv
J500 U517 Sensor (8)
From Input
SysCon J601
1 9 7/8
Chipper Clk Data 49 2 Green
1 GH Pwr Amp
Check GH Out 48 U503 Horz
3 Q306/Q307
3 GH Conv Yoke
57
5 Stability
7
79 U507 Feedback
2.14H 6
EEPROM 5
7 Green
63 GV Pwr Amp
U511 GV Out U504 Vert
64 GV Conv Q316/Q317
6 Yoke
DigiCon
2
U501 1
2H U507 Stability
2 Clk Feedback
EEPROM 3
1 Data 58
U512
66
65 Red & Blue Pwr Amps
51 same as Green Pwr Amps
8 52
+12VS 60
From 11
61 NOTE: All components are
Chassis Scan_V 28
46
10 "19XXX" series unless other
FBP 27 45 wise noted, I.E; Q306 is
J500 actually Q19306.
Page 18
There are separate customer The ATC311 utilizes a new integrated
convergence adjustments along with Digital Convergence Generator & Power
much more detailed serviceman Amp Module for convergence correction
adjustments. The use of Chipper Check and auto convergence. Located on the
can speed up the alignment process in module are five EEPROMS,
the event of major component failure. Convergence Micro and the Digicon IC,
U501. Unlike earlier instruments, the
power amplifiers are also located on the
There has been little change in the module. U502 is the convergence micro.
digital convergence when compared to The purpose of U502 is calculating
the earlier projection sets with auto convergence correction based on
convergence. The ATC311 uses the information from the optical sensors.
same digital convergence processing The convergence micro controls the
and sensor arrangement as the Digicon IC and the EEPROMs. U501
CTC211. The ATC321 has only one (Digicon) generates the convergence
scan mode, 2.14H. correction signals that are applied to
the convergence amplifiers. U510, 511,
512, and U513 are mode EEPROMs
The sensor position and access is the and contain data that is used for
same as in the ATC311 and the process alignment information for the different
remains the same. These sensors can scan modes. The EEPROM U509 is
only be seen from the back side of the the factory preset EEPROM. Two buffer
screen. A cross hatch test pattern is ICs (U503 and 504) buffer the output
generated by the digital convergence from the Digicon IC to the output
micro to aid in converging the set. amplifiers. A stability feedback signal
from the power amplifiers is applied to
a comparator (U507) op amp along with
Digital Convergence Generator & a reference from the DigiCon IC. This
Power Amp Module is to prevent any drift of the convergence
signal over a period of time due to
component aging.
Page 19
Horizontal and Vertical Convergence Power Amplifiers
The convergence power amplifier (see Q370. The pre-driver transistors Q304
Green Horz Output Amp) drives the and Q305 provides the drive for the
convergence yokes via the drive NPN and PNP power Darlington
waveform (GH-Conv) at pin 2 of Q370 transistors (Q306 & Q307). These
from the DigiCon IC. The power power transistors operate in class B
amplifier operates between +/-20V mode and drive the high side of the
supplies. The voltage across the yoke convergence yoke. Feedback from the
current sense resistors consisting of high side of the yoke is coupled to pin 5
three 1.65 ohm resistors (R442, 441 & of Q370 and sets phase margin and
301) is applied to the stability loop circuit damping. A sample of the voltage across
of U507-6. This voltage also serves as the sense resistors is also sent to
a feedback voltage to pin 5 of Q370. comparator (U507-6). These levels are
Q370 is provided a fixed current (at pins compared with standardized outputs
1 & 4) by a current source (Q301) that is from the DigiCon IC U501. The DC
biased on or off by a mute switching balance and AC gain of each of the 6
voltage (1.8V-On or 0-Off) that is output channels is digitally adjusted to correct
from the DigiCon IC U501, pin 77. for any drift. The vertical amplifiers (see
Green Vert Output Amp) are almost
identical but have a transistor (Q313)
All the convergence power amplifiers connected as a base to emitter voltage
are turned off during power up and multiplier located between the bases of
convergence data loading from the the power Darlingtons. Also, feedback
EEPROM. The transistor Q301, a resistors R434 and R435 are included
current source transistor is also an in series with the Darlington emitters.
emitter follower that drives the negative These two changes reduce the class B
pre-driver transistor (Q305). The crossover transients and eliminates a
positive rail pre-driver (Q304) is driven horizontal streak from the raster.
by the left side transistor (pins 1, 6) of
Page 20
NOTE: All components are "19XXX" +20V +20V Q306 +20V
series unless otherwise noted, I.E; To
R303 U507-6
R801 is actually R19801.
R383 (stability
loop)
Q370 +20V Q304
6 3 C391 C301 J19311
2 5
GH-Conv
(from DigiCon) Q305
1 4 R408 R317
R442
Mute to R300 R447 1.65 Ω
other Conv 1W-1%
Amps
R366
C300 R304 R306 Q307 R441
R302 Q301
- 20V 1.65 Ω
- 20V 1W-1%
R319
1.65 Ω
Ampmute Q302 R301
- 20V 1W-1%
from
U501-77 R305 C328
- 20V
0 = Mute
1.8V = Unmute Green Horizontal Convergence Output Amp
Amp R385
Mute from R450 R308 1.65 Ω
Q302-C 1W-1%
Q311 Q315
- 20V
R379
1.65 Ω
C331 1W-1% 1W-1%
- 20V R340 R369
R309
- 20V - 20V 1.65 Ω
Green Vertical Convergence Output Amp
Page 21
+20V
Source
NOTE: All components to Conv
are "19XXX" series Q700 Pwr Amps
unless otherwise noted,
I.E; Q700 is actually C709 R721 R706
R704
Q19700. Q703
R719
R715
200 C701 CR701
Q702 12V
R722 Q701
6 3
J700 5K R702 2
1 5 +3.3V
+22V
R701 R720 Reg
22V .220 Ω CR703 1 4
3 3.6V +6.8V
3W R718 Reg
fromMain C704
(Run) Pwr
Supply C710
R701
CR702 -12V
R707 27V C707 Reg
R709 6 3 Q705
200 2 5 R711 20V
R714 Source
to Conv
R701 1 4 Pwr Amps
5K R708 C705 Q704
R710 C706
.220 Ω 3W CR704 3.6V
Convergence Power Amp Shutdown
Page 22
It’s important to note that the R/C time –22V supply through R710, the base
constant of R702 and C704 provides voltage at pin 5 of Q705 goes Hi enough
the 10 to 15mS delay. C704 holds pin for the transistor to turn on. With Q705
2 of Q701 Hi for 15mS before letting the on, the base of Q702 (latch circuit) is
transistor turn on. When the voltage pulled Lo enough for it to turn on. With
falls to .7V below the emitter (pin 1), the Q702 on, Q703 turns on and again
transistor turns on applying a Hi to the places a Hi on the base of Q700
base of Q703 turning it on. When Q703 removing the positive source voltage.
turns on Q702 turns on and they latch. With the +20V at the cathode of CR702
With Q703 on, a Hi is placed on the missing, Q704 is biased off removing
base of Q700 by the emitter voltage of the –20V source. C705 and R711
Q703 turning Q700 off and removing provides the 10 to 15mS delay in the
the +20V source from the power negative circuit.
amplifiers. With the +20V source gone,
the base of Q704 is allowed to go more
negative than the emitter thus turning it The +20V source is also applied to a
off. With Q704 off, the –20V source is +3.3V regulator located on the
removed from the convergence power convergence circuit board. This +3.3V
amplifiers. supply is for the DigiCon IC and the
convergence microcomputer. If the
+20V source is lost, the +3.3V is also
The negative side of the circuit (Q704 lost and the convergence
and Q705) operates in the same manner microcomputer goes down. When the
as the positive side except that the system control micro tries to
voltages are below ground potential. communicate with the convergence
When excess current is drawn from the micro it does not get a reply and system
control micro shuts the instrument down.
Page 23
+12VrF +12Vr1
NOTE: All components are "19XXX" series CR105 L101
unless otherwise noted, I.E; Q104 is actually Q19104 .
Q107
R116
Grid Bias 16V C114
Compensation Vert Pulse +12VrF
CR101 CR102 R119
Network C104 R123
Q109/Q130 FBP
R138
Q131/Q132 C101 R107 R122 R125
100V +215Vr +12VrF
CR114 Q111
R144 R137
+24Vr1 C121 R124
R110 R112
R142
R111 Q104 R141
CR108 C105 Q110
R135 Q105
C120
CR103 R115 Vert
Q103 R121 R120 Pulse
CR106
R140
350V C110 +12VrF
C102 R126
+24Vr1 CR120
CR121
R114 CR130 R1127 Video Mute
To G1 (CRT CBA)
8.2V
Page 24
R107 and R116 placing a low on the also coupled to each CRT circuit board
base of Q107 turning it on. With the via R144.
loss of horizontal, the run supply is lost
Vertical is monitored for scan loss by
and the voltage stored in capacitors
Q110 and Q111. A vertical pulse is
C104 and C114 provides the B+ for
capacitively (C120) coupled to the base
Q107. With Q107 turned on Q104 and
of Q110. CR120, CR121 and the +12Vr
Q105 are turned on. The grid kick
provides bias to the base of Q110
voltage (approx. -180VDC) is generated
causing it to act as a vertical rate
by capacitors C102 and C110 charging
oscillator. With Q110 oscillating, the
through diode CR103 and CR114 to the
base voltage of Q111 is kept low enough
+215V supply. When Q105 turns on,
to keep it off. When vertical is lost,
the positive side of the grid kick
capacitor C121 charges through R122
capacitors are grounded applying a
and turns on Q111. When Q111 turns
negative 180VDC directly to the G1
on, the base of Q107 is pulled low
grid. Reverse biasing the G1 grid with
turning it on. This applies a high to
–180VDC ensures that the cathode
Q104, Q105 and also to the CRT CBA’s
current is zero. At the same time Q104
(video mute). As with horizontal loss,
is turned on grounding the junction of
Q105 applies the grid kick voltage (-
R110 and R111 and turning off the
180VDC) to grid G1 and Q104 shuts of
+10V grid bias by removing B+ from the
the grid bias transistor Q103.
emitter of Q103. A high (video mute) is
Page 25
From IHVT
NOTE: All components are "14XXX"
T401-9 R903 R904
series unless otherwise noted, I.E;
Q901 is actually Q14901 .
CR901 XRP Latch
(to Run
CR908-10V Supply)
XRP Sense
Q903
U802 +9VR R908 R900
Deflection 2% R901 R913
Processor J901
1%
R914 Q901 C905 1
Fault
Sense 17 2 Q904 XRP
R910
Q905 Q902 R902 XRP Align
1% Test (DC Bias)
R909 R906
4 +9VR2
13 14 +12VR2 Q906
C714 R915
+12VR2
+12V Sense
Vert R714 (from CRT
Drive Q701 R916
SDA SCL CBA)
R715
Beam 'I'
from IHVT
XRP Shutdown Block Diagram T401-4
The primary function of the XRP circuit voltage. When the voltage on the
is to turn off the run power supply and cathode of CR908 (Q904-C) rises above
shutdown the deflection processor IC, 10V, zener CR908 breaks over and
U802. The XRP shutdown circuit has transistor Q901 turns on. With Q901
three (3) inputs. These are the Over- turned on, the latch (Q902 & Q903)
Voltage, +12V Sense (CRT CBA) and turns on and outputs a low (XRP Latch)
the excessive beam current. Detecting that turns off the run power supply (see
over-voltage is performed by CR901 run power supply). When Q902 turns
and CR908. A horizontal pulse from the on, the base of Q905 is pulled high
IHVT T401 pin 9 is rectified by CR901. enough to turn it on. With Q905 on, a
A precision reference voltage is low is applied to pin 17 of U802,
generated by Q904 and the XRP Align instructing it to turn off vertical and send
bias voltage. This XRP Align voltage is a message to the system control (SDA)
stored digitally in the EEPROM and is to shutdown the instrument.
converted (by a DAC) to an analog
Page 26
The +12V Sense monitors for problems Latch signal to the run supply. Also,
in the video drive circuit on the CRT Q905 turns on shutting down U802.
CBA’s to prevent damage to the CRT’s.
Beam current is monitored by Q906.
In the event the video drive IC shorts or
The emitter of Q906 is connected to pin
the 215V cathode voltage is lost the
4 of the IHVT, T401. When excessive
XRP circuit is activated, shutting down
beam current occurs the emitter voltage
the instrument. The CRT CBA +12V
of Q906 is pulled below its base voltage
Sense is applied to the base of Q701.
which turns it on. With Q906 on, a low
Q701 is held off as long as the +12V is
is applied to the base of Q901 turning it
present. If the +12V is lost on the CRT
on. With Q901 turned on the latch
circuit board, the base of Q701 goes
Q902/903 turns on generating the XRP
low enough to turn on Q701. When
Latch. Q905 also turns on shutting off
Q701 is on, the latch circuit (Q902/903)
IC U802.
turns on again and applies the XRP
Page 27
Appendix A
Troubleshooting Section
5. If LED turns on and then off, disconnect J11501 (Audio CBA) and press
power button again. If power LED comes on and stays on suspect Audio CBA.
If LED still flashes or does not light go to step 7.
6. Disconnect BP602 (AV IN CBA) and press power button again. If power LED
comes on and stays on suspect AV IN CBA. If LED still flashes or does not
light go to next step.
8. Disconnect J14801 (Deflection CBA) and press power button again. If power
LED comes on and stays on suspect Deflection CBA. If LED still flashes or
does not light suspect DM3 module.
Page 28
Standby Power Supply Troubleshooting
1. With AC power supplied, check for raw B+ at connector BP204-2. If raw B+
is ok, go to step 4. If not ok, check FP201, DP201, CP208 and 209.
2. If fuse FP201 is open, remove AC power, unplug J14401 and check for short
between pins 1 and 2 on the deflection CBA side. If shorted troubleshoot the
run supply and deflection circuits. If not shorted, go to step 3.
3. Remove AC power and check TP601 for gate to drain short and drain to
source short. If shorted replace all active components on the primary side of
LP601 and RP601. If not shorted, go to step 4.
4. Unsolder drain of TP601, if fuse was open replace AC fuse and apply AC
power.
5. Check for +12Vdc on the gate of TP601. If missing, suspect RP604, 605, 602,
DP601, 602, TP602, and 601. If +12Vdc present, go to step 6.
6. Remove AC power and check for proper resistance (see table on pg. 30) on
each output diode DP620, 623, 626, 630, 637, and 638. If not correct check
associated circuit with each incorrect resistance. If resistances are ok, go to
step 7.
7. Solder drain of TP601 back in, short pins 3 and 4 of IP601, and apply AC
power. If supply starts to oscillate, check IP601, 602, and precision resistor
network in feed back circuit. If not check components in the source circuit of
TP601.
Page 29
Standby Power Supply Resistance Table
DP610 Infinity
DP613 5K
DP612 85 ohms
DP614 115 ohms
DP615 2K
DP616 2K
NOTE: If relay clicks and power LED comes on then the standby power supply and
system control are functioning.
3. Using the resistance table, check each output diode. If resistances are
correct go to step 4. If not correct check associated circuit of improper
resistance reading.
4. With Q14150 still shorted (C-E), solder the drain of Q14101 back in and short
pins 3 and 4 of U14101 to bypass regulation control. This makes the supply
operate at reduced voltage. Apply AC power, if supply starts to oscillate,
check feedback circuit Q14104, U14103, U14101, and precision resistors. If
no oscillation, go to step 5.
Page 30
5. Remove AC power and check components off of pin 11 of T14101 and off of
pins 3 and 4 of U14101. Check components in the source circuit of Q14101.
Resistance Table
CR14109 55K
CR14108 9K
CR14107 28K
CR14106 Infinity
CR14140 5K
CR14142 5K
Dead set, isolate down to chassis or DM3 module. Power LED blinks.
1. Apply AC power and check J13604 and J13605 for proper voltages all pins.
Voltages not correct troubleshoot AC in CBA. Voltages correct go to step 2.
2. Check J13604-1 for 5Vdc. If missing or low power supply is indicating power
failure. Troubleshoot AC in CBA. If 5Vdc ok, go to step 3.
Page 31
Horizontal Out Troubleshooting
Setup:
· Unsolder Q14401-C
· Disconnect all three CRT sockets
· Force on Run supply by shorting C-E on Q14150
· Force on 9Vr for BEP by shorting C-E on Q14111 and apply AC power.
Horizontal Drive should be present at pin 34 of J14808 if not troubleshoot
BEP.
1. Check for drive signal at Q14304-C. If missing check +26Vr, Q14304, and
Q14303. If ok go to step 2.
2. Check for horizontal drive at Q301-E. If missing check base circuit of Q14302
and Q14301, 14302, and C14304. If ok go to step 3.
3. Check for signal at the base of Q14401. If missing suspect Q14401, T14300,
and L14301. If present, remove AC power and reconnect Q14401-C.
4. Unplug J14401, horizontal yoke.
5. Apply AC power and check for signal (490V P-P) at the collector of Q14401.
If incorrect, suspect T14401 or it’s secondary circuits. If correct suspect yokes
or yoke return circuit.
Troubleshooting Tips
· If there is no vertical pulse from U12901-27, confirm fly-back pulse is present
at U12901-24. It must be present for the vertical countdown to function.
· If the vertical power stage U14501 has failed, CR14501 has likely failed also,
and should be replaced. Failure to replace it will result in the boost voltage
being equal to the 28VR1 supply voltage. The retrace will be too slow, and
SCAN_V will not be proper. AKB blanks the picture if this pulse is not proper.
Page 32
3. Apply AC power and turn on set.
4. Check Source voltages +28Vr, +15Vr, and +45Vr. If sources are missing
troubleshoot source supplies. If ok, go to step 5
5. Check U14501 for proper voltages at pins 1, 2, 3, 5, 6, and 7. See chart below.
If incorrect, suspect U14501, CR14501, RN14501, and C14503. If correct,
go to step 6.
6. Check for waveform at pin 5 of U14501. If correct suspect open yoke. If not
correct suspect R14509, 14510, and feed back components to RN14501.
Page 33
Vertical Key Waveforms
Page 34
3. Half Supply Filter
C14511 AC Coupling
500mV/div
Page 35
5. SCAN_V R14517
and R14518 junction
2V/div
6. Supply Ripple
U14501-2
Page 36
7. Boost Supply
ripple at U14501-3
Page 37
XRP Shutdown Troubleshooting
1. Remove CRT CBA’s. Apply AC power and turn set on. If set starts suspect
+12V Sense and/or excessive beam current shutdown.
2. If set doesn’t start with CRT sockets unplugged, remove R14914 (XRP
bypass). Monitor high voltage and turn set on.
If there is video at the input, but no RGB output, check that the FSW0 line, pin
20 of J12901 connector, FSW0 is low. If it is high, the video will be blanked.
If there is video at the input, but no RGB output, check that the BLK_OUT line,
pin 25 of the J12901 connector is low. If it is high, video will be blanked.
Troubleshooting
No Video any mode
2. Select a known good channel and check for proper signals on J12901-5,
6, 7, 8, and 9. If missing, troubleshoot DM2 and A/V switching CBA. If
correct, go to next step.
Page 38
Convergence Generator Troubleshooting
1. Check the operation of the Convergence Power Amps and the Convergence
Power Amp Shutdown circuits using the appropriate troubleshooting procedure.
If the circuits check OK go to next step.
2. Check clock and data at J19500 pins 12 & 14. If OK go to next step. If not
OK suspect loss of clock and data between system control and convergence
CBA.
1. Remove AC power and unplug convergence yokes. Apply AC power and turn
instrument on. Check for the +/-20VDC supplies at collectors of output
transistors, IE; Q19306 and Q19307.
2. Check emitter junction of power output devices for 0VDC. If other than 0VDC,
suspect power amplifier circuit.
NOTE: Pre-drivers and output devices may be swapped with like components of
other power amp circuits to verify defective devices.
Page 39
Convergence Power Amplifier Shutdown Troubleshooting
No Video Troubleshooting
6. Using a known good NTSC RF source and splitter, connect source to both
antenna inputs. Check for video on antenna A and B, if no video on both or
Page 40
just one antenna input suspect DM3. If video is present with both antenna A
and B go to next step.
7. Connect a NTSC 1H video signal to aux inputs. Cycle through each of the
inputs. No video or video on some inputs, suspect AV In CBA.
8. Using a video monitor connected to the video output, tune to an active station.
Video displayed on monitor suspect A/V In CBA. No video displayed suspect
DM3 module.
Page 41
TATC321