Intelligent Sensor
Intelligent Sensor
Intelligent Sensor
b+ Prof. Dr.-Ing. Jrg Bttcher Engineering Consultants Haslacher Str. 93 D-94469 Deggendorf phone +49 991 340 897 fax +49 991 340 447 email [email protected] or [email protected]
The common way of connecting analog sensors to P-NET (or to other fieldbus systems) is to take a coupling box with a P-NET port on one side and various analog inputs on the other. Typically for such modules in the P-NET world is the availability of additional process functions allowing the implementation of local process algorithms. Because of decreasing costs for coupling hardware like microcontrollers there is a trend towards so called intelligent sensors with on-board P-NET coupler. Although smart sensor seems to be the better name we should speak of an intelligent sensor because smart usually stands for devices with so called HART protocol being not a real fieldbus but a 4...20 mA interface with low speed binary signals in superposition.
1. Intelligent Sensors: Structures and Requirements (Figures 1-3) Fig. 1 shows the basic structure of an intelligent sensor. Analog Signal Conditioning in this context means circuits like amplifiers, filters etc. After an Analog Digital Conversion (ADC) the process value is stored inside the memory of a controller (typically micro controller) where also some digital signal conditioning algorithms may run. Via a bus coupling device the value or a value being calculated can be read out from the bus.
Whereas conventional sensors only support data traffic in one direction - from the sensor to the host or to the coupling fieldbus box - intelligent sensors allow data to be send in both direction. Not only pure process data is sent but also derived data, status information and various parameters (Fig. 2). Looking on typical bus structures within the area of process industry leads to the requirements shown in Fig. 3. One can recognize that P-NET completely fulfills those requirements. In accordance to Fig. 3 P-NET has the following characteristics: access time: 2.8 ms about 300 analog transfers per s can be handled length of data package: 1...63 bytes within one frame, more with LONG commands up to 125 nodes within single P-NET segment, more with multi-segment structure
Fig. 6 is showing three possible structures of combining the controller and the bus coupler. In the P-NET world of today the standardized method is to take a 8 bit micro controller with integrated UART. Whereas the controller then calculates all procedures of layer 2 and 7 of the P-NET protocol - the main layers for slave implementations - an external driver is used for implementing layer 1. Another method can be to take a micro controller with external P-
NET protocol chip and driver. Or - for very simple sensors - one take a special programmable fieldbus chip (IX-1) as single chip solution. 3. Cost-effective Implementation of P-NET In this chapter the above mentiond three methods of implementing P-NET into a sensor will be described. When using the first method - called software protocol - the UART of the micro controller should be configured in a way that it will produce an interrupt on signal 1 of the 10th bit of the frame because this is the address/data bit signalling that the first 11 bit group of the master request frame is coming in (Fig. 7). Then the complete rest of the frame will be read in within the Interrupt Service Routine (ISR) followed by the building up of the response frame. Of course when the first 11 bit group representing the slave node adress is not identical to the sensors address the ISR can be finished very fast. The timing requirements being a little bit critical because of the need for immediate response are listed in Fig. 8. When using the P-NET Chip (PNC) like shown in Fig. 9 the data handling can be controlled by interrupt leading to a lower controller load for managing the fieldbus traffic (Fig. 10). From P-NET side some Softwire Numbers are predefined (Fig. 11). Others can be defined and handled within the host CPU. Taking the IX-1 (designed by DELTA t, produced by SGS-Thomson) means that the P-NET protocol has to be loaded into a serial (EE)PROM from which it can be read in into the IX-1 internal program memory after reset (Fig. 12). Of course an additional RS-485 driver must be used. The register model in Fig. 13 shows that the IX-1 has a so called Harvard architecture with programm and data memory physically decoupled. In Fig. 14 the principal coupling of the application - being ADC and sensor device with analog hardware - is shown. Of course when developping intelligent P-NET sensors the rules for designing the channels and registers must be followed too. The minimum solution being in accordance to the Standardized General Purpose Channel Types (published by the International P-NET User Organization) is defined in Fig. 15. In many cases it is possible to add some more process functions like PID or Fuzzy Control etc. without any new hardware. Then additional channels must be defined.
g og in al al on An gn diti Si on C
Process
Sensor Device
s plin Bu ou C
C on
ADC
tro lle r
Fieldbus
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Intelligent Sensors
Communication Data From Sensor: Process Data (e.g. Pressure, Temperature, Humidity, ...) Derived Data (e.g. Average, Integral: Flow from Speed etc., Output of PID Algorithm, ...) Status (e.g. Fault Messages, Self Monitoring, etc.) To Sensor: Parameter for Digital Signal Conditioning (Linearization, Compensation of Temperature, Manufacturing Jittering, ...) Parameter for the Calculation of Derived Process Data Bus specific Parameters (e.g. Node Address, ...)
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Intelligent Sensors
Intelligent Sensors
or
If Slave Adress <> Own Address RETI Read in Master Address Read in Control Read in Info Length and Info Field Read in and proof Checksum
Case LOAD/ LONG LOAD: : - if need be call service routine (e.g. for transformation internal data format into P-NET data type) - send out response frame - RETI others : - if TAS: make TAS operation - send out response frame - put adress of service routine on stack and RETI - call service routine (e.g. for transformation P-NET data type into internal format) - RET
Master Request
Slave Response
RS-232-Interface
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- P-NET Chip (PNC) receives Request Frame from Master and built up Slave_Request_Packet - Slave_Request_Packet is put into Slave_Request_FIFO (Depth is 4 Bytes) - Host CPU reads out Slave_Request_FIFO whenever it is full and the PNC has generated Interrupt ("FIFO full") - After receiving the complete Packet the Host CPU has to built up Slave_Response_Packet - Host CPU sends Slave_Response_Packet to PNCs Slave_Response_FIFO; controlled by interrupt ("FIFO empty") - PNC sends out Response Frame
To P-NET SWNo 01 02 03 04 05 06 07 Register ModePort1 ModePort2 DigIO Port_C Data DigIO Port_C Data_Direction Handshake Port RTC EEPROM
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B) Intelligent P-NET Coupling Devices for analog Sensors E.g. from PROCES-DATA, ULTRAKUST, IPH Marine Automation, Tilse, ...
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