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Nte 4013

The document describes the NTE4013B and NTE4013BT integrated circuits which are dual D-type flip-flops constructed using MOS transistors. Each flip-flop has independent data, set, reset, and clock inputs and complementary outputs. These devices can be used as shift register elements or as type T flip-flops for counters and toggling applications. The document provides specifications such as voltage ratings, timing characteristics, and pinout diagrams for the two package types.

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0% found this document useful (0 votes)
127 views4 pages

Nte 4013

The document describes the NTE4013B and NTE4013BT integrated circuits which are dual D-type flip-flops constructed using MOS transistors. Each flip-flop has independent data, set, reset, and clock inputs and complementary outputs. These devices can be used as shift register elements or as type T flip-flops for counters and toggling applications. The document provides specifications such as voltage ratings, timing characteristics, and pinout diagrams for the two package types.

Uploaded by

Codinasound Ca
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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NTE4013B & NTE4013BT Integrated Circuit CMOS, Dual DType FlipFlop

Description: The NTE4013B and NTE4013BT dual Dtype flipflops are constructed with MOS Pchannel and Nchannel enhancement mode devices in a single monolithic structure. Each flipflop has independent Data (D), Direct Set (S), Direct Reset (R), and Clock (C) inputs and complementary outputs (Q and Q). These devices may be used as shift register elements or as type T flipflops for counter and toggle applications. Features: D Supply Voltage Range: 3V to 15V D High Noise Immunity: 0.45VDD Typ D Diode Protection on All Inputs D Capable of Driving Two LowPower TTL Loads of One LowPower Schottky TTL Load Over the Rated Temperature Range D Available in Two Package Types: NTE4013B (14Lead DIP) NTE4013BT (SOIC14 Surface Mount) Absolute Maximum Ratings: (VSS = 0V, Note 1 unless otherwise specified) DC Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 to +18V Input or Output Voltage (DC or Transient), Vin, Vout . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 to VDD+0.5V Input or Output Current (DC or Transient), Per Pin, Iin, Iout . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA Power Dissipation, PD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500mW Derate Above 65C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7mW/C Operating Ambient Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 to +125C Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 to +150C Lead Temperature (During Soldering, 8sec), TL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +260C Note 1. Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed, they are meant to imply that the device should be operated at these limits. The tables of Recommended Operating Conditions and Electrical Characteristics provide conditions for actual device operation. Recommended Operating Conditions: (VSS = 0V unless otherwise specified) DC Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +3VDC to +15VDC Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0VDC to VDD Operating Ambient Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 to +85C

Electrical Characteristics: (VSS = 0V, TA = +25C unless otherwise specified)


Parameter Output Voltage, 0 Level Symbol VOL VDD 5 10 15 Output Voltage, 1 Level VOH 5 10 15 Input Voltage, 0 Level VIL 5 10 15 Input Voltage, 1 Level VIH 5 10 15 Output Drive Current, Source IOH 5 10 15 Output Drive Current, Sink IOL 5 10 15 Input Current Quiescent Current (Per Package) Iin IDD 15 15 5 10 15 VIN = 0V VIN = 15V VIN = VDD or VSS Note 2 Note 2 |IO| < 1.0A VO = 4.5V or 0.5V VO = 9V or 1V VO = 13.5V or 1.5V |IO| < 1.0A VO = 0.5V or 4.5V VO = 1V or 9V VO = 1.5V or 13.5V VOH = 4.6V VOH = 9.5V VOH = 13.5V VOL = 0.4V VOL = 0.5V VOL = 1.5V |IO| < 1.0A Test Conditions |IO| < 1.0A Min 4.95 9.95 14.95 3.5 7.0 11.0 0.44 1.1 3.0 0.44 1.1 3.0 Typ 0.88 2.25 8.8 0.88 2.25 8.8 105 105 Max 0.05 0.05 0.05 1.5 3.0 4.0 0.3 0.3 4.0 8.0 16.0 Unit V V V V V V V V V V V V mA mA mA mA mA mA A A A A A

Note 2. IOH and IOL are measured one output at a time. AC Electrical Characteristics: (CL = 50pF, RL = 200k, TA = +25C, Note 3 unless otherwise specified)
Parameter Clock Operation Propagation Delay Time tPHL, tPLH 5 10 15 Transition Time tTHL, tTLH tWL, tWH 5 10 15 Minimum Clock Pulse Width 5 10 15 Maximum Clock Rise and Fall Time tRCL, tFCL 5 10 15 200 80 65 100 50 40 100 40 32 350 160 120 200 100 80 200 80 65 15 10 5 ns ns ns ns ns ns ns ns ns s s s Symbol VDD Test Conditions Min Typ Max Unit

Note 3. AC Paramters are guaranteed by DC correlated testing.

AC Electrical Characteristics (Contd):


Parameter Clock Operation (Contd) Minimum Setup Time tSU 5 10 15 Maximum Clock Frequency fCL 5 10 15 Set and Reset Operation Propagation Delay Time tPHL(R), tPLH(S) 5 10 15 Minimum Set and Reset Pulse Width tWH(R), tWH(S) 5 10 15 Averag Input Capacitance CIN Any Symbol VDD

(CL = 50pF, RL = 200k, TA = +25C, Note 3 unless otherwise specified)


Test Conditions Min 2.5 6.2 7.6 Typ 20 15 12 5.0 12.5 15.5 150 65 45 90 40 25 5.0 Max 40 30 25 300 130 90 180 80 50 7.5 Unit ns ns ns MHz MHz MHz ns ns ns ns ns ns pF

Note 3. AC Paramters are guaranteed by DC correlated testing. Truth Table


INPUTS CLOCK{ DATA 0 1 X X X X X X X RESET 0 0 0 1 0 1 SET 0 0 0 0 1 1 OUTPUTS Q 0 1 Q 0 1 1 Q 1 0 Q 1 0 1

X = Dont Care { = Level Change


Pin Connection Diagram

Q1 1 Q1 2 Clock 1 3 Reset 1 4 D1 5 Set 1 6 VSS 7

14 VDD 13 Q2 12 Q2 11 Clock 2 10 Reset 2 9 D2 8 Set 2

NTE4013B (14Lead DIP)

14

.785 (19.95) Max .200 (5.08) Max

.300 (7.62)

.100 (2.45) .600 (15.24)

.099 (2.5) Min

NTE4013BT (SOIC14)

.340 (8.64)

14

8 .154 (3.91)

.236 (5.99)

.050 (1.27)

016 (.406) 061 (1.53) .006 (.152) NOTE: Pin1 on Beveled Edge

.198 (5.03)

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