CMOS

Static CMOS Inverter Complementary metaloxidesemiconductor (CMOS) ("see-moss", IPA: ['si.ms]), is a major class o inte!rate" circ#its. CMOS tec$nolo!% is #se" in c$i&s s#c$ as micro&rocessors, microcontrollers, static 'AM, an" ot$er "i!ital lo!ic circ#its. CMOS tec$nolo!% is also #se" or a (i"e variet% o analo! circ#its s#c$ as ima!e sensors, "ata converters, an" $i!$l% inte!rate" transceivers or man% t%&es o comm#nication. CMOS is also sometimes e)&laine" as complementary-symmetry metaloxidesemiconductor . *$e (or"s "com&lementar%-s%mmetr%" re er to t$e act t$at t$e t%&ical "i!ital "esi!n st%le (it$ CMOS #ses com&lementar% an" s%mmetrical &airs o &-t%&e an" n-t%&e MOS+,*s or lo!ic #nctions. *(o im&ortant c$aracteristics o CMOS "evices are $i!$ noise imm#nit% an" lo( static &o(er s#&&l% "rain. Si!ni icant &o(er is onl% "ra(n ($en its transistors are s(itc$in! -et(een on an" o states. conse/#entl%, CMOS "evices "o not &ro"#ce as m#c$ $eat as ot$er orms o lo!ic s#c$ as **0. CMOS also allo(s a $i!$ "ensit% o lo!ic #nctions on a c$i&. *$e tri&le com&o#n" "metal1o)i"e1semicon"#ctor" is a re erence to t$e nat#re o t$e &$%sical str#ct#re o earl% (an" interestin!l% no(, t$e ver% latest) iel"-e ect transistors, $avin! a metal !ate electro"e &lace" on to& o an o)i"e ins#lator, ($ic$ in t#rn is on to& o a semicon"#ctor material. Instea" o metal, c#rrent !ate electro"es (incl#"in! t$ose #& to t$e 23 nanometer tec$nolo!% no"e) are almost al(a%s ma"e rom a "i erent material, &ol%silicon, -#t t$e terms MOS an" CMOS nevert$eless contin#e to -e #se" or t$e mo"ern "escen"ants o t$e ori!inal &rocess. (See also MOS+,*.) Metal !ates $ave ma"e a come-ac4 (it$ t$e a"vent o $i!$-4 "ielectric materials in t$e CMOS transistor as anno#nce" -% I5M an" Intel or t$e 63 nanometer no"e an" -e%on" [7]. A c$i& (it$ a lar!e n#m-er o CMOS transistors &ac4e" ti!$tl% to!et$er is sometimes 4no(n as CHMOS ( or "Com&lementar% 8i!$-"ensit% metal1o)i"e1semicon"#ctor"). *$e com-ination o M,MS sensors (it$ "i!ital si!nal &rocessors on one sin!le CMOS c$i& is sometimes 4no(n an CMOSens. Development history CMOS circ#its (ere invente" in 792: -% +ran4 ;anlass at +airc$il" Semicon"#ctor. *$e irst CMOS inte!rate" circ#its (ere ma"e -% 'CA in 792< -% a !ro#& le" -% Al-ert Me"(in. Ori!inall% a lo(-&o(er -#t slo( alternative to **0, CMOS o#n" earl% a"o&ters in t$e (atc$ in"#str% an" in ot$er iel"s ($ere -atter% li e (as more im&ortant t$an s&ee". Some t(ent%- ive %ears later, CMOS $as -ecome t$e &re"ominant tec$nolo!% in "i!ital inte!rate" circ#its. *$is is essentiall% -eca#se area occ#&ation, o&eratin! s&ee", ener!% e icienc% an" man# act#rin! costs $ave -ene ite" an" contin#e to -ene it rom t$e !eometric "o(nsi=in! t$at comes (it$ ever% ne( !eneration o semicon"#ctor man# act#rin! &rocesses. In a""ition, t$e sim&licit% an" com&arativel% lo( &o(er "issi&ation o CMOS circ#its $ave allo(e" or inte!ration "ensities not &ossi-le on t$e -asis o -i&olar j#nction transistors.

Stan"ar" "iscrete CMOS lo!ic #nctions (ere ori!inall% availa-le onl% in t$e 6>>> series ('CA "COS?MOS") inte!rate" circ#its. 0ater man% #nctions in t$e @6>> series -e!an to -e a-ricate" in CMOS, AMOS, 5iCMOS or anot$er variant. ,arl% CMOS circ#its (ere ver% s#sce&ti-le to "ama!e rom electrostatic "isc$ar!e (,SB). S#-se/#ent !enerations (ere t$#s e/#i&&e" (it$ so&$isticate" &rotection circ#itr% t$at $el&s a-sor- electric c$ar!es (it$ no "ama!e to t$e ra!ile !ate o)i"es an" PA-j#nctions. Still, antistatic $an"lin! &reca#tions or semicon"#ctor "evices contin#e to -e ollo(e" to &revent e)cessive ener!ies rom -#il"in! #&. Man# act#rers recommen" #sin! antistatic &reca#tions ($en a""in! a memor% mo"#le to a com&#ter, or instance. On t$e ot$er $an", earl% !enerations s#c$ as t$e 6>>> series t$at #se" al#min#m as a !ate material (ere e)tremel% tolerant o s#&&l% volta!e variations an" o&erate" an%($ere rom : to 7< volts BC. +or man% %ears, CMOS lo!ic (as "esi!ne" to o&erate rom t$e in"#str%-stan"ar" o 3 C im&ose" -% **0. 5% 799>, lo(er &o(er "issi&ation (as #s#all% more im&ortant t$an eas% inter acin! to **0, an" CMOS volta!e s#&&lies -e!an to "ro& alon! (it$ t$e !eometric "imensions o t$e transistors. 0o(er volta!e s#&&lies not onl% save" &o(er, -#t allo(e" t$inner, $i!$er &er ormance !ate ins#lators to -e #se". Some mo"ern CMOS circ#its o&erate rom volta!es -elo( one volt. In t$e earl% a-rication &rocesses, t$e !ate electro"e (as ma"e o al#min#m. 0ater CMOS &rocesses s(itc$e" to &ol%cr%stalline silicon ("&ol%silicon"), ($ic$ can -etter tolerate t$e $i!$ tem&erat#res #se" to anneal t$e silicon a ter ion im&lantation. *$is means t$at t$e !ate can -e &#t on earl% in t$e &rocess an" t$en #se" "irectl% as an im&lant mas4 &ro"#cin! a sel ali!ne" !ate (!ates t$at are not sel ali!ne" re/#ire overla& ($ic$ increases "evice si=e an" stra% ca&acitance). Consi"era-le researc$ t$at $as !one into #sin! metal !ates $as le" to t$e anno#ncement o t$eir #se in conj#nction (it$ t$e re&lacement t$e silicon "io)i"e !ate "ielectric (it$ a $i!$-4 "ielectric material to com-at increasin! lea4a!e c#rrents. Technical details CMOS (com&lementar% metal1o)i"e1semicon"#ctor) re ers to -ot$ a &artic#lar st%le o "i!ital circ#itr% "esi!n, an" t$e amil% o &rocesses #se" to im&lement t$at circ#itr% on inte!rate" circ#its (c$i&s). CMOS lo!ic on a CMOS &rocess "issi&ates less ener!% an" is "enser t$an ot$er im&lementations o t$e same #nctionalit%. As t$is a"vanta!e $as !ro(n an" -ecome more im&ortant. CMOS &rocesses an" variants $ave come to "ominate, so t$at t$e vast majorit% o mo"ern inte!rate" circ#it man# act#rin! -% "ollar vol#me is on CMOS &rocesses. Structure CMOS logic #ses a com-ination o &-t%&e an" n-t%&e metal1o)i"e1semicon"#ctor iel"-e ect transistors (MOS+,*s) to im&lement lo!ic !ates an" ot$er "i!ital circ#its o#n" in com&#ters, telecomm#nications an" si!nal &rocessin! e/#i&ment. Alt$o#!$ CMOS lo!ic can -e im&lemente" (it$ "iscrete "evices ( or instance, in an intro"#ctor% circ#its class), t%&ical commercial CMOS &ro"#cts are inte!rate" circ#its com&ose" o millions (or $#n"re"s o millions) o transistors o -ot$ t%&es on a rectan!#lar &iece o silicon o -et(een >.7 an" 6 s/#are centimeters. *$ese -its o silicon are commonl% calle" c$i&s, alt$o#!$ (it$in t$e in"#str% t$e% are also re erre" to as "ie (sin!#lar) or "ice (&l#ral). In CMOS lo!ic !ates a collection o n-t%&e MOS+,*s is arran!e" in a &#ll-"o(n net(or4 -et(een t$e o#t&#t an" t$e lo(er-volta!e &o(er s#&&l% rail (o ten name" Css or /#ite o ten !ro#n"). Instea" o t$e loa" resistor o AMOS lo!ic !ates, CMOS lo!ic !ates $ave a collection o &-t%&e MOS+,*s in a &#ll-#& net(or4 -et(een t$e o#t&#t an" t$e $i!$er-volta!e rail (o ten name" C""). Ao( &#ll-#& an" &#ll-"o(n re er to t$e i"ea t$at t$e o#t&#t no"e, ($ic$ $a&&ens to -e ($ere t$e &#ll-#& an" &#ll-"o(n net(or4s intersect, e)$i-its some internal ca&acitance t$at is c$ar!e" or "isc$ar!e" res&ectivel% t$ro#!$ &at$(a%s orme" -% t$e &?nMOS net(or4s or vario#s in&#ts. *$is ca&acitance is c$ar!e" ($en t$ere is a "irect &at$ rom C"" to t$e o#t&#t, an" "isc$ar!e" ($en t$ere is a "irect &at$ rom o#t&#t to !ro#n". Aotice t$at a "i!ital CMOS

circ#it cannot (i"eall%) -e in a &#ll-#& an" &#ll-"o(n &$ase at t$e same time, or else -ot$ t$e &?n-net(or4s (ill i!$t to 4ee& t$e volta!e on t$e ca&acitance eit$er C"" or !ro#n". *$e &-t%&e transistor net(or4 is com&lementar% to t$e n-t%&e transistor net(or4, so t$at ($en t$e n-t%&e is o , t$e &-t%&e is on, an" viceversa. CMOS lo!ic "issi&ates less &o(er t$an AMOS lo!ic -eca#se CMOS "issi&ates &o(er onl% ($en s(itc$in! (dynamic power). On a t%&ical ASIC in a mo"ern 9> nanometer &rocess, s(itc$in! t$e o#t&#t mi!$t ta4e 7D> &icosecon"s, an" $a&&en once ever% ten nanosecon"s. AMOS lo!ic "issi&ates &o(er ($enever t$e o#t&#t is lo( (static power), -eca#se t$ere is a c#rrent &at$ rom C "" to Css t$ro#!$ t$e loa" resistor an" t$e n-t%&e net(or4. P-t%&e MOS+,*s are com&lementar% to n-t%&e -eca#se t$e% t#rn on ($en t$eir !ate volta!e !oes s# icientl% -elo( t$eir so#rce volta!e, an" -eca#se t$e% can &#ll t$e "rain all t$e (a% to C "". *$#s, i -ot$ a &-t%&e an" n-t%&e transistor $ave t$eir !ates connecte" to t$e same in&#t, t$e &-t%&e MOS+,* (ill -e on ($en t$e n-t%&e MOS+,* is o , an" vice-versa. Example: NAND gate

AAAB !ate in CMOS lo!ic As an e)am&le, s$o(n on t$e ri!$t is a circ#it "ia!ram o a AAAB !ate in CMOS lo!ic. I -ot$ o t$e A an" 5 in&#ts are $i!$, t$en -ot$ t$e n-t%&e transistors (-ottom $al o t$e "ia!ram) (ill con"#ct, neit$er o t$e &-t%&e transistors (to& $al ) (ill con"#ct, an" a con"#ctive &at$ (ill -e esta-lis$e" -et(een t$e o#t&#t an" Css, -rin!in! t$e o#t&#t lo(. I eit$er o t$e A or 5 in&#ts is lo(, one o t$e n-t%&e transistors (ill not con"#ct, one o t$e &-t%&e transistors (ill, an" a con"#ctive &at$ (ill -e esta-lis$e" -et(een t$e o#t&#t an" C"", -rin!in! t$e o#t&#t $i!$. Anot$er a"vanta!e o CMOS over AMOS is t$at both lo(-to-$i!$ an" $i!$-to-lo( o#t&#t transitions are ast since t$e &#ll-#& transistors $ave lo( resistance ($en s(itc$e" on, #nli4e t$e loa" resistors in AMOS lo!ic. In a""ition, t$e o#t&#t si!nal s(in!s t$e #ll volta!e -et(een t$e lo( an" $i!$ rails. *$is stron!, more nearl% s%mmetric res&onse also ma4es CMOS more resistant to noise. See 0o!ical e ort or a met$o" o calc#latin! "ela% in a CMOS circ#it.

Example: NAND gate in p ysical layout

*$e &$%sical la%o#t o a AAAB circ#it (-ase" on t$e CMOS lo!ic e)am&le !iven) *$is e)am&le s$o(s a AAAB lo!ic "evice "ra(n as a &$%sical re&resentation as it (o#l" -e man# act#re". *$e &$%sical la%o#t &ers&ective is a "-ir"'s e%e vie(" o a stac4 o la%ers. *$e circ#it is constr#cte" on a Pt%&e s#-strate. *$e &ol%silicon, "i #sion, an" n-(ell are re erre" to as "-ase la%ers" an" are act#all% inserte" into trenc$es o t$e P-t%&e s#-strate. *$e contacts &enetrate an ins#latin! la%er -et(een t$e -ase la%ers an" t$e irst la%er o metal (metal7) ma4in! a connection. *$e in&#ts to t$e AAAB (ill#strate" in !reen colorin!) are in &ol%silicon. *$e CMOS transistors ("evices) are orme" -% t$e intersection o t$e &ol%silicon an" "i #sion: A "i #sion or t$e A "evice. P "i #sion or t$e P "evice (ill#strate" in salmon an" %ello( colorin! res&ectivel%). *$e o#t&#t ("o#t") is connecte" to!et$er in metal (ill#strate" in c%an colorin!). Connections -et(een metal an" &ol%silicon or "i #sion are ma"e t$ro#!$ contacts (ill#strate" as -lac4 s/#ares. *$e &$%sical la%o#t e)am&le matc$es t$e AAAB lo!ic circ#it !iven in t$e &revio#s e)am&le. *$e A "evice is man# act#re" on a P-t%&e s#-strate. *$e P "evices is man# act#re" in an A-t%&e (ell (n(ell). A P-t%&e s#-strate "ta&" is connecte" to C SS an" an A-t%&e n-(ell ta& is connecte" to CBB to &revent latc$#&. Power: switching and leakage CMOS circ#its "issi&ate &o(er -% c$ar!in! an" "isc$ar!in! t$e vario#s loa" ca&acitances (mostl% !ate an" (ire ca&acitance, -#t also "rain an" some so#rce ca&acitances) ($enever t$e% are s(itc$e". *$e c$ar!e move" is t$e ca&acitance m#lti&lie" -% t$e volta!e c$an!e. M#lti&l% -% t$e s(itc$in! re/#enc% to !et t$e c#rrent #se", an" m#lti&l% -% volta!e a!ain to !et t$e c$aracteristic s(itc$in! &o(er "issi&ate" -% a CMOS "evice: P E CVDf. A "i erent orm o &o(er cons#m&tion -ecame noticea-le in t$e 799>s as (ires on c$i& -ecame narro(er an" t$e lon! (ires -ecame more resistive. CMOS !ates at t$e en" o t$ose resistive (ires see slo( in&#t transitions. B#rin! t$e mi""le o t$ese transitions, -ot$ t$e AMOS an" PMOS net(or4s are &artiall% con"#ctive an" c#rrent lo(s "irectl% rom C"" to Css. *$e &o(er t$#s #se" is calle" crowbar &o(er. Care #l "esi!n ($ic$ avoi"s (ea4l% "riven lon! s4inn% (ires $as ameliorate" t$is e ect, an" cro(-ar &o(er is nearl% al(a%s s#-stantiall% smaller t$an s(itc$in! &o(er. 5ot$ AMOS an" PMOS transistors $ave a t$res$ol" !ate-to-so#rce volta!e, -elo( ($ic$ t$e c#rrent t$ro#!$ t$e "evice "ro&s e)&onentiall%. 8istoricall%, CMOS "esi!ns o&erate" at s#&&l% volta!es m#c$ lar!er t$an t$eir t$res$ol" volta!es (C "" mi!$t $ave -een 3 C an" Ct$ or -ot$ AMOS an" PMOS mi!$t $ave -een @>> mC). 5#t as s#&&l% volta!es $ave come "o(n to conserve &o(er t$e C "" to Css s$ort circ#it is avoi"e".

8o(ever, to s&ee" #& t$e "esi!ns, man# act#rers $ave s(itc$e" to !ate materials ($ic$ lea" to lo(er volta!e t$res$ol"s an" a mo"ern AMOS transistor (it$ a C t$ o D>> mC $as a si!ni icant s#-t$res$ol" lea4a!e c#rrent. Besi!ns (e.!. "es4to& &rocessors) ($ic$ tr% to o&timi=e t$eir a-rication &rocesses or minim#m &o(er "issi&ation "#rin! o&eration $ave -een lo(erin! C t$ so t$at lea4a!e &o(er -e!ins to a&&ro)imate s(itc$in! &o(er. As a res#lt, t$ese "evices "issi&ate consi"era-le &o(er even ($en not s(itc$in!. 0ea4a!e &o(er re"#ction #sin! ne( material an" s%stem "esi!n is critical to s#stainin! scalin! o CMOS. *$e in"#str% is contem&latin! t$e intro"#ction o 8i!$-4 Bielectrics to com-at t$e increasin! !ate lea4a!e c#rrent -% re&lacin! t$e silicon "io)i"e t$at are t$e conventional !ate "ielectrics (it$ materials $avin! a $i!$er "ielectric constant. A !oo" overvie( o lea4a!e an" re"#ction met$o"s is e)&laine" in 0ea4a!e in Aanometer CMOS *ec$nolo!ies IS5A >-:<@-D3@:@-:.