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Hspice Example

This document provides a tutorial on using HSPICE to characterize a CMOS NAND gate. It defines parameters like voltage and transistor widths. It then shows how to define stimuli, subcircuits, instantiate modules, and perform analyses like transient and measurements. Parameters can be altered and the circuit re-run to understand the impacts of changes.

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sriIIT
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255 views

Hspice Example

This document provides a tutorial on using HSPICE to characterize a CMOS NAND gate. It defines parameters like voltage and transistor widths. It then shows how to define stimuli, subcircuits, instantiate modules, and perform analyses like transient and measurements. Parameters can be altered and the circuit re-run to understand the impacts of changes.

Uploaded by

sriIIT
Copyright
© Attribution Non-Commercial (BY-NC)
Available Formats
Download as PDF, TXT or read online on Scribd
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HSPICE Tutorial

by Yousof Mortazavi (Oct. 2004)

Define parameters with .param Can define parameter based on other parameters or expressions. Use + to continue long lines on the proceeding line.

* Tutorial: CMOS NAND Gate Characterization *********** define parameters *********** .param vdd = 3.3 .param Wn = 1.0u + Wp = Wn + Lmin = 0.35u + delay = 100p

First line in a SPICE deck is always a comment (with or without *). First vdd is the voltage source. Second vdd is the node. Third vdd is the parameter (=3.3 V) .

***************** define stimulii ********************* vdd vdd 0 vdd Va a_ 0 pulse (0 vdd 20n delay delay 40n 60n) Vb b_ 0 pulse (0 vdd 10n delay delay 20n 40n) ***** define global nodes for use in subcircuits ***** .global vdd

*** define subcircuits (modules) *****

Subcircuits are SPICEs way of defining modules repeated in your design.

You can even parametrize values in your module and select these values when you instantiate your module.

.subckt nand x y Mp1 out x vdd + PD='Wp + 6*Lmin' + AD='3*Wp*Lmin' Mp2 out y vdd + PD='Wp + 6*Lmin' + AD='3*Wp*Lmin' Mn1 out x node1 + PD='Wn + 6*Lmin' + AD='3*Wn*Lmin' Mn2 node1 y 0 + PD='Wn + 6*Lmin' + AD='3*Wn*Lmin' .ends

out vdd P W=Wp PS='Wp + 6*Lmin' AS='3*Wp*Lmin' vdd P W=Wp PS='Wp + 6*Lmin' AS='3*Wp*Lmin' 0 N W=Wn PS='Lmin' AS='Wn*Lmin' 0 N W=Wn PS='Wn + 6*Lmin' AS='3*Wn*Lmin'

L=Lmin

Heres how you can do arithmetic on your parameters. These are the subcircuit parameters and their default values, in case you dont specify them during instantiation.
L=Lmin

L=Lmin

L=Lmin

L=Lmin

.subckt inverter in out strength=Wn ratio='Wp/Wn' Mn1 out in 0 0 N W=strength + PD='strength + 6*Lmin' PS='strength * 2 + Lmin' + AD='3*strength*Lmin' AS='3*strength * Lmin' Mp1 out in vdd vdd P W='strength*ratio' + PD='strength*ratio + 6*Lmin' PS='ratio*strength + 6*Lmin' + AD='3*ratio*strength*Lmin' AS='3*ratio*strength*Lmin' .ends

L=Lmin

***** A buffer .subckt buffer Xinv1 in Xinv2 mid .ends

module in mid out

consisting of two inverters out strength=Wn ratio='Wp/Wn' inverter strength=strength ratio=ratio inverter strength=strength ratio=ratio

Instantiate modules like so. (Xnand1: doesnt uses default parameter values).

********* define main Xbuff1 a_ a Xbuff2 b_ b Xnand1 a b * Load capacitance Cl out 0

circuit buffer buffer out 0.1p

****************** strength='Wn' ratio=1 strength='Wn' ratio=1 nand

We can sweep parametrized values using sweep. Here lin means linear. Alternatives are: dec and oct. Temperature may be swept by using temp instead of sweep par

****** Anlysis Options ********** .tran STEP=5p STOP=80n sweep wn lin 5 1.0u 5.0u .meas + .meas + .meas + .meas + .meas .meas tran tplh_b1ar trig v(a) td=20ns val='vdd/2' cross=1 targ v(out) td=20ns val='vdd/2' cross=1 tran tplh_a1bf trig targ tran tplh_a1br trig targ tran tplh_b1af trig targ tran avgpower AVG tran peakpower MAX v(b) v(out) v(b) v(out) v(a) v(out) power power td=30ns td=30ns td=50ns td=50ns td=60ns td=60ns val='vdd/2' val='vdd/2' val='vdd/2' val='vdd/2' val='vdd/2' val='vdd/2' cross=1 cross=1 cross=1 cross=1 cross=1 cross=1

Measure propagation delays accurately using the .meas statement. Outputs are written to .mtn files, where n=0,1, (alteration number)

from=1ns to=80ns from=1ns to=80ns

********* load 0.35u library ********* .prot .lib 'logs355V.l' TT .unprot ****** Alter the parameters and run again .alter case 2: Wp=2Wn .param Wp = '2*Wn' .alter case 3: increase Vdd by 10% .param vdd = '3.3*1.1' .alter case 4: use fast corner .del lib TT .lib 'logs355v.l' FF .alter case 5: change load capacitance Cl out 0 0.01p .alter case 6: change temperature .TEMP 70 .end

Power measurements

Here we trigger when the voltage at node a crosses vdd/2, and measure the time until the output crosses vdd/2. Td = 20 ns makes sure were on the right part of the waveform.

.ALTER statements allows us to modify the circuit and run again. They must be before the final .end statement. Note: ALTER blocks are incremental!!!

We can even change the models.

Elements may also be replaced. Temperature may be altered as well.

* tutorial: cmos nand gate characterization


3.5 3 2.5 2 1.5 1 500m 0 Voltages (lin) Voltages (lin)

3.5 3 2.5 2 1.5 1 500m 0

3.5 Voltages (lin) 3 2.5 2 1.5 500m 1 0

20n

40n Time (lin) (TIME)

60n

80n

Design D0: NAND D0: NAND D0: NAND

Type Transient Transient Transient

Wave D0:tr0:v(a) D0:tr0:v(b) D0:tr0:v(out)

Symbol

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