L9638

LIN BUS TRANSCEIVER

1

FEATURES Single-wire transceiver for LIN-protocol Transmission rate up to 20 kbaud Operating power supply voltage range 6V Vs 26V (40V for transients) Low quiescent current in sleep mode (typ.10A) Wake-up through LIN-bus, Enable input (from C CMOS compatible) or Wake-up input (edge driven) Wide input and output range -24V VLIN Vs Integrated pull/down/up resistors for LIN, TxD, RxD, EN, INH Inhibit output with low resistance (<40) versus Vs and short circuit protection CMOS compatible TxD, RxD Interface EMI robustness optimised Thermal shutdown and LIN short circuit protection 2 Table 1. Order Codes
Part Number L9638D L9638D013TR Package SO-8 Tape & Reel SO-8

DESCRIPTION

The L9638 is a monolithic integrated circuit for LIN-bus interface function between the protocol handler in the controller and the physical bus in automotive applications. As well as it can be used in standard ISO 9141 systems.

Figure 1. Block Diagram

VS Int.5V

Internal Voltage Regulator

Glitch Filter

VS_D

RxD

LIN

TxD

VS_D
EN

Control Logic Protection

INH

WUP
Glitch Filter

GND

April 2004

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L9638
Table 2. Pin Description
Pin No. 1 2 3 4 5 6 7 8 Pin Name RxD EN WUP TxD GND LIN Vs INH Receive data Output Enable Input Digital control signal for low power modes Wake-Up Input Local wake-up from sleep mode sensitive to positive and negative edges Transmit data Input Ground Bidirectional I/O Supply voltage Inhibit Output, battery related high side switch for controlling external Voltage Regulator Function

Figure 2. Pin Connection

RxD EN WUP TxD

1 2 3 4
D04AT514

8 7 6 5

INH Vs LIN GND

Table 3. Absolute Maximum Ratings

Symbol VS VLIM VINH ,WUP Supply Voltage Pin Voltage Pin Voltage Parameter Value -0.3 to 40 -24 to 40 -0.3 to 40 -0.3 to 6 Unit V V V V

VRxD ,TxD, EN Pin Voltage

Table 4. Thermal Data

Symbol TJ_OP Rth j-amb TJ_SD Tstg Parameter Operating junction temperature Thermal steady state junction to ambient resistance Thermal shutdown temperature Storage temperature Value -40 to150 145 170 20 -55 to 150 Unit C K/W C C

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L9638
Table 5. Electrical Characteristics (VS = 6V to26V; TJ = -40 to150 C unless otherwise specified)
Item 1 1.1 1.2 1.3 1.4 Symbol Parameter Test Condition Min. Typ. Max. Unit

Supplies
VS ISleep IShort IDStand-by Supply Voltage Supply Vs Curent in sleep mode Supply Vs Curent with bus short circuit VEN = VEN low VEN = VEN low 150 30 6 10 500 100 26 30 1700 200 V A A A

Supply Vs Current in Stand- VLIN = VLINHigh by Mode with bus recessive VEN = VENLow VTxD = VTxDHigh Supply Vs Current in Stand- VLIN = VLINLow by Mode with bus dominant VEN = VENLow (Receive only Mode) Supply Vs Current in Normal Mode with bus recessive Supply Vs Current in Normal Mode with bus dominant VEN = VENHigh VLIN = VLINHigh VTxD = VTxDHigh VEN = VENHigh VLIN = VLINLow VTxD = VTxDLow

1.5

IDStand-by

0.5

1.1

2.5

mA

1.6

IsNormal

300

500

700

1.7

IsNormal

0.9

1.8

3.5

mA

2 2.1 2.2 2.3 2.4 2.5

LIN Bus Interface

VBUSDom VBUSRec VHYS VBUScnt ILINON ILINOff VLINDom RLIN fLIN-RxD dVLIN/dt dVLIN/dt Receive Threshold Voltage recessive to dominant state Receive Threshold Voltage dominant to recessive state Receive Threshold Hysteresis Tolerance centre value of Receiver Input Current dominant state Input Current recessive state Drive Voltage dominant state Output pull up resistor Transmission Frequency RVs-LIN =1100 CLIN-GND =10nF From 10% to 90% of VLIN From 90% to 10% of VLIN VLIN<18V VLIN 8V VBUSRec-VBUSDom (VBUSRec+VBUSDom)/2 VTxD = VTxDLow VLIN = VS VTxD = VTxDHigh VLIN = Vs VTxD = VTxDLow ILIN = 40mA 20 20 30 0.4 0.5 0.05 0.475 40 0.45 0.55 0.1 0.5 100 0.5 0.6 0.17 0.525 160 Vs Vs Vs Vs mA A V k kHz V/s V/s

2.51

-10

10

2.6

1.2

2.7 2.8

47

2.9 2.10

Slew rate rising edge Slew rate falling edge

1 -3

2 -2

3 -1

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L9638
Table 5. Electrical Characteristics (continued) (VS = 6V to26V; TJ = -40 to150 C unless otherwise specified)
Item 2.11 Symbol ttrans_pd Parameter Propagation delay of transmitter Test Condition See Fig.2 ttrans_pd = max (ttrans_pdr, trans_pdf) See Fig.2 trec_pd = max (trec_pdr, trec_pdf) See Fig.2 trec_sym= (trec_pdf -trec_pdr) See Fig.2 ttrans_sym = (ttrans_pdf -ttrans_pdr) See Fig.3 VLIN = VLINLow -2 Min. Typ. Max. 4 Unit s

2.12 2.13

trec_pd trec_sym

Propagation delay of receiver Symmetry of receiver propagation delay rising edge w.r.t. falling edge Symmetry of transmitter propagation delay rising edge w.r.t. falling edge Bus wake-up glitch suppression time

6 2

s s

2.14

ttrans_sym

-2

2.15 3 3.1 3.2 3.3

tLINgs

40

100

Transmission Input TxD

VTxDLow VTxDHigh RTxD Input Voltage dominant state Input Voltage recessive state TxD pull up resistor 3.5 5 10 25 1.5 V V K

LIN Driver (20KBit/s)

3.4 D1 Duty Cycle 1 THRec(max) = 0.744 x VSUP; THDom(max) = 0.581 x VSUP; Vsup = 7.0 to 18V; tbit = 50s; D1 = tBus_rec(min)/2 x tBit (CBUS; RBUS) 1nF; 1k/6.8nF; 660/10nF; 500 THRec(min) = 0.284 x VSUP; THDom(min) = 0.422 x VSUP; Vsup = 7.6 to 18V; tbit = 50s; D2 = tBus_rec(min)/2 x tBit (CBUS; RBUS) 1nF; 1k/6.8nF; 660/10nF; 500 THRec(max) = 0.778 x VSUP; THDom(max) = 0.616 x VSUP; Vsup = 7.0 to 18V; tbit = 96s; D3 = tBus_rec(min)/2 x tBit (CBUS; RBUS) 1nF; 1k/6.8nF; 660/10nF; 500 THRec(min) = 0.251 x VSUP; THDom(min) = 0.389 x VSUP; Vsup = 7.6 to 18V; tbit = 96s; D4 = tBus_rec(min)/2 x tBit (CBUS; RBUS) 1nF; 1k/6.8nF; 660/10nF; 500 0.417 0.396

3.5

D2

Duty Cycle 2

0.581

3.6

D3

Duty Cycle 3

3.7

D4

Duty Cycle 4

0.591

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L9638
Table 5. Electrical Characteristics (continued) (VS = 6V to26V; TJ = -40 to150 C unless otherwise specified)
Item 4 4.1 4.2 4.3 5 5.1 5.2 5.3 6 6.1 6.2 6.3 7 7.1 7.2 7.3 7.4 7.5 Symbol Parameter Test Condition Min. Typ. Max. Unit

Receive Output RxD

VRxDLow VRxDHigh RRxD Output Voltage dominant state Output Voltage recessive state RxD pull up resistor IRxD = 2mA IRxD10A 4.5 5 10 25 1.5 V V k

Inhibit Output INH

RON(INH) ION(INH) ROFF(INH) Switch on resistance between Vs and INH INH output current Switch off INH pull down resistor IINH=-15mA; Vs=13.5V Normal or stand-by mode 15 5 20 30 10 40 50 25 mA k

Wake Up Input WUP

VWUPLow VWUPHigh tWUPgs Low level input voltage High level input voltage Remote wake-up delay time Transitioning on WUP 3.5 40 1.5 Vs+0.3 100 V V s

Enable Input EN
VENLow VENHigh REN tgts tENgs Low level input voltage High level input voltage EN pull down resistor Go to sleep delay time EN wake-up glitch suppression time VEN = VENlow VEN = VENhigh 3.5 5 10 40 40 25 100 100 1.5 V V K s s

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L9638
3 TIMING DIAGRAM

Figure 3. Definition of Bus Timing Parameters

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L9638
Figure 4. Typical Bus Timing
VTxD

t ttrans_pdf VLIN 90% Receive Recessive Threshold Receive Dominant Threshold 10% t trec_pdr ttrans_pdr

VRxD

trec_pdf

Figure 5. Typical Wake-up Timing

VLIN

t<tLINgs VRxD

gstLIN

t VINH

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L9638
4 FUNCTIONAL DESCRIPTION

The L9638 is a monolithic bus driver designed to provide bidirectional serial communication in Local Interconnect Network (LIN). In addition to the integrated physical layer (specified in LIN specification rev. 2.0), further control in- and output functions simplify various system requirements like controlled power saving modes or additional external wake up capability. 4.1 Operating modes There are four possible modes of operation: normal, standby, sleep and short circuit. The transitions between the various operation modes are described in the diagram. 4.2 Standby mode This mode is reached after power up the system or due to a received wake-up condition from sleep mode. The device is able to receive at RxD, but could not transmit any data. This prevents the disturbance of the LIN bus line due to a not correctly working C. Entering the standby mode, the INH output will set to HIGH by simultaneous switching off the internal pull down resistor to reduce the current consumption. This allows the control of connected power supply devices. Therefore for systems, that will be controlled only by the LIN bus line (particular ECUs, that works as slave node) a power management can easy build up on that function. It is recommended to power up the system before the communication will start, otherwise additional delay times have to be regarded. Because of integrated filtering of external WUP input, the INH output can alternatively be used to simplify a software filtering procedure to detect an external edge sensitive signal by connecting INH versus a series resistor to an interrupt capable input of the C. 4.3 Normal mode This mode can only be reached from standby or sleep mode by setting the EN input to HIGH. Transmission and receiving of data stream via the LIN line is possible. An integrated pull up resistor in series with a diode at LIN provides either required recessive state (HIGH) as well as a protection against reverse power supply. In master node application, a LOW ohmic resistor in series with a diode has to be connected externally between LIN and battery to allow the maximum transmission rate. The receiver converts the battery supply related signal at LIN to a logic supply compatible output at RxD. Integrated filter in addition with the supply voltage related threshold and hysteresis provide optimal noise suppression. The transmitter shifts the logic supply related data stream at TxD to battery level at LIN. A read back function is possible by evaluating the mirrored state from the LIN line at the output RxD. 4.4 Short circuit mode The L9638 provides a special operation mode for shorted LIN bus lines to ground. In that case, the whole LIN network is blocked. If the protocol handler in the C detects a "time out" condition, that could be unambiguously identified as a short to ground condition in the bus line, the whole LIN node could be disconnected from the network by setting EN input to LOW. This will switch INH output from active HIGH to LOW. Additionally RxD output, that remains in the dominant state and maybe block the C will set to HIGH ohmic state. The L9638 won't accept any transition at TxD. This short circuit mode will be stable until the dominant state on LIN will be cleared. In that case, the device will switch to the sleep mode. According to that, the current consumption of a blocked LIN network will be reduced to the resulting short circuit current in the LIN line. Especially for sporadically happening shorts due to damaged cable isolation, the LIN network will be automatically reset. Therefore no special power up procedure is required.

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L9638
4.5 Sleep mode This mode allows the lowest current consumption of the transceiver. It'll be reached either by setting the EN input to LOW (assuming no occurring wake-up event) while being in the normal mode or in case of a removed short to ground at LIN while being in the short circuit mode. The INH output will be switched from HIGH to LOW. A further transmission via TxD is prevented. The device is waiting on any wake-up requests either by LIN (dominant level) or WUP (rising or falling edge). This will set the device from sleep mode to standby mode. An implemented filter prevents unwished wake-ups due to occurring glitches or EMI at LIN or WUP. 4.6 Wake-up The L9638 provides several wake-up conditions from sleep mode: Remote wake-up by a dominant level at LIN Local wake-up by a falling or rising edge at WUP Mode change by setting EN to HIGH The INH output will be set from LOW to HIGH after each kind of valid wake-up conditions. For remote wake-up via LIN, RxD will be activated and set as well to a dominant state. This allows fast reaction for powered C with connected interrupt capable receive inputs. 4.7 Fail-safe features To prevent possible states, that will block the communication line in case of a failed C operation, the L9638 has implemented some special fail-safe features: After detected a clear short to ground state at the LIN pin by the protocol handler in the C, the transceiver or the complete power supply of the ECU control logic could be switched off by setting the EN input from HIGH to LOW. The device will stay in that special short circuit mode until the state of the LIN bus will switch back from dominant to recessive. No power up or special reset procedures are required to clear that fail-safe state. L9638 could be reactivated with the usual wake-up signals. The TxD and EN inputs support default recessive bus states by internal pull up or down sources The output stage of the transmitter is current limited to protect against a shorten LIN to battery A thermal shutdown protects the device against over temperature caused destruction. In case of a permanent overload condition, the output stage will be switched off after reaching the shut down temperature and reactivated after cooling down to the switch on temperature. Defined output status in under voltage, loss of Vs or GND condition with no impact to the bus line or the connected C

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L9638
Figure 6. State Diagram

NORMAL
TxD RxD WUP LIN EN 1 1 1 1 INH Vs Vs Vs Vs

EN

Power -up

TX mode RX mode

0 1 1 1

0 1 0 1

float float float float

0 1 0 1

EN

EN

STANDBY
( with LIN=0) if t(EN=0 after ->0) >tgts 1 ( with LIN=1) if t (EN=0 after ->0) 1 >t gts and no wake up event TxD RxD WUP LIN float float 0 1 float float 0 1 EN 0 0 INH Vs Vs

SHORT CIRCUIT
TxD RxD WUP LIN HiZ HiZ X 0 EN 0 INH 0 EN if t (LIN=0 after ->0) 1 >t LINgs WUP LIN

if (LIN=1)

SLEEP
TxD RxD WUP LIN HiZ HiZ X 1 EN 0 INH 0

if t (EN=1 after ->1) 0 >t ENgs

WUP

t delay=t W UPgs

X HiZ

dont care, input signal is stable high or low internal pull up is switched off; TxD input signal may be high or low or transitioning RxD output signal is high impedance. input signal may be high or low or transitioning

float

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L9638
Figure 7. Typical Application Circuit

VS

Int.5V Vbatt

Internal Voltage Regulator

VS_D

RxD

LIN
Glitc
h

Filter

LIN

Start up

TxD

Enable

Ref VS_D

Reset timing
Reset

Reset out

C C

EN Control Logic Protection WUP

Glitc h Filter

INH

Watchdog timer
Watchdog

GND

Watchdog
in

ext. Switch

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L9638
mm DIM. MIN. A A1 A2 B C D (1) E e H h L k ddd
Note:

inch MAX. 1.75 0.25 1.65 0.51 0.25 5.00 4.00 MIN. 0.053 0.004 0.043 0.013 0.007 0.189 0.15 0.050 6.20 0.50 1.27 0.228 0.010 0.016 0.244 0.020 0.050 TYP. MAX. 0.069 0.010 0.065 0.020 0.010 0.197 0.157

TYP.

OUTLINE AND MECHANICAL DATA

1.35 0.10 1.10 0.33 0.19 4.80 3.80 1.27 5.80 0.25 0.40

0 (min.), 8 (max.) 0.10 0.004

(1) Dimensions D does not include mold flash, protrusions or gate burrs. Mold flash, potrusions or gate burrs shall not exceed 0.15mm (.006inch) in total (both side).

SO-8

0016023 C

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L9638
Table 6. Revision History
Date Revision Description of Changes

April 2004 April 2004

1 2

First Issue Changed maturity from Product Preview in Final; Corrected Order Codes; Changed min. value of the item 1.4 of the Table 4 in the page 3.

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L9638

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners 2004 STMicroelectronics - All rights reserved STMicroelectronics GROUP OF COMPANIES Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States www.st.com

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