Register Allocation

Announcements

Programming Project 4 due Saturday, August 18 at 11:30AM

OH all t is !ee"# As" $uestions %ia email& As" $uestions %ia Pia''a& No late submissions#

Please e%aluate t is course on A(ess# )our *eed+ac" really ma"es a di**erence#

, ere ,e Are
Source 1ode

-e(ical Analysis Synta( Analysis

Semantic Analysis

.R /eneration .R O0timi'ation 1ode /eneration O0timi'ation Machine Code

, ere ,e Are
Source 1ode

-e(ical Analysis Synta( Analysis

Semantic Analysis

.R /eneration .R O0timi'ation 1ode /eneration O0timi'ation Machine Code

Fan-TAC-stic!

, ere ,e Are
Source 1ode

-e(ical Analysis Synta( Analysis

Semantic Analysis

.R /eneration .R O0timi'ation 1ode /eneration O0timi'ation Machine Code

1ode /eneration at a /lance

At t is 0oint, !e a%e o0timi'ed .R code t at needs to +e con%erted into t e target language 2e#g# assem+ly, mac ine code3# /oal o* t is stage:

1 oose t e a00ro0riate mac ine instructions *or eac .R instruction# 4i%%y u0 *inite mac ine resources 2registers, cac es, etc#3 .m0lement lo!5le%el details o* t e runtime en%ironment#

Mac ine5s0eci*ic o0timi'ations are o*ten done ere, t oug some are treated as 0art o* a *inal o0timi'ation 0 ase#

O%er%ie!

Register Allocation 26oday3

Ho! to assign %aria+les to *initely many registers7 , at to do ! en it can8t +e done7 Ho! to do so e**icienty7 Ho! to detect reclaima+le memory7 Ho! to reclaim memory e**iciently7

Garbage Collection 2Monday3

Memory 6radeo**s

6 ere is an enormous tradeo** +et!een speed and size in memory# SRAM is *ast +ut %ery e(0ensi%e:

1an "ee0 u0 !it 0rocessor s0eeds in t e /H'# As o* 900:, cost is ;10<M= /ood luc" +uying 16= o* t e stu**& As o* 9019, you can +uy a 96= ard dri%e *or a+out ;100 As o* 9019, good dis" see" times are measured in ms 2a+out t!o to *our million times slo!er t an a 0rocessor cycle&3

Hard dis"s are c ea0 +ut %ery slo!:

6 e Memory Hierarc y

Idea: 6ry to get t e +est o* all !orlds +y using multi0le ty0es o* memory#

6 e Memory Hierarc y

Idea: 6ry to get t e +est o* all !orlds +y using multi0le ty0es o* memory#

Registers

L1 Cache L2 Cache Main Memory Hard Disk Net ork

6 e Memory Hierarc y

Idea: 6ry to get t e +est o* all !orlds +y using multi0le ty0es o* memory#

Registers

9>?= 5 8@= 1?@= A ?4@= 1M= 5 4M= 4/= A 9>?/= >00/=B H!G"

L1 Cache L2 Cache Main Memory Hard Disk Net ork

6 e Memory Hierarc y

Idea: 6ry to get t e +est o* all !orlds +y using multi0le ty0es o* memory#

Registers

9>?= 5 8@= 1?@= A ?4@= 1M= 5 4M=

0#9> A 1ns 1ns A >ns >ns A 9>ns

L1 Cache L2 Cache Main Memory Hard Disk Net ork

4/= A 9>?/= 9>ns A 100ns >00/=B H!G" 3 A 10ms 10 A 9000ms

6 e 1 allenges o* 1ode /eneration

Almost all 0rogramming languages e(0ose a coarse %ie! o* t e memory ierarc y:

All %aria+les li%e in Cmemory#D 4is" and net!or" e(0licitly andled se0arately#

2.nteresting e(ce0tion: Stan*ord8s #e$uoia 0rogramming language3 1 allenges in code generation:

Position o+jects in a !ay t at ta"es ma(imum ad%antage o* t e memory ierarc y# 4o so !it out ints *rom t e 0rogrammer#

Registers

Most mac ines a%e a set o* registers, dedicated memory locations t at

can +e accessed $uic"ly, can a%e com0utations 0er*ormed on t em, and e(ist in small $uantity#

Esing registers intelligently is a critical ste0 in any com0iler#

A good register allocator can generate code orders o* magnitude +etter t an a +ad register allocator#

Register Allocation

.n 6A1, t ere are an unlimited num+er o* %aria+les# On a 0 ysical mac ine t ere are a small num+er o* registers:

(8? as *our general50ur0ose registers and a num+er o* s0eciali'ed registers# M.PS as t!enty5*our general50ur0ose registers and eig t s0ecial50ur0ose registers#

Register allocation is t e 0rocess o* assigning %aria+les to registers and managing data trans*er in and out o* registers#

1 allenges in Register Allocation

Registers are scarce#

O*ten su+stantially more .R %aria+les t an registers# Feed to *ind a !ay to reuse registers ! ene%er 0ossi+le# (8?: Gac register made o* se%eral smaller registersH can8t use a register and its constituent registers at t e same time# (8?: 1ertain instructions must store t eir results in s0eci*ic registersH can8t store %alues t ere i* you !ant to use t ose instructions# M.PS: Some registers reser%ed *or t e assem+ler or o0erating system# Most arc itectures: Some registers must +e 0reser%ed across *unction calls#

Registers are com%licated#

/oals *or 6oday

.ntroduce register allocation *or a M.PS5 style mac ine:

Some num+er o* indi%isi+le, general50ur0ose registers#

G(0lore t ree algorit ms *or register allocation:

FaI%e 2CnoD3 register allocation# -inear scan register allocation# /ra0 5coloring register allocation#

An .nitial Register Allocator

Idea: Store e%ery %alue in main memory, loading %alues only ! en t ey8re needed# 6o generate a code t at 0er*orms a com0utation:

/enerate load instructions to 0ull t e %alues *rom main memory into registers# /enerate code to 0er*orm t e com0utation on t e registers# /enerate store instructions to store t e result +ac" into main memory#

Our Register Allocator .n Action

Our Register Allocator .n Action

a = b + c; d = a; c = a + d;

Our Register Allocator .n Action

a = b + c; d = a; c = a + d;
&aram N ### &aram 1 #tored '% #tored ra '% ( *N +++ '% ( * '% ( ) '% , * '% , '% , 12 '% , 1. '% , 2)

a b c d

Our Register Allocator .n Action

a = b + c; d = a; c = a + d;
&aram N ### &aram 1 #tored '% #tored ra '% ( *N +++ '% ( * '% ( ) '% , * '% , '% , 12 '% , 1. '% , 2)

a b c d

Our Register Allocator .n Action

a = b + c; d = a; c = a + d;
&aram N ### &aram 1 #tored '% #tored ra '% ( *N +++ '% ( * '% ( ) '% , * '% , '% , 12 '% , 1. '% , 2)

lw

$t0, -12(fp)

a b c d

Our Register Allocator .n Action

a = b + c; d = a; c = a + d;
&aram N ### &aram 1 #tored '% #tored ra '% ( *N +++ '% ( * '% ( ) '% , * '% , '% , 12 '% , 1. '% , 2)

lw lw

$t0, -12(fp) $t1, -16(fp)

a b c d

Our Register Allocator .n Action

a = b + c; d = a; c = a + d;
&aram N ### &aram 1 #tored '% #tored ra '% ( *N +++ '% ( * '% ( ) '% , * '% , '% , 12 '% , 1. '% , 2)

lw $t0, -12(fp) lw $t1, -16(fp) add $t2, $t0, $t1

a b c d

Our Register Allocator .n Action

a = b + c; d = a; c = a + d;
&aram N ### &aram 1 #tored '% #tored ra '% ( *N +++ '% ( * '% ( ) '% , * '% , '% , 12 '% , 1. '% , 2)

lw lw add sw

$t0, -12(fp) $t1, -16(fp) $t2, $t0, $t1 $t2, -8(fp)

a b c d

Our Register Allocator .n Action

a = b + c; d = a; c = a + d;
&aram N ### &aram 1 #tored '% #tored ra '% ( *N +++ '% ( * '% ( ) '% , * '% , '% , 12 '% , 1. '% , 2)

lw lw add sw

$t0, -12(fp) $t1, -16(fp) $t2, $t0, $t1 $t2, -8(fp)

a b c d

Our Register Allocator .n Action

a = b + c; d = a; c = a + d;
&aram N ### &aram 1 #tored '% #tored ra '% ( *N +++ '% ( * '% ( ) '% , * '% , '% , 12 '% , 1. '% , 2)

lw lw add sw lw

$t0, -12(fp) $t1, -16(fp) $t2, $t0, $t1 $t2, -8(fp) $t0, -8(fp)

a b c d

Our Register Allocator .n Action

a = b + c; d = a; c = a + d;
&aram N ### &aram 1 #tored '% #tored ra '% ( *N +++ '% ( * '% ( ) '% , * '% , '% , 12 '% , 1. '% , 2)

lw lw add sw lw sw

$t0, -12(fp) $t1, -16(fp) $t2, $t0, $t1 $t2, -8(fp) $t0, -8(fp) $t0, -20(fp)

a b c d

Our Register Allocator .n Action

a = b + c; d = a; c = a + d;
&aram N ### &aram 1 #tored '% #tored ra '% ( *N +++ '% ( * '% ( ) '% , * '% , '% , 12 '% , 1. '% , 2)

lw lw add sw lw sw

$t0, -12(fp) $t1, -16(fp) $t2, $t0, $t1 $t2, -8(fp) $t0, -8(fp) $t0, -20(fp)

a b c d

Our Register Allocator .n Action

a = b + c; d = a; c = a + d;
&aram N ### &aram 1 #tored '% #tored ra '% ( *N +++ '% ( * '% ( ) '% , * '% , '% , 12 '% , 1. '% , 2)

lw lw add sw lw sw lw

$t0, -12(fp) $t1, -16(fp) $t2, $t0, $t1 $t2, -8(fp) $t0, -8(fp) $t0, -20(fp) $t0, -8(fp)

a b c d

Our Register Allocator .n Action

a = b + c; d = a; c = a + d;
&aram N ### &aram 1 #tored '% #tored ra '% ( *N +++ '% ( * '% ( ) '% , * '% , '% , 12 '% , 1. '% , 2)

lw lw add sw lw sw lw lw

$t0, -12(fp) $t1, -16(fp) $t2, $t0, $t1 $t2, -8(fp) $t0, -8(fp) $t0, -20(fp) $t0, -8(fp) $t1, -20(fp)

a b c d

Our Register Allocator .n Action

a = b + c; d = a; c = a + d;
&aram N ### &aram 1 #tored '% #tored ra '% ( *N +++ '% ( * '% ( ) '% , * '% , '% , 12 '% , 1. '% , 2)

lw lw add sw lw sw

$t0, -12(fp) $t1, -16(fp) $t2, $t0, $t1 $t2, -8(fp) $t0, -8(fp) $t0, -20(fp)

a b c d

lw $t0, -8(fp) lw $t1, -20(fp) add $t2, $t0, $t1

Our Register Allocator .n Action

a = b + c; d = a; c = a + d;
&aram N ### &aram 1 #tored '% #tored ra '% ( *N +++ '% ( * '% ( ) '% , * '% , '% , 12 '% , 1. '% , 2)

lw lw add sw lw sw lw lw add sw

$t0, -12(fp) $t1, -16(fp) $t2, $t0, $t1 $t2, -8(fp) $t0, -8(fp) $t0, -20(fp) $t0, -8(fp) $t1, -20(fp) $t2, $t0, $t1 $t2, -16(fp)

a b c d

Analysis o* our Allocator

4isad%antage: Gross ine''iciency#

.ssues unnecessary loads and stores +y t e do'en# ,astes s0ace on %alues t at could +e stored 0urely in registers# Gasily an order o* magnitude or t!o slo!er t an necessary# Enacce0ta+le in any 0roduction com0iler# 1an translate eac 0iece o* .R directly to assem+ly as !e go# Fe%er need to !orry a+out running out o* registers# Fe%er need to !orry a+out *unction calls or s0ecial50ur0ose registers# /ood i* you just needed to get a 0rototy0e com0iler u0 and running#

Ad%antage: #im%licity#

=uilding a =etter Allocator

Goal: 6ry to old as many %aria+les in registers as 0ossi+le#

Reduces memory reads<!rites# Reduces total memory usage# , ic registers do !e 0ut %aria+les in7 , at do !e do ! en !e run out o* registers7

,e !ill need to address t ese $uestions:

Register 1onsistency
a = b + c

d = a

d = b

e = d

Register 1onsistency

At eac 0rogram 0oint, eac %aria+le must +e in t e same location#

4oes not mean t at eac %aria+le is al!ays stored in t e same location&

At eac 0rogram 0oint, eac register olds at most one li%e %aria+le#

1an assign se%eral %aria+les t e same register i* no t!o o* t em e%er !ill +e read toget er#

-i%e Ranges and -i%e .nter%als

Recall: A %aria+le is li/e at a 0articular 0rogram 0oint i* its %alue may +e read later +e*ore it is !ritten#

1an *ind t is using glo+al li%eness analysis#

6 e li/e range *or a %aria+le is t e set o* 0rogram 0oints at ! ic t at %aria+le is li%e# 6 e li/e inter/al *or a %aria+le is t e smallest su+range o* t e .R code containing all a %aria+le8s li%e ranges#

A 0ro0erty o* t e .R code, not t e 1J/# -ess 0recise t an li%e ranges, +ut sim0ler to !or" !it #

-i%e Ranges and -i%e .nter%als

-i%e Ranges and -i%e .nter%als

e = d + a f = b + c f = f + b IfZ e Goto _L0 d = e + f Goto _L1; _L0: d = e - f _L1: g = d

-i%e Ranges and -i%e .nter%als

e = d + a
e = d + a f = b + c f = f + b IfZ e Goto _L0 d = e + f Goto _L1; _L0: d = e - f _L1: g = d

f = b + c

f = f + b

d = e + f

d = e f

g = d

-i%e Ranges and -i%e .nter%als

e = d + a
e = d + a f = b + c f = f + b IfZ e Goto _L0 d = e + f Goto _L1; _L0: d = e - f _L1: g = d

f = b + c

f = f + b

d = e + f

d = e f

g = d { g }

-i%e Ranges and -i%e .nter%als

e = d + a
e = d + a f = b + c f = f + b IfZ e Goto _L0 d = e + f Goto _L1; _L0: d = e - f _L1: g = d

f = b + c

f = f + b

d = e + f

d = e f

{ d } g = d { g }

-i%e Ranges and -i%e .nter%als

e = d + a
e = d + a f = b + c f = f + b IfZ e Goto _L0 d = e + f Goto _L1; _L0: d = e - f _L1: g = d

f = b + c

f = f + b

d = e + f { d } { d } g = d { g }

d = e f

-i%e Ranges and -i%e .nter%als

e = d + a
e = d + a f = b + c f = f + b IfZ e Goto _L0 d = e + f Goto _L1; _L0: d = e - f _L1: g = d

f = b + c

f = f + b

{ e, f } d = e + f { d } { d } g = d { g }

d = e f

-i%e Ranges and -i%e .nter%als

e = d + a
e = d + a f = b + c f = f + b IfZ e Goto _L0 d = e + f Goto _L1; _L0: d = e - f _L1: g = d

f = b + c

f = f + b

{ e, f } d = e + f { d } { d } g = d { g }

d = e f { d }

-i%e Ranges and -i%e .nter%als

e = d + a
e = d + a f = b + c f = f + b IfZ e Goto _L0 d = e + f Goto _L1; _L0: d = e - f _L1: g = d

f = b + c

f = f + b

{ e, f } d = e + f { d } { d } g = d { g }

{ e, f } d = e f { d }

-i%e Ranges and -i%e .nter%als

e = d + a
e = d + a f = b + c f = f + b IfZ e Goto _L0 d = e + f Goto _L1; _L0: d = e - f _L1: g = d

f = b + c

f = f + b { e, f } { e, f } d = e + f { d } { d } g = d { g } { e, f } d = e f { d }

-i%e Ranges and -i%e .nter%als

e = d + a
e = d + a f = b + c f = f + b IfZ e Goto _L0 d = e + f Goto _L1; _L0: d = e - f _L1: g = d

f = b + c

{ b, e, f } f = f + b { e, f } { e, f } d = e + f { d } { d } g = d { g } { e, f } d = e f { d }

-i%e Ranges and -i%e .nter%als

e = d + a
e = d + a f = b + c f = f + b IfZ e Goto _L0 d = e + f Goto _L1; _L0: d = e - f _L1: g = d

f = b + c { b, e, f} { b, e, f } f = f + b { e, f } { e, f } d = e + f { d } { d } g = d { g } { e, f } d = e f { d }

-i%e Ranges and -i%e .nter%als

e = d + a
e = d + a f = b + c f = f + b IfZ e Goto _L0 d = e + f Goto _L1; _L0: d = e - f _L1: g = d

{ b, c, e } f = b + c { b, e, f} { b, e, f } f = f + b { e, f } { e, f } d = e + f { d } { d } g = d { g } { e, f } d = e f { d }

-i%e Ranges and -i%e .nter%als

e = d + a f = b + c f = f + b IfZ e Goto _L0 d = e + f Goto _L1; _L0: d = e - f _L1: g = d

e = d + a { b, c, e } { b, c, e } f = b + c { b, e, f} { b, e, f } f = f + b { e, f } { e, f } d = e + f { d } { d } g = d { g } { e, f } d = e f { d }

-i%e Ranges and -i%e .nter%als

e = d + a f = b + c f = f + b IfZ e Goto _L0 d = e + f Goto _L1; _L0: d = e - f _L1: g = d

{ a, b, c, d } e = d + a { b, c, e } { b, c, e } f = b + c { b, e, f} { b, e, f } f = f + b { e, f } { e, f } d = e + f { d } { d } g = d { g } { e, f } d = e f { d }

-i%e Ranges and -i%e .nter%als

e = d + a f = b + c f = f + b IfZ e Goto _L0 d = e + f Goto _L1; _L0: d = e - f _L1: g = d

{ a, b, c, d } e = d + a { b, c, e } { b, c, e } f = b + c { b, e, f} { b, e, f } f = f + b { e, f } { e, f } d = e + f { d } { d } g = d { g } { e, f } d = e f { d }

-i%e Ranges and -i%e .nter%als

a
e = d + a f = b + c f = f + b IfZ e Goto _L0 d = e + f Goto _L1; _L0: d = e - f _L1: g = d

{ a, b, c, d } e = d + a { b, c, e } { b, c, e } f = b + c { b, e, f} { b, e, f } f = f + b { e, f } { e, f } d = e + f { d } { d } g = d { g } { e, f } d = e f { d }

-i%e Ranges and -i%e .nter%als

ab
e = d + a f = b + c f = f + b IfZ e Goto _L0 d = e + f Goto _L1; _L0: d = e - f _L1: g = d

{ a, b, c, d } e = d + a { b, c, e } { b, c, e } f = b + c { b, e, f} { b, e, f } f = f + b { e, f } { e, f } d = e + f { d } { d } g = d { g } { e, f } d = e f { d }

-i%e Ranges and -i%e .nter%als

abb c
e = d + a f = b + c f = f + b IfZ e Goto _L0 d = e + f Goto _L1; _L0: d = e - f _L1: g = d

{ a, b, c, d } e = d + a { b, c, e } { b, c, e } f = b + c { b, e, f} { b, e, f } f = f + b { e, f } { e, f } d = e + f { d } { d } g = d { g } { e, f } d = e f { d }

-i%e Ranges and -i%e .nter%als

abb cb d
e = d + a f = b + c f = f + b IfZ e Goto _L0 d = e + f Goto _L1; _L0: d = e - f _L1: g = d

{ a, b, c, d } e = d + a { b, c, e } { b, c, e } f = b + c { b, e, f} { b, e, f } f = f + b { e, f } { e, f } d = e + f { d } { d } g = d { g } { e, f } d = e f { d }

-i%e Ranges and -i%e .nter%als

abb cb d
e = d + a f = b + c f = f + b IfZ e Goto _L0 d = e + f Goto _L1; _L0: d = e - f _L1: g = d

{ a, b, c, d } e = d + a { b, c, e } { b, c, e } f = b + c { b, e, f} { b, e, f } f = f + b { e, f } { e, f } d = e + f { d } { d } g = d { g } { e, f } d = e f { d }

-i%e Ranges and -i%e .nter%als

abb cb db e
e = d + a f = b + c f = f + b IfZ e Goto _L0 d = e + f Goto _L1; _L0: d = e - f _L1: g = d

{ a, b, c, d } e = d + a { b, c, e } { b, c, e } f = b + c { b, e, f} { b, e, f } f = f + b { e, f } { e, f } d = e + f { d } { d } g = d { g } { e, f } d = e f { d }

-i%e Ranges and -i%e .nter%als

abb f cb db eb
e = d + a f = b + c f = f + b IfZ e Goto _L0 d = e + f Goto _L1; _L0: d = e - f _L1: g = d

{ a, b, c, d } e = d + a { b, c, e } { b, c, e } f = b + c { b, e, f} { b, e, f } f = f + b { e, f } { e, f } d = e + f { d } { d } g = d { g } { e, f } d = e f { d }

-i%e Ranges and -i%e .nter%als

abb fb g cb db eb
e = d + a f = b + c f = f + b IfZ e Goto _L0 d = e + f Goto _L1; _L0: d = e - f _L1: g = d

{ a, b, c, d } e = d + a { b, c, e } { b, c, e } f = b + c { b, e, f} { b, e, f } f = f + b { e, f } { e, f } d = e + f { d } { d } g = d { g } { e, f } d = e f { d }

Register Allocation !it -i%e .nter%als

/i%en t e li%e inter%als *or all t e %aria+les in t e 0rogram, !e can allocate registers using a sim0le greedy algorit m# .dea: 6rac" ! ic registers are *ree at eac 0oint# , en a li%e inter%al +egins, gi%e t at %aria+le a *ree register# , en a li%e inter%al ends, t e register is once again *ree# ,e can8t al!ays *it e%eryt ing into a registerH !e8ll see ! at do to in a minute#

b d b e f b g b a b c

Register Allocation !it -i%e .nter%als

b d b e b f b g b a b c

Register Allocation !it -i%e .nter%als

b d b e b f b g b a b c

0ree Registers R) R1 R2 R1 2

Register Allocation !it -i%e .nter%als

b d b e b f b g b a b c

0ree Registers R) R1 R2 R1 2

Register Allocation !it -i%e .nter%als

b d b e b f b g b a b c

0ree Registers R) R1 R2 R1 2

Register Allocation !it -i%e .nter%als

b d b e b f b g b a b c

0ree Registers R) R1 R2 R1 2

Register Allocation !it -i%e .nter%als

b d b e b f b g b a b c

0ree Registers R) R1 R2 R1 2

Register Allocation !it -i%e .nter%als

b d b e b f b g b a b c

0ree Registers R) R1 R2 R2 1

Register Allocation !it -i%e .nter%als

b d b e b f b g b a b c

0ree Registers R) R1 R2 R2 1

Register Allocation !it -i%e .nter%als

b d b e b f b g b a b c

0ree Registers R) R1 R2 R2 1

Register Allocation !it -i%e .nter%als

b d b e b f b g b a b c

0ree Registers R) R1 R2 R2 1

Register Allocation !it -i%e .nter%als

b d b e b f b g b a b c

0ree Registers R) R1 R2 R2 1

Register Allocation !it -i%e .nter%als

b d b e b f b g b a b c

0ree Registers R) R1 R2 R1 2

Register Allocation !it -i%e .nter%als

b d b e b f b g b a b c

0ree Registers R) R1 R2 R1 2

Register Allocation !it -i%e .nter%als

b d b e b f b g b a b c

0ree Registers R) R1 R2 R1 2

Anot er G(am0le

Anot er G(am0le
b b c d b e b f b g b a

Anot er G(am0le
b b c d b e b f b g b a

0ree Registers R) R1 R2

Anot er G(am0le
b b c d b e b f b g b a

0ree Registers R) R1 R2

Anot er G(am0le
b b c d b e b f b g b a

0ree Registers R) R1 R2

Anot er G(am0le
b b c d b e b f b g b a

0ree Registers R) R1 R2

Anot er G(am0le
b b c d b e b f b g b a

0ree Registers R) R1 R2

Anot er G(am0le
b b c d b e b f b g b a

0ree Registers R) R1 R2

What do we do now?

Register S0illing

.* a register cannot +e *ound *or a %aria+le v, !e may need to s%ill a %aria+le# , en a %aria+le is s0illed, it is stored in memory rat er t an a register# , en !e need a register *or t e s0illed %aria+le:

G%ict some e(isting register to memory# -oad t e %aria+le into t e register# , en done, !rite t e register +ac" to memory and reload t e register !it its original %alue#

S0illing is slo!, +ut sometimes necessary#

Anot er G(am0le
b b c d b e b f b g b a

0ree Registers R) R1 R2

What do we do now?

Anot er G(am0le
b b c d b e b f b g b a

0ree Registers R) R1 R2

Anot er G(am0le
b b c d b e b f b g b a

0ree Registers R) R1 R2

Anot er G(am0le
b b c d b e b f b g b a

0ree Registers R) R1 R2

Anot er G(am0le
b b c d b e b f b g b a

0ree Registers R) R1 R2

Anot er G(am0le
b b c d b e b f b g b a

0ree Registers R) R1 R2

Anot er G(am0le
b b c d b e b f b g b a

0ree Registers R) R1 R2

Anot er G(am0le
b b c d b e b f b g b a

0ree Registers R) R1 R2

Anot er G(am0le
b b c d b e b f b g b a

0ree Registers R) R1 R2

Anot er G(am0le
b b c d b e b f b g b a

0ree Registers R) R1 R2

-inear Scan Register Allocation

6 is algorit m is called linear scan register allocation and is a com0arati%ely ne! algorit m# Ad%antages:

Kery e**icient 2a*ter com0uting li%e inter%als, runs in linear time3 Produces good code in many instances# Allocation ste0 !or"s in one 0assH can generate code during iteration# O*ten used in L.6 com0ilers li"e La%a HotS0ot# .m0recise due to use o* li%e inter/als rat er t an li%e ranges# Ot er tec ni$ues "no!n to +e su0erior in many cases#

4isad%antages:

1orrectness Proo* S"etc

Fo register olds t!o li%e %aria+les at once:

-i%e inter%als are conser%ati%e a00ro(imations o* li%e ranges# Fo t!o %aria+les !it o%erla00ing li%e ranges 0laced in t e same register#

At eac 0rogram 0oint, e%ery %aria+le is in t e same location:

All %aria+les assigned a uni$ue location#

Second51 ance =in Pac"ing

A more aggressi%e %ersion o* linear5scan# Eses li%e ranges instead o* li%e inter/als# .* a %aria+le must +e s0illed, don8t s0ill all uses o* it#

A later li%e range mig t still *it into a register#

Re$uires a *inal data5*lo! analysis to con*irm %aria+les are assigned consistent locations# See CMuality and S0eed in -inear5scan Register AllocationD +y 6rau+, Hollo!ay, and Smit #

Second51 ance =in Pac"ing

b b c d b e b f b g b a

0ree Registers R) R1 R2

Second51 ance =in Pac"ing

b b c d b e b f b g b a

0ree Registers R) R1 R2

Second51 ance =in Pac"ing

b b c d b e b f b g b a

0ree Registers R) R1 R2

Second51 ance =in Pac"ing

b b c d b e b f b g b a

0ree Registers R) R1 R2

Second51 ance =in Pac"ing

b b c d b e b f b g b a

0ree Registers R) R1 R2

Second51 ance =in Pac"ing

b b c d b e b f b g b a

0ree Registers R) R1 R2

Second51 ance =in Pac"ing

b b c d b e b f b g b a

0ree Registers R) R1 R2

Second51 ance =in Pac"ing

b b c d b e b f b g b a

0ree Registers R) R1 R2

Second51 ance =in Pac"ing

b b c d b e b f b g b a

0ree Registers R) R1 R2

Second51 ance =in Pac"ing

b b c d b e b f b g b a

0ree Registers R) R1 R2

Second51 ance =in Pac"ing

b b c d b e b f b g b a

0ree Registers R) R1 R2

Second51 ance =in Pac"ing

b b c d b e b f b g b a

0ree Registers R) R1 R2

Second51 ance =in Pac"ing

b b c d b e b f b g b a

0ree Registers R) R1 R2

Second51 ance =in Pac"ing

b b c d b e b f b g b a

0ree Registers R) R1 R2

Second51 ance =in Pac"ing

b b c d b e b f b g b a

0ree Registers R) R1 R2

Second51 ance =in Pac"ing

b b c d b e b f b g b a

0ree Registers R) R1 R2

Second51 ance =in Pac"ing

b b c d b e b f b g b a

0ree Registers R) R1 R2

Second51 ance =in Pac"ing

b b c d b e b f b g b a

0ree Registers R) R1 R2

Second51 ance =in Pac"ing

b b c d b e b f b g b a

0ree Registers R) R1 R2

An Gntirely 4i**erent A00roac

An Gntirely 4i**erent A00roac

{ a, b, c, d } e = d + a { b, c, e } { b, c, e } f = b + c { b, e, f} { b, e, f } f = f + b { e, f } { e, f } d = e + f { d } { d } g = d { g } { e, f } d = e f { d }

An Gntirely 4i**erent A00roac

{ a, b, c, d } e = d + a { b, c, e } { b, c, e } f = b + c { b, e, f} { b, e, f } f = f + b { e, f } { e, f } d = e + f { d } { d } g = d { g } { e, f } d = e f { d }

What can we infer from all these variables being live at this point?

An Gntirely 4i**erent A00roac

{ a, b, c, d } e = d + a { b, c, e } { b, c, e } f = b + c { b, e, f} { b, e, f } f = f + b { e, f } { e, f } d = e + f { d } { d } g = d { g } { e, f } d = e f { d }

An Gntirely 4i**erent A00roac

{ a, b, c, d } e = d + a { b, c, e } { b, c, e } f = b + c { b, e, f} { b, e, f } f = f + b { e, f } { e, f } d = e + f { d } { d } g = d { g } { e, f } d = e f { d }

b a g f

c d e

An Gntirely 4i**erent A00roac

{ a, b, c, d } e = d + a { b, c, e } { b, c, e } f = b + c { b, e, f} { b, e, f } f = f + b { e, f } { e, f } d = e + f { d } { d } g = d { g } { e, f } d = e f { d }

b a g f

c d e

An Gntirely 4i**erent A00roac

{ a, b, c, d } e = d + a { b, c, e } { b, c, e } f = b + c { b, e, f} { b, e, f } f = f + b { e, f } { e, f } d = e + f { d } { d } g = d { g } { e, f } d = e f { d }

b a g f

c d e

An Gntirely 4i**erent A00roac

{ a, b, c, d } e = d + a { b, c, e } { b, c, e } f = b + c { b, e, f} { b, e, f } f = f + b { e, f } { e, f } d = e + f { d } { d } g = d { g } { e, f } d = e f { d }

b a g f

c d e

An Gntirely 4i**erent A00roac

{ a, b, c, d } e = d + a { b, c, e } { b, c, e } f = b + c { b, e, f} { b, e, f } f = f + b { e, f } { e, f } d = e + f { d } { d } g = d { g } { e, f } d = e f { d }

R)

Registers R1 R2 R1 b c d

a g f e

An Gntirely 4i**erent A00roac

{ a, b, c, d } e = d + a { b, c, e } { b, c, e } f = b + c { b, e, f} { b, e, f } f = f + b { e, f } { e, f } d = e + f { d } { d } g = d { g } { e, f } d = e f { d }

R)

Registers R1 R2 R1 b c d

a g f e

6 e Register .nter*erence /ra0

6 e register inter'erence gra%h 2R./3 o* a control5*lo! gra0 is an undirected gra0 ! ere

Gac node is a %aria+le# 6 ere is an edge +et!een t!o %aria+les t at are li%e at t e same 0rogram 0oint#

Per*orm register allocation +y assigning eac %aria+le a di**erent register *rom all o* its neig +ors# 6 ere8s just one catc ###

6 e One 1atc

6 is 0ro+lem is e$ui%alent to gra%h, coloring, ! ic is N&,hard i* t ere are at least t ree registers# Fo good 0olynomial5time algorit ms 2or e%en good a00ro(imations&3 are "no!n *or t is 0ro+lem# ,e a%e to +e content !it a euristic t at is good enoug *or R./s t at arise in 0ractice#

6 e One 1atc to 6 e One 1atc

6 e One 1atc to 6 e One 1atc

.* you can *igure out a !ay to assign registers to ar+itrary R./s, you8%e just 0ro%en & N N& and !ill get a 213)))3))) check *rom t e 1lay Mat ematics .nstitute#

6 e One 1atc to 6 e One 1atc

.* you can *igure out a !ay to assign registers to ar+itrary R./s, you8%e just 0ro%en & N N& and !ill get a 213)))3))) check *rom t e 1lay Mat ematics .nstitute#

=attling N&5Hardness

1 aitin8s Algorit m

.ntuition:

Su00ose !e are trying to k5color a gra0 and *ind a node !it *e!er t an k edges# .* !e delete t is node *rom t e gra0 and color ! at remains, !e can *ind a color *or t is node i* !e add it +ac" in# Reason: ,it *e!er t an k neig +ors, some color must +e le*t o%er# Jind a node !it *e!er t an k outgoing edges# Remo%e it *rom t e gra0 # Recursi%ely color t e rest o* t e gra0 # Add t e node +ac" in# Assign it a %alid color#

Algorit m:

1 aitin8s Algorit m

1 aitin8s Algorit m
b c

1 aitin8s Algorit m
b c

R)

Registers R1 R2 R1

1 aitin8s Algorit m
b c

R)

Registers R1 R2 R1

1 aitin8s Algorit m
b c

R)

Registers R1 R2 R1

1 aitin8s Algorit m
b c

R)

Registers R1 R2 R1

1 aitin8s Algorit m
b c

R)

Registers R1 R2 R1

1 aitin8s Algorit m
b c

b c

R)

Registers R1 R2 R1

1 aitin8s Algorit m
b c

b c

R)

Registers R1 R2 R1

1 aitin8s Algorit m
b c

b c

R)

Registers R1 R2 R1

1 aitin8s Algorit m
b c

d b c

R)

Registers R1 R2 R1

1 aitin8s Algorit m
b c

d b c

R)

Registers R1 R2 R1

1 aitin8s Algorit m
b c e

d b c

R)

Registers R1 R2 R1

1 aitin8s Algorit m
b c a e

d b c

R)

Registers R1 R2 R1

1 aitin8s Algorit m
b c g a e

d b c

R)

Registers R1 R2 R1

1 aitin8s Algorit m
b c f g a e

d b c

R)

Registers R1 R2 R1

1 aitin8s Algorit m
b c g a e

d b c

R)

Registers R1 R2 R1

1 aitin8s Algorit m
b c g a e

d b c

R)

Registers R1 R2 R1

1 aitin8s Algorit m
b c a e

d b c

R)

Registers R1 R2 R1

1 aitin8s Algorit m
b c a e

d b c

R)

Registers R1 R2 R1

1 aitin8s Algorit m
b c e

d b c

R)

Registers R1 R2 R1

1 aitin8s Algorit m
b c e

d b c

R)

Registers R1 R2 R1

1 aitin8s Algorit m
b c

d b c

R)

Registers R1 R2 R1

1 aitin8s Algorit m
b c

d b c

R)

Registers R1 R2 R1

1 aitin8s Algorit m
b c

b c

R)

Registers R1 R2 R1

1 aitin8s Algorit m
b c

b c

R)

Registers R1 R2 R1

1 aitin8s Algorit m
b c

R)

Registers R1 R2 R1

1 aitin8s Algorit m
b c

R)

Registers R1 R2 R1

1 aitin8s Algorit m
b c

R)

Registers R1 R2 R1

1 aitin8s Algorit m
b c

R)

Registers R1 R2 R1

One Pro+lem

, at i* !e can8t *ind a node !it *e!er t an k neig +ors7 1 oose and remo%e an ar+itrary node, mar"ing it Ctrou+lesome#D

Ese euristics to c oose ! ic one#

, en adding node +ac" in, it may +e 0ossi+le to *ind a %alid color# Ot er!ise, !e a%e to s0ill t at node#

1 aitin8s Algorit m Reloaded

b a g f Registers R) R1 R2 e c d

1 aitin8s Algorit m Reloaded

b a g f Registers R) R1 R2 e g c d

1 aitin8s Algorit m Reloaded

b a g f Registers R) R1 R2 e c d f g

1 aitin8s Algorit m Reloaded

b a g f Registers R) R1 R2 e c d e f g

1 aitin8s Algorit m Reloaded

b a g f Registers R) R1 R2 e c d d e f g

1 aitin8s Algorit m Reloaded

b a g f Registers R) R1 R2 e c d c d e f g

1 aitin8s Algorit m Reloaded

b a g f Registers R) R1 R2 e c d b c d e f g

1 aitin8s Algorit m Reloaded

b a g f Registers R) R1 R2 e c d a b c d e f g

1 aitin8s Algorit m Reloaded

b a g f Registers R) R1 R2 e c d b c d e f g

1 aitin8s Algorit m Reloaded

b a g f Registers R) R1 R2 e c d b c d e f g

1 aitin8s Algorit m Reloaded

b a g f Registers R) R1 R2 e c d c d e f g

1 aitin8s Algorit m Reloaded

b a g f Registers R) R1 R2 e c d c d e f g

1 aitin8s Algorit m Reloaded

b a g f Registers R) R1 R2 e c d d e f g

1 aitin8s Algorit m Reloaded

b a g f Registers R) R1 R2 e c d d e f g

1 aitin8s Algorit m Reloaded

b a g f Registers R) R1 R2 e c d e f g

1 aitin8s Algorit m Reloaded

b a g f Registers R) R1 R2 e c d e f g

1 aitin8s Algorit m Reloaded

b a g f Registers R) R1 R2 e c d
(spilled)

e f g

1 aitin8s Algorit m Reloaded

b a g f Registers R) R1 R2 e c d
(spilled)

f g

1 aitin8s Algorit m Reloaded

b a g f Registers R) R1 R2 e c d
(spilled)

f g

1 aitin8s Algorit m Reloaded

b a g f Registers R) R1 R2 e g c d
(spilled)

1 aitin8s Algorit m Reloaded

b a g f Registers R) R1 R2 e g c d
(spilled)

1 aitin8s Algorit m Reloaded

b a g f Registers R) R1 R2 e c d
(spilled)

1 aitin8s Algorit m Reloaded

b a g f Registers R) R1 R2 e c d
(spilled)

A Smarter Algorit m
{ a, b, c, d } e = d + a { b, c, e } { b, c, e } f = b + c { b, e, f}

Registers R) R1 R2 b a c d g f e
(spilled)

{ b, e, f } f = f + b { e, f } { e, f } d = e + f { d } { d } g = d { g } { e, f } d = e f { d }

A Smarter Algorit m
{ a, b, c, d } e = d + a { b, c, e } { b, c, e } f = b + c { b, e, f}

Registers R) R1 R2 b a c d g f e
(spilled)

{ b, e, f } f = f + b { e, f } { e, f } d = e + f { d } { d } g = d { g } { e, f } d = e f { d }

A Smarter Algorit m
{ a, b, c, d } e = d + a { b, c, e } { b, c, e } f = b + c { b, e, f}

Registers R) R1 R2 b a c d g f e
(spilled)

{ b, e, f } f = f + b { e, f } { e, f } d = e + f { d } { d } g = d { g } { e, f } d = e f { d }

A Smarter Algorit m
{ a, b, c, d } e = d + a { b, c, e } { b, c, e } f = b + c { b, e, f}

Registers R) R1 R2 b a c d d f e
(spilled)

{ b, e, f } f = f + b { e, f } { e, f } d = e + f { d } { d } g = d { g } { e, f } d = e f { d }

Anot er G(am0le

Anot er G(am0le
b a f e c d

Anot er G(am0le
b a f e c d

Registers R) R1 R2

Anot er G(am0le
b a f e c d

Registers R) R1 R2

Anot er G(am0le
b a f e c d

c a

Registers R) R1 R2

Anot er G(am0le
b a f e c d

c a

Registers R) R1 R2

Anot er G(am0le
b a f e c d e b

c a

Registers R) R1 R2

Anot er G(am0le
b a f e c d

f e b

c a

Registers R) R1 R2

Anot er G(am0le
b a f e c d d f e b

c a

Registers R) R1 R2

Anot er G(am0le
b a f e c d

f e b

c a

Registers R) R1 R2

Anot er G(am0le
b a f e c d

f e b

c a

Registers R) R1 R2

Anot er G(am0le
b a f e c d e b

c a

Registers R) R1 R2

Anot er G(am0le
b a f e c d e b

c a

Registers R) R1 R2

Anot er G(am0le
b a f e c d

c a

Registers R) R1 R2

Anot er G(am0le
b a f e c d

c a

Registers R) R1 R2

Anot er G(am0le
b a f e c d

c a

Registers R) R1 R2

Anot er G(am0le
b a f e c d

c a

Registers R) R1 R2

Anot er G(am0le
b a f e c d

Registers R) R1 R2

Anot er G(am0le
b a f e c d

Registers R) R1 R2

Anot er G(am0le
b a f e c d

Registers R) R1 R2

Anot er G(am0le
b a f e c d

Registers R) R1 R2

Anot er G(am0le
b a f e c d d f e b

c a

Registers R) R1 R2

Anot er G(am0le
b a f e c d

f e b

c a

Registers R) R1 R2

Anot er G(am0le
b a f e c d

f e b

c a

Registers R) R1 R2

Anot er G(am0le
b a f e c d e b

c a

Registers R) R1 R2

Anot er G(am0le
b a f e c d e b

c a

Registers R) R1 R2

Anot er G(am0le
b a f e c d

c a

Registers R) R1 R2

Anot er G(am0le
b a f e c d

c a

Registers R) R1 R2

Anot er G(am0le
b a f e c d

c a

Registers R) R1 R2

Anot er G(am0le
b a f e c d

c a

Registers R) R1 R2

Anot er G(am0le
b a f e c d

Registers R) R1 R2

Anot er G(am0le
b a f e c
(spilled)

Registers R) R1 R2

Anot er G(am0le
b a f e c
(spilled)

Registers R) R1 R2

Anot er G(am0le
b
(spilled)

(spilled)

a f e

Registers R) R1 R2

1 aitin8s Algorit m

Ad%antages:

Jor many control5*lo! gra0 s, *inds an e(cellent assignment o* %aria+les to registers# , en distinguis ing %aria+les +y use, 0roduces a 0recise R./# O*ten used in 0roduction com0ilers li"e /11# 1ore a00roac +ased on t e FP5 ard gra0 coloring 0ro+lem# Heuristic may 0roduce 0at ologically !orst5case assignments#

4isad%antages:

1orrectness Proo* S"etc

Fo t!o %aria+les li%e at some 0oint are assigned t e same register#

Jorced +y gra0 coloring#

At any 0rogram 0oint eac %aria+le is al!ays in one location#

Automatic i* !e assign eac %aria+le one register# Re$uires a *e! tric"s i* !e se0arate +y use case#

.m0ro%ements to t e Algorit m

1 oose ! at to s0ill intelligently#

Ese euristics 2least5commonly used, greatest im0ro%ement, etc#3 to determine ! at to s0ill# , en s0illing a %aria+le, recom0ute t e R./ +ased on t e s0ill and use a ne! coloring to *ind a register#

Handle s0illing intelligently#

Summary o* Register Allocation

1ritical ste0 in all o0timi'ing com0ilers# 6 e linear scan algorit m uses li/e inter/als to greedily assign %aria+les to registers#

O*ten used in L.6 com0ilers due to e**iciency#

Chaitin4s algorithm uses t e register inter'erence gra%h 2+ased on li/e ranges3 and gra%h coloring to assign registers#

6 e +asis *or t e tec ni$ue used in /11#

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Garbage Collection

Re*erence 1ounting Mar"5and5S!ee0 Sto05and51o0y .ncremental 1ollectors